]> git.ipfire.org Git - people/ms/u-boot.git/blob - board/davinci/dm365evm/dm365evm.c
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
[people/ms/u-boot.git] / board / davinci / dm365evm / dm365evm.c
1 /*
2 * Copyright (C) 2009 Texas Instruments Incorporated
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #include <common.h>
8 #include <nand.h>
9 #include <asm/io.h>
10 #include <asm/arch/hardware.h>
11 #include <asm/ti-common/davinci_nand.h>
12 #include <asm/arch/gpio.h>
13 #include <netdev.h>
14 #include <asm/arch/davinci_misc.h>
15 #ifdef CONFIG_DAVINCI_MMC
16 #include <mmc.h>
17 #include <asm/arch/sdmmc_defs.h>
18 #endif
19
20 DECLARE_GLOBAL_DATA_PTR;
21
22 int board_init(void)
23 {
24 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM365_EVM;
25 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
26
27 return 0;
28 }
29
30 #ifdef CONFIG_DRIVER_TI_EMAC
31 int board_eth_init(bd_t *bis)
32 {
33 uint8_t eeprom_enetaddr[6];
34 int i;
35 struct davinci_gpio *gpio1_base =
36 (struct davinci_gpio *)DAVINCI_GPIO_BANK01;
37
38 /* Configure PINMUX 3 to enable EMAC pins */
39 writel((readl(PINMUX3) | 0x1affff), PINMUX3);
40
41 /* Configure GPIO20 as output */
42 writel((readl(&gpio1_base->dir) & ~(1 << 20)), &gpio1_base->dir);
43
44 /* Toggle GPIO 20 */
45 for (i = 0; i < 20; i++) {
46 /* GPIO 20 low */
47 writel((readl(&gpio1_base->out_data) & ~(1 << 20)),
48 &gpio1_base->out_data);
49
50 udelay(1000);
51
52 /* GPIO 20 high */
53 writel((readl(&gpio1_base->out_data) | (1 << 20)),
54 &gpio1_base->out_data);
55 }
56
57 /* Configure I2C pins so that EEPROM can be read */
58 writel((readl(PINMUX3) | 0x01400000), PINMUX3);
59
60 /* Read Ethernet MAC address from EEPROM */
61 if (dvevm_read_mac_address(eeprom_enetaddr))
62 davinci_sync_env_enetaddr(eeprom_enetaddr);
63
64 davinci_emac_initialize();
65
66 return 0;
67 }
68 #endif
69
70 #ifdef CONFIG_NAND_DAVINCI
71 static void nand_dm365evm_select_chip(struct mtd_info *mtd, int chip)
72 {
73 struct nand_chip *this = mtd->priv;
74 unsigned long wbase = (unsigned long) this->IO_ADDR_W;
75 unsigned long rbase = (unsigned long) this->IO_ADDR_R;
76
77 if (chip == 1) {
78 __set_bit(14, &wbase);
79 __set_bit(14, &rbase);
80 } else {
81 __clear_bit(14, &wbase);
82 __clear_bit(14, &rbase);
83 }
84 this->IO_ADDR_W = (void *)wbase;
85 this->IO_ADDR_R = (void *)rbase;
86 }
87
88 int board_nand_init(struct nand_chip *nand)
89 {
90 davinci_nand_init(nand);
91 nand->select_chip = nand_dm365evm_select_chip;
92 return 0;
93 }
94 #endif
95
96 #ifdef CONFIG_DAVINCI_MMC
97 static struct davinci_mmc mmc_sd0 = {
98 .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
99 .input_clk = 121500000,
100 .host_caps = MMC_MODE_4BIT,
101 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
102 .version = MMC_CTLR_VERSION_2,
103 };
104
105 #ifdef CONFIG_DAVINCI_MMC_SD1
106 static struct davinci_mmc mmc_sd1 = {
107 .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD1_BASE,
108 .input_clk = 121500000,
109 .host_caps = MMC_MODE_4BIT,
110 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
111 .version = MMC_CTLR_VERSION_2,
112 };
113 #endif
114
115 int board_mmc_init(bd_t *bis)
116 {
117 int err;
118
119 /* Add slot-0 to mmc subsystem */
120 err = davinci_mmc_init(bis, &mmc_sd0);
121 if (err)
122 return err;
123
124 #ifdef CONFIG_DAVINCI_MMC_SD1
125 #define PUPDCTL1 0x01c4007c
126 /* PINMUX(4)-DAT0-3/CMD; PINMUX(0)-CLK */
127 writel((readl(PINMUX4) | 0x55400000), PINMUX4);
128 writel((readl(PINMUX0) | 0x00010000), PINMUX0);
129
130 /* Configure MMC/SD pins as pullup */
131 writel((readl(PUPDCTL1) & ~0x07c0), PUPDCTL1);
132
133 /* Add slot-1 to mmc subsystem */
134 err = davinci_mmc_init(bis, &mmc_sd1);
135 #endif
136
137 return err;
138 }
139 #endif