board/eltec/bab7xx/bab7xx.c

   1 /*
   2  * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   3  * Andreas Heppel <aheppel@sysgo.de>
   4  * (C) Copyright 2001 ELTEC Elektronik AG
   5  * Frank Gottschling <fgottschling@eltec.de>
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 #include <common.h>
  27 #include <command.h>
  28 #include <mpc106.h>
  29 #include <mk48t59.h>
  30 #include <74xx_7xx.h>
  31 #include <ns87308.h>
  32 #include <video_fb.h>
  33
  34 /*---------------------------------------------------------------------------*/
  35 /*
  36  * Get Bus clock frequency
  37  */
  38 ulong bab7xx_get_bus_freq (void)
  39 {
  40     /*
  41      * The GPIO Port 1 on BAB7xx reflects the bus speed.
  42      */
  43     volatile struct GPIO *gpio = (struct GPIO *)(CFG_ISA_IO + CFG_NS87308_GPIO_BASE);
  44
  45     unsigned char data = gpio->dta1;
  46
  47     if (data & 0x02)
  48         return 66666666;
  49
  50     return 83333333;
  51 }
  52
  53 /*---------------------------------------------------------------------------*/
  54
  55 /*
  56  * Measure CPU clock speed (core clock GCLK1) (Approx. GCLK frequency in Hz)
  57  */
  58 ulong bab7xx_get_gclk_freq (void)
  59 {
  60     static const int pllratio_to_factor[] = {
  61         00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35, 00,
  62     };
  63
  64     return pllratio_to_factor[get_hid1 () >> 28] * (bab7xx_get_bus_freq() / 10);
  65 }
  66
  67 /*----------------------------------------------------------------------------*/
  68
  69 int checkcpu (void)
  70 {
  71     uint pvr  = get_pvr();
  72
  73     printf ("MPC7xx V%d.%d",(pvr >> 8) & 0xFF, pvr & 0xFF);
  74     printf (" at %ld / %ld MHz\n",  bab7xx_get_gclk_freq()/1000000,
  75             bab7xx_get_bus_freq()/1000000);
  76
  77     return (0);
  78 }
  79
  80 /* ------------------------------------------------------------------------- */
  81
  82 int checkboard (void)
  83 {
  84 #ifdef CFG_ADDRESS_MAP_A
  85     puts ("Board: ELTEC BAB7xx PReP\n");
  86 #else
  87     puts ("Board: ELTEC BAB7xx CHRP\n");
  88 #endif
  89     return (0);
  90 }
  91
  92 /* ------------------------------------------------------------------------- */
  93
  94 int checkflash (void)
  95 {
  96     /* TODO: XXX XXX XXX */
  97     printf ("2 MB ## Test not implemented yet ##\n");
  98     return (0);
  99 }
 100
 101 /* ------------------------------------------------------------------------- */
 102
 103
 104 static unsigned int mpc106_read_cfg_dword (unsigned int reg)
 105 {
 106     unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
 107
 108     out32r(MPC106_REG_ADDR, reg_addr);
 109
 110     return (in32r(MPC106_REG_DATA | (reg & 0x3)));
 111 }
 112
 113 /* ------------------------------------------------------------------------- */
 114
 115 long int dram_size (int board_type)
 116 {
 117     /* No actual initialisation to do - done when setting up
 118      * PICRs MCCRs ME/SARs etc in ram_init.S.
 119      */
 120
 121     register unsigned long i, msar1, mear1, memSize;
 122
 123 #if defined(CFG_MEMTEST)
 124     register unsigned long reg;
 125
 126     printf("Testing DRAM\n");
 127
 128     /* write each mem addr with it's address */
 129     for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4)
 130     *reg = reg;
 131
 132     for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4)
 133     {
 134         if (*reg != reg)
 135             return -1;
 136     }
 137 #endif
 138
 139     /*
 140     * Since MPC106 memory controller chip has already been set to
 141     * control all memory, just read and interpret its memory boundery register.
 142     */
 143     memSize = 0;
 144     msar1 = mpc106_read_cfg_dword(MPC106_MSAR1);
 145     mear1 = mpc106_read_cfg_dword(MPC106_MEAR1);
 146     i     = mpc106_read_cfg_dword(MPC106_MBER) & 0xf;
 147
 148     do
 149     {
 150         if (i & 0x01)   /* is bank enabled ? */
 151             memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
 152         msar1 >>= 8;
 153         mear1 >>= 8;
 154         i     >>= 1;
 155     } while (i);
 156
 157     return (memSize * 0x100000);
 158 }
 159
 160 /* ------------------------------------------------------------------------- */
 161
 162 long int initdram(int board_type)
 163 {
 164     return dram_size(board_type);
 165 }
 166
 167 /* ------------------------------------------------------------------------- */
 168
 169 void after_reloc (ulong dest_addr)
 170 {
 171     DECLARE_GLOBAL_DATA_PTR;
 172
 173     /*
 174      * Jump to the main U-Boot board init code
 175      */
 176     board_init_r((gd_t *)gd, dest_addr);
 177 }
 178
 179 /* ------------------------------------------------------------------------- */
 180
 181 /*
 182  * do_reset is done here because in this case it is board specific, since the
 183  * 7xx CPUs can only be reset by external HW (the RTC in this case).
 184  */
 185 void
 186 do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 187 {
 188 #if defined(CONFIG_RTC_MK48T59)
 189     /* trigger watchdog immediately */
 190     rtc_set_watchdog(1, RTC_WD_RB_16TH);
 191 #else
 192     #error "You must define the macro CONFIG_RTC_MK48T59."
 193 #endif
 194 }
 195
 196 /* ------------------------------------------------------------------------- */
 197
 198 #if defined(CONFIG_WATCHDOG)
 199 /*
 200  * Since the 7xx CPUs don't have an internal watchdog, this function is
 201  * board specific.  We use the RTC here.
 202  */
 203 void watchdog_reset(void)
 204 {
 205 #if defined(CONFIG_RTC_MK48T59)
 206     /* we use a 32 sec watchdog timer */
 207     rtc_set_watchdog(8, RTC_WD_RB_4);
 208 #else
 209     #error "You must define the macro CONFIG_RTC_MK48T59."
 210 #endif
 211 }
 212 #endif    /* CONFIG_WATCHDOG */
 213
 214 /* ------------------------------------------------------------------------- */
 215
 216 #ifdef CONFIG_CONSOLE_EXTRA_INFO
 217 extern GraphicDevice smi;
 218
 219 void video_get_info_str (int line_number, char *info)
 220 {
 221     /* init video info strings for graphic console */
 222     switch (line_number)
 223     {
 224     case 1:
 225         sprintf (info," MPC7xx V%d.%d at %ld / %ld MHz",
 226             (get_pvr() >> 8) & 0xFF,
 227             get_pvr() & 0xFF,
 228             bab7xx_get_gclk_freq()/1000000,
 229             bab7xx_get_bus_freq()/1000000);
 230         return;
 231     case 2:
 232         sprintf (info, " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH",
 233             dram_size(0)/0x100000,
 234             flash_init()/0x100000);
 235         return;
 236     case 3:
 237         sprintf (info, " %s", smi.modeIdent);
 238         return;
 239     }
 240
 241     /* no more info lines */
 242     *info = 0;
 243     return;
 244 }
 245 #endif
 246
 247 /*---------------------------------------------------------------------------*/