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git.ipfire.org Git - people/ms/u-boot.git/blob - board/emk/top5200/top5200.c
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de
8 * SPDX-License-Identifier: GPL-2.0+
15 /*****************************************************************************
16 * initialize SDRAM/DDRAM controller.
17 * TBD: get data from I2C EEPROM
18 *****************************************************************************/
19 phys_size_t
initdram (int board_type
)
22 #ifndef CONFIG_SYS_RAMBOOT
28 #define MODE_EN 0x80000000
32 /* configure SDRAM start/end */
33 *(vu_long
*)MPC5XXX_SDRAM_CS0CFG
= (CONFIG_SYS_SDRAM_BASE
& 0xFFF00000) | CONFIG_SYS_DRAM_RAM_SIZE
;
34 *(vu_long
*)MPC5XXX_SDRAM_CS1CFG
= 0x80000000; /* disabled */
36 /* setup config registers */
37 *(vu_long
*)MPC5XXX_SDRAM_CONFIG1
= CONFIG_SYS_DRAM_CONFIG1
;
38 *(vu_long
*)MPC5XXX_SDRAM_CONFIG2
= CONFIG_SYS_DRAM_CONFIG2
;
40 /* unlock mode register */
41 *(vu_long
*)MPC5XXX_SDRAM_CTRL
= CONFIG_SYS_DRAM_CONTROL
| MODE_EN
;
42 /* precharge all banks */
43 *(vu_long
*)MPC5XXX_SDRAM_CTRL
= CONFIG_SYS_DRAM_CONTROL
| MODE_EN
| SOFT_PRE
;
44 #ifdef CONFIG_SYS_DRAM_DDR
45 /* set extended mode register */
46 *(vu_short
*)MPC5XXX_SDRAM_MODE
= CONFIG_SYS_DRAM_EMODE
;
48 /* set mode register */
49 *(vu_short
*)MPC5XXX_SDRAM_MODE
= CONFIG_SYS_DRAM_MODE
| 0x0400;
50 /* precharge all banks */
51 *(vu_long
*)MPC5XXX_SDRAM_CTRL
= CONFIG_SYS_DRAM_CONTROL
| MODE_EN
| SOFT_PRE
;
53 *(vu_long
*)MPC5XXX_SDRAM_CTRL
= CONFIG_SYS_DRAM_CONTROL
| MODE_EN
| SOFT_REF
;
54 /* set mode register */
55 *(vu_short
*)MPC5XXX_SDRAM_MODE
= CONFIG_SYS_DRAM_MODE
;
56 /* normal operation */
57 *(vu_long
*)MPC5XXX_SDRAM_CTRL
= CONFIG_SYS_DRAM_CONTROL
;
58 /* write default TAP delay */
59 *(vu_long
*)MPC5XXX_CDM_PORCFG
= CONFIG_SYS_DRAM_TAP_DEL
<< 24;
62 for (tap_del
= 0; tap_del
< 32; tap_del
++)
64 *(vu_long
*)MPC5XXX_CDM_PORCFG
= tap_del
<< 24;
66 printf ("\nTAP Delay:%x Filling DRAM...", *(vu_long
*)MPC5XXX_CDM_PORCFG
);
67 for (t
= 0; t
< 0x04000000; t
+=4)
69 printf ("Checking DRAM...\n");
70 for (t
= 0; t
< 0x04000000; t
+=4)
72 ulong rval
= *(vu_long
*) t
;
75 printf ("mismatch at %x: ", t
);
76 printf (" 1.read %x", rval
);
77 printf (" 2.read %x", *(vu_long
*) t
);
78 printf (" 3.read %x", *(vu_long
*) t
);
84 #endif /* CONFIG_SYS_RAMBOOT */
86 dramsize
= ((1 << (*(vu_long
*)MPC5XXX_SDRAM_CS0CFG
- 0x13)) << 20);
88 /* return total ram size */
92 /*****************************************************************************
93 * print board identification
94 *****************************************************************************/
97 #if defined (CONFIG_EVAL5200)
98 puts ("Board: EMK TOP5200 on EVAL5200\n");
100 #if defined (CONFIG_LITE5200)
101 puts ("Board: LITE5200\n");
103 #if defined (CONFIG_MINI5200)
104 puts ("Board: EMK TOP5200 on MINI5200\n");
106 puts ("Board: EMK TOP5200\n");
113 /*****************************************************************************
114 * prepare for FLASH detection
115 *****************************************************************************/
116 void flash_preinit(void)
119 * Now, when we are in RAM, enable flash write
120 * access for detection process.
121 * Note that CS_BOOT cannot be cleared when
122 * executing in flash.
124 *(vu_long
*)MPC5XXX_BOOTCS_CFG
&= ~0x1; /* clear RO */
127 /*****************************************************************************
128 * finalize FLASH setup
129 *****************************************************************************/
130 void flash_afterinit(uint bank
, ulong start
, ulong size
)
132 if (bank
== 0) { /* adjust mapping */
133 *(vu_long
*)MPC5XXX_BOOTCS_START
=
134 *(vu_long
*)MPC5XXX_CS0_START
= START_REG(start
);
135 *(vu_long
*)MPC5XXX_BOOTCS_STOP
=
136 *(vu_long
*)MPC5XXX_CS0_STOP
= STOP_REG(start
, size
);
140 /*****************************************************************************
141 * otherinits after RAM is there and we are relocated to RAM
142 * note: though this is an int function, nobody cares for the result!
143 *****************************************************************************/
144 int misc_init_r (void)
146 #if !defined (CONFIG_LITE5200)
147 /* read 'factory' part of EEPROM */
148 extern void read_factory_r (void);
154 /*****************************************************************************
155 * initialize the PCI system
156 *****************************************************************************/
158 static struct pci_controller hose
;
160 extern void pci_mpc5xxx_init(struct pci_controller
*);
162 void pci_init_board(void)
164 pci_mpc5xxx_init(&hose
);
168 /*****************************************************************************
169 * provide the IDE Reset Function
170 *****************************************************************************/
171 #if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
173 void init_ide_reset (void)
175 debug ("init_ide_reset\n");
177 /* Configure PSC1_4 as GPIO output for ATA reset */
178 *(vu_long
*) MPC5XXX_WU_GPIO_ENABLE
|= GPIO_PSC1_4
;
179 *(vu_long
*) MPC5XXX_WU_GPIO_DIR
|= GPIO_PSC1_4
;
182 void ide_set_reset (int idereset
)
184 debug ("ide_reset(%d)\n", idereset
);
187 *(vu_long
*) MPC5XXX_WU_GPIO_DATA_O
&= ~GPIO_PSC1_4
;
189 *(vu_long
*) MPC5XXX_WU_GPIO_DATA_O
|= GPIO_PSC1_4
;