2 * (C) Copyright 2005-2007
3 * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
5 * SPDX-License-Identifier: GPL-2.0+
9 #include <asm/processor.h>
14 DECLARE_GLOBAL_DATA_PTR
;
16 extern void lxt971_no_sleep(void);
18 int board_early_init_f (void)
21 * IRQ 0-15 405GP internally generated; active high; level sensitive
22 * IRQ 16 405GP internally generated; active low; level sensitive
24 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
25 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
26 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
27 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
28 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
29 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
30 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
32 mtdcr(UIC0SR
, 0xFFFFFFFF); /* clear all ints */
33 mtdcr(UIC0ER
, 0x00000000); /* disable all ints */
34 mtdcr(UIC0CR
, 0x00000000); /* set all to be non-critical*/
35 mtdcr(UIC0PR
, 0xFFFFFF80); /* set int polarities */
36 mtdcr(UIC0TR
, 0x10000000); /* set int trigger levels */
37 mtdcr(UIC0VCR
, 0x00000001); /* set vect base=0,INT0 highest priority*/
38 mtdcr(UIC0SR
, 0xFFFFFFFF); /* clear all ints */
41 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
43 mtebc (EBC0_CFG
, 0xa8400000); /* ebc always driven */
46 * Reset CPLD via GPIO12 (CS3) pin
48 out_be32((void *)GPIO0_OR
, in_be32((void *)GPIO0_OR
) & ~CONFIG_SYS_PLD_RESET
);
49 udelay(1000); /* wait 1ms */
50 out_be32((void *)GPIO0_OR
, in_be32((void *)GPIO0_OR
) | CONFIG_SYS_PLD_RESET
);
51 udelay(1000); /* wait 1ms */
56 int misc_init_r (void)
58 /* adjust flash start and offset */
59 gd
->bd
->bi_flashstart
= 0 - gd
->bd
->bi_flashsize
;
60 gd
->bd
->bi_flashoffset
= 0;
63 * Setup and enable EEPROM write protection
65 out_be32((void *)GPIO0_OR
, in_be32((void *)GPIO0_OR
) | CONFIG_SYS_EEPROM_WP
);
72 * Check Board Identity:
74 #define LED_REG (CONFIG_SYS_PLD_BASE + 0x1000)
83 if (getenv_f("serial#", str
, sizeof(str
)) == -1) {
84 puts ("### No HW ID - assuming CMS700");
89 printf(" (PLD-Version=%02d)\n",
90 in_8((void *)(CONFIG_SYS_PLD_BASE
+ 0x1001)));
95 for (flashcnt
= 0; flashcnt
< 3; flashcnt
++) {
96 out_8((void *)LED_REG
, 0x00); /* LEDs off */
97 for (delay
= 0; delay
< 100; delay
++)
99 out_8((void *)LED_REG
, 0x0f); /* LEDs on */
100 for (delay
= 0; delay
< 50; delay
++)
103 out_8((void *)LED_REG
, 0x70);
108 /* ------------------------------------------------------------------------- */
110 #if defined(CONFIG_SYS_EEPROM_WREN)
111 /* Input: <dev_addr> I2C address of EEPROM device to enable.
112 * <state> -1: deliver current state
115 * Returns: -1: wrong device address
116 * 0: dis-/en- able done
117 * 0/1: current state if <state> was -1.
119 int eeprom_write_enable (unsigned dev_addr
, int state
)
121 if (CONFIG_SYS_I2C_EEPROM_ADDR
!= dev_addr
) {
126 /* Enable write access, clear bit GPIO_SINT2. */
127 out_be32((void *)GPIO0_OR
, in_be32((void *)GPIO0_OR
) & ~CONFIG_SYS_EEPROM_WP
);
131 /* Disable write access, set bit GPIO_SINT2. */
132 out_be32((void *)GPIO0_OR
, in_be32((void *)GPIO0_OR
) | CONFIG_SYS_EEPROM_WP
);
136 /* Read current status back. */
137 state
= (0 == (in_be32((void *)GPIO0_OR
) & CONFIG_SYS_EEPROM_WP
));
144 int do_eep_wren (cmd_tbl_t
*cmdtp
, int flag
, int argc
, char * const argv
[])
146 int query
= argc
== 1;
150 /* Query write access state. */
151 state
= eeprom_write_enable (CONFIG_SYS_I2C_EEPROM_ADDR
, -1);
153 puts ("Query of write access state failed.\n");
155 printf ("Write access for device 0x%0x is %sabled.\n",
156 CONFIG_SYS_I2C_EEPROM_ADDR
, state
? "en" : "dis");
160 if ('0' == argv
[1][0]) {
161 /* Disable write access. */
162 state
= eeprom_write_enable (CONFIG_SYS_I2C_EEPROM_ADDR
, 0);
164 /* Enable write access. */
165 state
= eeprom_write_enable (CONFIG_SYS_I2C_EEPROM_ADDR
, 1);
168 puts ("Setup of write access state failed.\n");
175 U_BOOT_CMD(eepwren
, 2, 0, do_eep_wren
,
176 "Enable / disable / query EEPROM write access",
179 #endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */
181 /* ------------------------------------------------------------------------- */
185 #ifdef CONFIG_LXT971_NO_SLEEP
188 * Disable sleep mode in LXT971