board/esd/wuh405/wuh405.c

   1 /*
   2  * (C) Copyright 2001-2003
   3  * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <asm/processor.h>
  26 #include <command.h>
  27 #include <malloc.h>
  28
  29 /* ------------------------------------------------------------------------- */
  30
  31 #if 0
  32 #define FPGA_DEBUG
  33 #endif
  34
  35 extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
  36
  37 /* fpga configuration data - gzip compressed and generated by bin2c */
  38 const unsigned char fpgadata[] =
  39 {
  40 #include "fpgadata.c"
  41 };
  42
  43 /*
  44  * include common fpga code (for esd boards)
  45  */
  46 #include "../common/fpga.c"
  47
  48
  49 /* Prototypes */
  50 int gunzip(void *, int, unsigned char *, unsigned long *);
  51
  52
  53 int board_early_init_f (void)
  54 {
  55         /*
  56          * IRQ 0-15  405GP internally generated; active high; level sensitive
  57          * IRQ 16    405GP internally generated; active low; level sensitive
  58          * IRQ 17-24 RESERVED
  59          * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
  60          * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
  61          * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
  62          * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
  63          * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
  64          * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
  65          * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
  66          */
  67         mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
  68         mtdcr(uicer, 0x00000000);       /* disable all ints */
  69         mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
  70         mtdcr(uicpr, 0xFFFFFF9F);       /* set int polarities */
  71         mtdcr(uictr, 0x10000000);       /* set int trigger levels */
  72         mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
  73         mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
  74
  75         /*
  76          * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
  77          */
  78         mtebc (epcr, 0xa8400000); /* ebc always driven */
  79
  80         return 0;
  81 }
  82
  83 int misc_init_r (void)
  84 {
  85         volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
  86         volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
  87         volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4);
  88         volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4);
  89         unsigned char *dst;
  90         ulong len = sizeof(fpgadata);
  91         int status;
  92         int index;
  93         int i;
  94
  95         dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
  96         if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
  97                 printf ("GUNZIP ERROR - must RESET board to recover\n");
  98                 do_reset (NULL, 0, 0, NULL);
  99         }
 100
 101         status = fpga_boot(dst, len);
 102         if (status != 0) {
 103                 printf("\nFPGA: Booting failed ");
 104                 switch (status) {
 105                 case ERROR_FPGA_PRG_INIT_LOW:
 106                         printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
 107                         break;
 108                 case ERROR_FPGA_PRG_INIT_HIGH:
 109                         printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
 110                         break;
 111                 case ERROR_FPGA_PRG_DONE:
 112                         printf("(Timeout: DONE not high after programming FPGA)\n ");
 113                         break;
 114                 }
 115
 116                 /* display infos on fpgaimage */
 117                 index = 15;
 118                 for (i=0; i<4; i++) {
 119                         len = dst[index];
 120                         printf("FPGA: %s\n", &(dst[index+1]));
 121                         index += len+3;
 122                 }
 123                 putc ('\n');
 124                 /* delayed reboot */
 125                 for (i=20; i>0; i--) {
 126                         printf("Rebooting in %2d seconds \r",i);
 127                         for (index=0;index<1000;index++)
 128                                 udelay(1000);
 129                 }
 130                 putc ('\n');
 131                 do_reset(NULL, 0, 0, NULL);
 132         }
 133
 134         puts("FPGA:  ");
 135
 136         /* display infos on fpgaimage */
 137         index = 15;
 138         for (i=0; i<4; i++) {
 139                 len = dst[index];
 140                 printf("%s ", &(dst[index+1]));
 141                 index += len+3;
 142         }
 143         putc ('\n');
 144
 145         free(dst);
 146
 147         /*
 148          * Reset FPGA via FPGA_DATA pin
 149          */
 150         SET_FPGA(FPGA_PRG | FPGA_CLK);
 151         udelay(1000); /* wait 1ms */
 152         SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
 153         udelay(1000); /* wait 1ms */
 154
 155         /*
 156          * Reset external DUARTs
 157          */
 158         out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_DUART_RST); /* set reset to high */
 159         udelay(10); /* wait 10us */
 160         out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_DUART_RST); /* set reset to low */
 161         udelay(1000); /* wait 1ms */
 162
 163         /*
 164          * Enable interrupts in exar duart mcr[3]
 165          */
 166         *duart0_mcr = 0x08;
 167         *duart1_mcr = 0x08;
 168         *duart2_mcr = 0x08;
 169         *duart3_mcr = 0x08;
 170
 171         return (0);
 172 }
 173
 174
 175 /*
 176  * Check Board Identity:
 177  */
 178
 179 int checkboard (void)
 180 {
 181         char str[64];
 182         int i = getenv_r ("serial#", str, sizeof(str));
 183
 184         puts ("Board: ");
 185
 186         if (i == -1) {
 187                 puts ("### No HW ID - assuming WUH405");
 188         } else {
 189                 puts(str);
 190         }
 191
 192         putc ('\n');
 193
 194         return 0;
 195 }