board/freescale/m5329evb/nand.c

   1 /*
   2  * (C) Copyright 2000-2003
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
   6  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #include <config.h>
  28 #include <common.h>
  29 #include <asm/io.h>
  30 #include <asm/immap.h>
  31
  32 DECLARE_GLOBAL_DATA_PTR;
  33
  34 #if defined(CONFIG_CMD_NAND)
  35 #include <nand.h>
  36 #include <linux/mtd/mtd.h>
  37
  38 #define SET_CLE         0x10
  39 #define CLR_CLE         ~SET_CLE
  40 #define SET_ALE         0x08
  41 #define CLR_ALE         ~SET_ALE
  42
  43 static void nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  44 {
  45         struct nand_chip *this = mtdinfo->priv;
  46 /*      volatile fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS; TODO: handle wp */
  47         u32 nand_baseaddr = (u32) this->IO_ADDR_W;
  48
  49         if (ctrl & NAND_CTRL_CHANGE) {
  50                 if ( ctrl & NAND_CLE )
  51                         nand_baseaddr |= SET_CLE;
  52                 else
  53                         nand_baseaddr &= CLR_CLE;
  54                 if ( ctrl & NAND_ALE )
  55                         nand_baseaddr |= SET_ALE;
  56                 else
  57                         nand_baseaddr &= CLR_ALE;
  58         }
  59         this->IO_ADDR_W = (void __iomem *)(nand_baseaddr);
  60
  61         if (cmd != NAND_CMD_NONE)
  62                 writeb(cmd, this->IO_ADDR_W);
  63 }
  64
  65 static void nand_write_byte(struct mtd_info *mtdinfo, u_char byte)
  66 {
  67         struct nand_chip *this = mtdinfo->priv;
  68         *((volatile u8 *)(this->IO_ADDR_W)) = byte;
  69 }
  70
  71 static u8 nand_read_byte(struct mtd_info *mtdinfo)
  72 {
  73         struct nand_chip *this = mtdinfo->priv;
  74         return (u8) (*((volatile u8 *)this->IO_ADDR_R));
  75 }
  76
  77 static int nand_dev_ready(struct mtd_info *mtdinfo)
  78 {
  79         return 1;
  80 }
  81
  82 int board_nand_init(struct nand_chip *nand)
  83 {
  84         volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
  85
  86         *((volatile u16 *)CFG_LATCH_ADDR) |= 0x0004;
  87
  88         /* set up pin configuration */
  89         gpio->par_timer &= ~GPIO_PAR_TIN3_TIN3;
  90         gpio->pddr_timer |= 0x08;
  91         gpio->ppd_timer |= 0x08;
  92         gpio->pclrr_timer = 0;
  93         gpio->podr_timer = 0;
  94
  95         nand->chip_delay = 50;
  96         nand->ecc.mode = NAND_ECC_SOFT;
  97         nand->cmd_ctrl = nand_hwcontrol;
  98         nand->read_byte = nand_read_byte;
  99         nand->write_byte = nand_write_byte;
 100         nand->dev_ready = nand_dev_ready;
 101
 102         return 0;
 103 }
 104 #endif