2 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
3 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/immap.h>
31 DECLARE_GLOBAL_DATA_PTR
;
33 #if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
37 int fecpin_setclear(struct eth_device
*dev
, int setclear
)
39 volatile gpio_t
*gpio
= (gpio_t
*) MMAP_GPIO
;
40 struct fec_info_s
*info
= (struct fec_info_s
*)dev
->priv
;
44 (GPIO_PAR_FECI2C_MDC0_MDC0
| GPIO_PAR_FECI2C_MDIO0_MDIO0
);
46 if (info
->iobase
== CONFIG_SYS_FEC0_IOBASE
)
47 gpio
->par_fec
|= GPIO_PAR_FEC_FEC0_RMII_GPIO
;
49 gpio
->par_fec
|= GPIO_PAR_FEC_FEC1_RMII_ATA
;
52 ~(GPIO_PAR_FECI2C_MDC0_MDC0
| GPIO_PAR_FECI2C_MDIO0_MDIO0
);
54 if (info
->iobase
== CONFIG_SYS_FEC0_IOBASE
)
55 gpio
->par_fec
&= GPIO_PAR_FEC_FEC0_MASK
;
57 gpio
->par_fec
&= GPIO_PAR_FEC_FEC1_MASK
;
62 #if defined(CONFIG_SYS_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
65 /* Make MII read/write commands for the FEC. */
66 #define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | (REG & 0x1f) << 18))
68 #define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | (REG & 0x1f) << 18) | (VAL & 0xffff))
70 /* PHY identification */
71 #define PHY_ID_KSZ8041NL 0x00221512
72 #define STR_ID_KSZ8041NL "KSZ8041NL"
74 /****************************************************************************
75 * mii_init -- Initialize the MII for MII command without ethernet
76 * This function is a subset of eth_init
77 ****************************************************************************
79 void mii_reset(struct fec_info_s
*info
)
81 volatile fec_t
*fecp
= (fec_t
*) (info
->miibase
);
82 struct eth_device
*dev
;
88 miispd
= (gd
->bus_clk
/ 1000000) / 5;
89 fecp
->mscr
= miispd
<< 1;
91 miiphy_write(dev
->name
, info
->phy_addr
, PHY_BMCR
, PHY_BMCR_RESET
);
92 for (i
= 0; i
< FEC_RESET_DELAY
; ++i
) {
94 miiphy_read(dev
->name
, info
->phy_addr
, PHY_BMCR
, &rst
);
95 if ((rst
& PHY_BMCR_RESET
) == 0)
98 if (i
== FEC_RESET_DELAY
)
99 printf("Mii reset timeout %d\n", i
);
102 /* send command to phy using mii, wait for result */
103 uint
mii_send(uint mii_cmd
)
105 struct fec_info_s
*info
;
106 struct eth_device
*dev
;
111 /* retrieve from register structure */
115 ep
= (fec_t
*) info
->miibase
;
117 ep
->mmfr
= mii_cmd
; /* command to phy */
119 /* wait for mii complete */
120 while (!(ep
->eir
& FEC_EIR_MII
) && (j
< MCFFEC_TOUT_LOOP
)) {
124 if (j
>= MCFFEC_TOUT_LOOP
) {
125 printf("MII not complete\n");
129 mii_reply
= ep
->mmfr
; /* result from phy */
130 ep
->eir
= FEC_EIR_MII
; /* clear MII complete */
132 printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
133 __FILE__
, __LINE__
, __FUNCTION__
, mii_cmd
, mii_reply
);
136 return (mii_reply
& 0xffff); /* data read from phy */
138 #endif /* CONFIG_SYS_DISCOVER_PHY || (CONFIG_MII) */
140 #if defined(CONFIG_SYS_DISCOVER_PHY)
141 int mii_discover_phy(struct eth_device
*dev
)
143 #define MAX_PHY_PASSES 11
144 struct fec_info_s
*info
= dev
->priv
;
148 if (info
->phyname_init
)
149 return info
->phy_addr
;
151 phyaddr
= -1; /* didn't find a PHY yet */
152 for (pass
= 1; pass
<= MAX_PHY_PASSES
&& phyaddr
< 0; ++pass
) {
154 /* PHY may need more time to recover from reset.
155 * The LXT970 needs 50ms typical, no maximum is
156 * specified, so wait 10ms before try again.
157 * With 11 passes this gives it 100ms to wake up.
159 udelay(10000); /* wait 10ms */
162 for (phyno
= 0; phyno
< 32 && phyaddr
< 0; ++phyno
) {
164 phytype
= mii_send(mk_mii_read(phyno
, PHY_PHYIDR1
));
166 printf("PHY type 0x%x pass %d type\n", phytype
, pass
);
168 if (phytype
!= 0xffff) {
172 mii_send(mk_mii_read(phyno
, PHY_PHYIDR2
));
174 switch (phytype
& 0xffffffff) {
175 case PHY_ID_KSZ8041NL
:
176 strcpy(info
->phy_name
,
178 info
->phyname_init
= 1;
181 strcpy(info
->phy_name
, "unknown");
182 info
->phyname_init
= 1;
187 printf("PHY @ 0x%x pass %d type ", phyno
, pass
);
188 switch (phytype
& 0xffffffff) {
189 case PHY_ID_KSZ8041NL
:
190 printf(STR_ID_KSZ8041NL
);
193 printf("0x%08x\n", phytype
);
201 printf("No PHY device found.\n");
205 #endif /* CONFIG_SYS_DISCOVER_PHY */
207 void mii_init(void) __attribute__ ((weak
, alias("__mii_init")));
209 void __mii_init(void)
211 volatile fec_t
*fecp
;
212 struct fec_info_s
*info
;
213 struct eth_device
*dev
;
214 int miispd
= 0, i
= 0;
217 /* retrieve from register structure */
221 fecp
= (fec_t
*) info
->miibase
;
223 /* We use strictly polling mode only */
226 /* Clear any pending interrupt */
227 fecp
->eir
= 0xffffffff;
230 miispd
= (gd
->bus_clk
/ 1000000) / 5;
231 fecp
->mscr
= miispd
<< 1;
233 info
->phy_addr
= mii_discover_phy(dev
);
235 #define AUTONEGLINK (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)
236 while (i
< MCFFEC_TOUT_LOOP
) {
238 miiphy_read(dev
->name
, info
->phy_addr
, PHY_BMSR
, &autoneg
);
241 if ((autoneg
& AUTONEGLINK
) == AUTONEGLINK
)
246 if (i
>= MCFFEC_TOUT_LOOP
) {
247 printf("Auto Negotiation not complete\n");
250 /* adapt to the half/full speed settings */
251 info
->dup_spd
= miiphy_duplex(dev
->name
, info
->phy_addr
) << 16;
252 info
->dup_spd
|= miiphy_speed(dev
->name
, info
->phy_addr
);
255 /*****************************************************************************
256 * Read and write a MII PHY register, routines used by MII Utilities
258 * FIXME: These routines are expected to return 0 on success, but mii_send
259 * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
260 * no PHY connected...
261 * For now always return 0.
262 * FIXME: These routines only work after calling eth_init() at least once!
263 * Otherwise they hang in mii_send() !!! Sorry!
264 *****************************************************************************/
266 int mcffec_miiphy_read(char *devname
, unsigned char addr
, unsigned char reg
,
267 unsigned short *value
)
269 short rdreg
; /* register working value */
272 printf("miiphy_read(0x%x) @ 0x%x = ", reg
, addr
);
274 rdreg
= mii_send(mk_mii_read(addr
, reg
));
279 printf("0x%04x\n", *value
);
285 int mcffec_miiphy_write(char *devname
, unsigned char addr
, unsigned char reg
,
286 unsigned short value
)
288 short rdreg
; /* register working value */
291 printf("miiphy_write(0x%x) @ 0x%x = ", reg
, addr
);
294 rdreg
= mii_send(mk_mii_write(addr
, reg
, value
));
297 printf("0x%04x\n", value
);
303 #endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */