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1 /*
2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
4 *
5 * Based on imx27lite.c:
6 * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
7 * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
8 * And:
9 * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
10 *
11 * SPDX-License-Identifier: GPL-2.0+
12 */
13 #include <common.h>
14 #include <asm/io.h>
15 #include <asm/arch/imx-regs.h>
16 #include <asm/arch/iomux-mx25.h>
17 #include <asm/gpio.h>
18
19 DECLARE_GLOBAL_DATA_PTR;
20
21 #ifdef CONFIG_SPL_BUILD
22 void board_init_f(ulong bootflag)
23 {
24 /*
25 * copy ourselves from where we are running to where we were
26 * linked at. Use ulong pointers as all addresses involved
27 * are 4-byte-aligned.
28 */
29 ulong *start_ptr, *end_ptr, *link_ptr, *run_ptr, *dst;
30 asm volatile ("ldr %0, =_start" : "=r"(start_ptr));
31 asm volatile ("ldr %0, =_end" : "=r"(end_ptr));
32 asm volatile ("ldr %0, =board_init_f" : "=r"(link_ptr));
33 asm volatile ("adr %0, board_init_f" : "=r"(run_ptr));
34 for (dst = start_ptr; dst < end_ptr; dst++)
35 *dst = *(dst+(run_ptr-link_ptr));
36 /*
37 * branch to nand_boot's link-time address.
38 */
39 asm volatile("ldr pc, =nand_boot");
40 }
41 #endif
42
43 #ifdef CONFIG_FEC_MXC
44 /*
45 * FIXME: need to revisit this
46 * The original code enabled PUE and 100-k pull-down without PKE, so the right
47 * value here is likely:
48 * 0 for no pull
49 * or:
50 * PAD_CTL_PUS_100K_DOWN for 100-k pull-down
51 */
52 #define FEC_OUT_PAD_CTRL 0
53
54 #define GPIO_FEC_RESET_B IMX_GPIO_NR(4, 7)
55 #define GPIO_FEC_ENABLE_B IMX_GPIO_NR(4, 9)
56
57 void tx25_fec_init(void)
58 {
59 static const iomux_v3_cfg_t fec_pads[] = {
60 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
61 MX25_PAD_FEC_RX_DV__FEC_RX_DV,
62 MX25_PAD_FEC_RDATA0__FEC_RDATA0,
63 NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL),
64 NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL),
65 NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL),
66 MX25_PAD_FEC_MDIO__FEC_MDIO,
67 MX25_PAD_FEC_RDATA1__FEC_RDATA1,
68 NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL),
69
70 NEW_PAD_CTRL(MX25_PAD_D13__GPIO_4_7, 0), /* FEC_RESET_B */
71 NEW_PAD_CTRL(MX25_PAD_D11__GPIO_4_9, 0), /* FEC_ENABLE_B */
72 };
73
74 static const iomux_v3_cfg_t fec_cfg_pads[] = {
75 MX25_PAD_FEC_RDATA0__GPIO_3_10,
76 MX25_PAD_FEC_RDATA1__GPIO_3_11,
77 MX25_PAD_FEC_RX_DV__GPIO_3_12,
78 };
79
80 debug("tx25_fec_init\n");
81 imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
82
83 /* drop PHY power and assert reset (low) */
84 gpio_direction_output(GPIO_FEC_RESET_B, 0);
85 gpio_direction_output(GPIO_FEC_ENABLE_B, 0);
86
87 mdelay(5);
88
89 debug("resetting phy\n");
90
91 /* turn on PHY power leaving reset asserted */
92 gpio_set_value(GPIO_FEC_ENABLE_B, 1);
93
94 mdelay(10);
95
96 /*
97 * Setup some strapping pins that are latched by the PHY
98 * as reset goes high.
99 *
100 * Set PHY mode to 111
101 * mode0 comes from FEC_RDATA0 which is GPIO 3_10 in mux mode 5
102 * mode1 comes from FEC_RDATA1 which is GPIO 3_11 in mux mode 5
103 * mode2 is tied high so nothing to do
104 *
105 * Turn on RMII mode
106 * RMII mode is selected by FEC_RX_DV which is GPIO 3_12 in mux mode
107 */
108 /*
109 * set each mux mode to gpio mode
110 */
111 imx_iomux_v3_setup_multiple_pads(fec_cfg_pads,
112 ARRAY_SIZE(fec_cfg_pads));
113
114 /*
115 * set each to 1 and make each an output
116 */
117 gpio_direction_output(IMX_GPIO_NR(3, 10), 1);
118 gpio_direction_output(IMX_GPIO_NR(3, 11), 1);
119 gpio_direction_output(IMX_GPIO_NR(3, 12), 1);
120
121 mdelay(22); /* this value came from RedBoot */
122
123 /*
124 * deassert PHY reset
125 */
126 gpio_set_value(GPIO_FEC_RESET_B, 1);
127
128 mdelay(5);
129
130 /*
131 * set FEC pins back
132 */
133 imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
134 }
135 #else
136 #define tx25_fec_init()
137 #endif
138
139 #ifdef CONFIG_MXC_UART
140 /*
141 * Set up input pins with hysteresis and 100-k pull-ups
142 */
143 #define UART1_IN_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP)
144 /*
145 * FIXME: need to revisit this
146 * The original code enabled PUE and 100-k pull-down without PKE, so the right
147 * value here is likely:
148 * 0 for no pull
149 * or:
150 * PAD_CTL_PUS_100K_DOWN for 100-k pull-down
151 */
152 #define UART1_OUT_PAD_CTRL 0
153
154 static void tx25_uart1_init(void)
155 {
156 static const iomux_v3_cfg_t uart1_pads[] = {
157 NEW_PAD_CTRL(MX25_PAD_UART1_RXD__UART1_RXD, UART1_IN_PAD_CTRL),
158 NEW_PAD_CTRL(MX25_PAD_UART1_TXD__UART1_TXD, UART1_OUT_PAD_CTRL),
159 NEW_PAD_CTRL(MX25_PAD_UART1_RTS__UART1_RTS, UART1_OUT_PAD_CTRL),
160 NEW_PAD_CTRL(MX25_PAD_UART1_CTS__UART1_CTS, UART1_IN_PAD_CTRL),
161 };
162
163 imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
164 }
165 #else
166 #define tx25_uart1_init()
167 #endif
168
169 int board_init()
170 {
171 tx25_uart1_init();
172
173 /* board id for linux */
174 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
175 return 0;
176 }
177
178 int board_late_init(void)
179 {
180 tx25_fec_init();
181 return 0;
182 }
183
184 int dram_init(void)
185 {
186 /* dram_init must store complete ramsize in gd->ram_size */
187 gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1,
188 PHYS_SDRAM_1_SIZE);
189 return 0;
190 }
191
192 void dram_init_banksize(void)
193 {
194 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
195 gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1,
196 PHYS_SDRAM_1_SIZE);
197 #if CONFIG_NR_DRAM_BANKS > 1
198 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
199 gd->bd->bi_dram[1].size = get_ram_size((void *)PHYS_SDRAM_2,
200 PHYS_SDRAM_2_SIZE);
201 #else
202
203 #endif
204 }
205
206 int checkboard(void)
207 {
208 printf("KARO TX25\n");
209 return 0;
210 }