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arm: mx6: novena: Pull GPIO definitions into header
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1 /*
2 * Novena board support
3 *
4 * Copyright (C) 2014 Marek Vasut <marex@denx.de>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #include <common.h>
10 #include <asm/errno.h>
11 #include <asm/gpio.h>
12 #include <asm/io.h>
13 #include <asm/arch/clock.h>
14 #include <asm/arch/crm_regs.h>
15 #include <asm/arch/imx-regs.h>
16 #include <asm/arch/iomux.h>
17 #include <asm/arch/mxc_hdmi.h>
18 #include <asm/arch/sys_proto.h>
19 #include <asm/imx-common/boot_mode.h>
20 #include <asm/imx-common/iomux-v3.h>
21 #include <asm/imx-common/mxc_i2c.h>
22 #include <asm/imx-common/sata.h>
23 #include <asm/imx-common/video.h>
24 #include <fsl_esdhc.h>
25 #include <i2c.h>
26 #include <input.h>
27 #include <ipu_pixfmt.h>
28 #include <linux/fb.h>
29 #include <linux/input.h>
30 #include <malloc.h>
31 #include <micrel.h>
32 #include <miiphy.h>
33 #include <mmc.h>
34 #include <netdev.h>
35 #include <power/pmic.h>
36 #include <power/pfuze100_pmic.h>
37 #include <stdio_dev.h>
38
39 #include "novena.h"
40
41 DECLARE_GLOBAL_DATA_PTR;
42
43 /*
44 * GPIO button
45 */
46 #ifdef CONFIG_KEYBOARD
47 static struct input_config button_input;
48
49 static int novena_gpio_button_read_keys(struct input_config *input)
50 {
51 int key = KEY_ENTER;
52 if (gpio_get_value(NOVENA_BUTTON_GPIO))
53 return 0;
54 input_send_keycodes(&button_input, &key, 1);
55 return 1;
56 }
57
58 static int novena_gpio_button_getc(struct stdio_dev *dev)
59 {
60 return input_getc(&button_input);
61 }
62
63 static int novena_gpio_button_tstc(struct stdio_dev *dev)
64 {
65 return input_tstc(&button_input);
66 }
67
68 static int novena_gpio_button_init(struct stdio_dev *dev)
69 {
70 gpio_direction_input(NOVENA_BUTTON_GPIO);
71 input_set_delays(&button_input, 250, 250);
72 return 0;
73 }
74
75 int drv_keyboard_init(void)
76 {
77 int error;
78 struct stdio_dev dev = {
79 .name = "button",
80 .flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM,
81 .start = novena_gpio_button_init,
82 .getc = novena_gpio_button_getc,
83 .tstc = novena_gpio_button_tstc,
84 };
85
86 error = input_init(&button_input, 0);
87 if (error) {
88 debug("%s: Cannot set up input\n", __func__);
89 return -1;
90 }
91 button_input.read_keys = novena_gpio_button_read_keys;
92
93 error = input_stdio_register(&dev);
94 if (error)
95 return error;
96
97 return 0;
98 }
99 #endif
100
101 /*
102 * SDHC
103 */
104 #ifdef CONFIG_FSL_ESDHC
105 static struct fsl_esdhc_cfg usdhc_cfg[] = {
106 { USDHC3_BASE_ADDR, 0, 4 }, /* Micro SD */
107 { USDHC2_BASE_ADDR, 0, 4 }, /* Big SD */
108 };
109
110 int board_mmc_getcd(struct mmc *mmc)
111 {
112 struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
113
114 /* There is no CD for a microSD card, assume always present. */
115 if (cfg->esdhc_base == USDHC3_BASE_ADDR)
116 return 1;
117 else
118 return !gpio_get_value(NOVENA_SD_CD);
119 }
120
121 int board_mmc_getwp(struct mmc *mmc)
122 {
123 struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
124
125 /* There is no WP for a microSD card, assume always read-write. */
126 if (cfg->esdhc_base == USDHC3_BASE_ADDR)
127 return 0;
128 else
129 return gpio_get_value(NOVENA_SD_WP);
130 }
131
132
133 int board_mmc_init(bd_t *bis)
134 {
135 s32 status = 0;
136 int index;
137
138 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
139 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
140
141 /* Big SD write-protect and card-detect */
142 gpio_direction_input(NOVENA_SD_WP);
143 gpio_direction_input(NOVENA_SD_CD);
144
145 for (index = 0; index < ARRAY_SIZE(usdhc_cfg); index++) {
146 status = fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
147 if (status)
148 return status;
149 }
150
151 return status;
152 }
153 #endif
154
155 /*
156 * Video over HDMI
157 */
158 #if defined(CONFIG_VIDEO_IPUV3)
159 static void enable_hdmi(struct display_info_t const *dev)
160 {
161 imx_enable_hdmi_phy();
162 }
163
164 struct display_info_t const displays[] = {
165 {
166 /* HDMI Output */
167 .bus = -1,
168 .addr = 0,
169 .pixfmt = IPU_PIX_FMT_RGB24,
170 .detect = detect_hdmi,
171 .enable = enable_hdmi,
172 .mode = {
173 .name = "HDMI",
174 .refresh = 60,
175 .xres = 1024,
176 .yres = 768,
177 .pixclock = 15385,
178 .left_margin = 220,
179 .right_margin = 40,
180 .upper_margin = 21,
181 .lower_margin = 7,
182 .hsync_len = 60,
183 .vsync_len = 10,
184 .sync = FB_SYNC_EXT,
185 .vmode = FB_VMODE_NONINTERLACED
186 }
187 }
188 };
189
190 size_t display_count = ARRAY_SIZE(displays);
191
192 static void setup_display(void)
193 {
194 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
195 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
196
197 enable_ipu_clock();
198 imx_setup_hdmi();
199
200 /* Turn on LDB0,IPU,IPU DI0 clocks */
201 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK);
202
203 /* set LDB0, LDB1 clk select to 011/011 */
204 clrsetbits_le32(&mxc_ccm->cs2cdr,
205 MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK |
206 MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK,
207 (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) |
208 (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET));
209
210 setbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV);
211
212 setbits_le32(&mxc_ccm->chsccdr, CHSCCDR_CLK_SEL_LDB_DI0 <<
213 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
214
215 writel(IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES |
216 IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH |
217 IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW |
218 IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG |
219 IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT |
220 IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG |
221 IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT |
222 IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED |
223 IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0,
224 &iomux->gpr[2]);
225
226 clrsetbits_le32(&iomux->gpr[3], IOMUXC_GPR3_LVDS0_MUX_CTL_MASK,
227 IOMUXC_GPR3_MUX_SRC_IPU1_DI0 <<
228 IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
229 }
230 #endif
231
232 int board_early_init_f(void)
233 {
234 #if defined(CONFIG_VIDEO_IPUV3)
235 setup_display();
236 #endif
237
238 return 0;
239 }
240
241 int board_init(void)
242 {
243 /* address of boot parameters */
244 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
245
246 #ifdef CONFIG_CMD_SATA
247 setup_sata();
248 #endif
249
250 return 0;
251 }
252
253 int checkboard(void)
254 {
255 puts("Board: Novena 4x\n");
256 return 0;
257 }
258
259 int dram_init(void)
260 {
261 gd->ram_size = imx_ddr_size();
262 return 0;
263 }
264
265 /* setup board specific PMIC */
266 int power_init_board(void)
267 {
268 struct pmic *p;
269 u32 reg;
270 int ret;
271
272 power_pfuze100_init(1);
273 p = pmic_get("PFUZE100");
274 if (!p)
275 return -EINVAL;
276
277 ret = pmic_probe(p);
278 if (ret)
279 return ret;
280
281 pmic_reg_read(p, PFUZE100_DEVICEID, &reg);
282 printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
283
284 /* Set SWBST to 5.0V and enable (for USB) */
285 pmic_reg_read(p, PFUZE100_SWBSTCON1, &reg);
286 reg &= ~(SWBST_MODE_MASK | SWBST_VOL_MASK);
287 reg |= (SWBST_5_00V | SWBST_MODE_AUTO);
288 pmic_reg_write(p, PFUZE100_SWBSTCON1, reg);
289
290 return 0;
291 }
292
293 /* EEPROM configuration data */
294 struct novena_eeprom_data {
295 uint8_t signature[6];
296 uint8_t version;
297 uint8_t reserved;
298 uint32_t serial;
299 uint8_t mac[6];
300 uint16_t features;
301 };
302
303 int misc_init_r(void)
304 {
305 struct novena_eeprom_data data;
306 uchar *datap = (uchar *)&data;
307 const char *signature = "Novena";
308 int ret;
309
310 /* If 'ethaddr' is already set, do nothing. */
311 if (getenv("ethaddr"))
312 return 0;
313
314 /* EEPROM is at bus 2. */
315 ret = i2c_set_bus_num(2);
316 if (ret) {
317 puts("Cannot select EEPROM I2C bus.\n");
318 return 0;
319 }
320
321 /* EEPROM is at address 0x56. */
322 ret = eeprom_read(0x56, 0, datap, sizeof(data));
323 if (ret) {
324 puts("Cannot read I2C EEPROM.\n");
325 return 0;
326 }
327
328 /* Check EEPROM signature. */
329 if (memcmp(data.signature, signature, 6)) {
330 puts("Invalid I2C EEPROM signature.\n");
331 return 0;
332 }
333
334 /* Set ethernet address from EEPROM. */
335 eth_setenv_enetaddr("ethaddr", data.mac);
336
337 return ret;
338 }