board/linkstation/linkstation.c

   1 /*
   2  * linkstation.c
   3  *
   4  * Misc LinkStation specific functions
   5  *
   6  * Copyright (C) 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk>
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <version.h>
  25 #include <common.h>
  26 #include <mpc824x.h>
  27 #include <asm/io.h>
  28 #include <ns16550.h>
  29 #include <netdev.h>
  30
  31 #ifdef CONFIG_PCI
  32 #include <pci.h>
  33 #endif
  34
  35 extern void init_AVR_DUART(void);
  36
  37 int checkboard (void)
  38 {
  39         DECLARE_GLOBAL_DATA_PTR;
  40         char *p;
  41         bd_t *bd = gd->bd;
  42
  43         init_AVR_DUART();
  44
  45         if ((p = getenv ("console_nr")) != NULL) {
  46                 unsigned long con_nr = simple_strtoul (p, NULL, 10) & 3;
  47
  48                 bd->bi_baudrate &= ~3;
  49                 bd->bi_baudrate |= con_nr & 3;
  50         }
  51         return 0;
  52 }
  53
  54 phys_size_t initdram (int board_type)
  55 {
  56         return (get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE));
  57 }
  58
  59 /*
  60  * Initialize PCI Devices
  61  */
  62 #ifdef CONFIG_PCI
  63
  64 #ifndef CONFIG_PCI_PNP
  65
  66 static struct pci_config_table pci_linkstation_config_table[] = {
  67         /* vendor, device, class */
  68         /* bus, dev, func */
  69         { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  70           PCI_ANY_ID, 0x0b, 0,          /* AN983B or RTL8110S  */
  71                                                                 /* ethernet controller */
  72           pci_cfgfunc_config_device, { PCI_ETH_IOADDR,
  73                                        PCI_ETH_MEMADDR,
  74                                        PCI_COMMAND_IO |
  75                                        PCI_COMMAND_MEMORY |
  76                                        PCI_COMMAND_MASTER }},
  77         { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  78           PCI_ANY_ID, 0x0c, 0,          /* SII680 or IT8211AF */
  79                                                                 /* ide controller     */
  80           pci_cfgfunc_config_device, { PCI_IDE_IOADDR,
  81                                        PCI_IDE_MEMADDR,
  82                                        PCI_COMMAND_IO |
  83                                        PCI_COMMAND_MEMORY |
  84                                        PCI_COMMAND_MASTER }},
  85         { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  86           PCI_ANY_ID, 0x0e, 0,          /* D720101 USB controller, 1st USB 1.1 */
  87           pci_cfgfunc_config_device, { PCI_USB0_IOADDR,
  88                                        PCI_USB0_MEMADDR,
  89                                        PCI_COMMAND_MEMORY |
  90                                        PCI_COMMAND_MASTER }},
  91         { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  92           PCI_ANY_ID, 0x0e, 1,          /* D720101 USB controller, 2nd USB 1.1 */
  93           pci_cfgfunc_config_device, { PCI_USB1_IOADDR,
  94                                        PCI_USB1_MEMADDR,
  95                                        PCI_COMMAND_MEMORY |
  96                                        PCI_COMMAND_MASTER }},
  97         { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  98           PCI_ANY_ID, 0x0e, 2,          /* D720101 USB controller, USB 2.0 */
  99           pci_cfgfunc_config_device, { PCI_USB2_IOADDR,
 100                                        PCI_USB2_MEMADDR,
 101                                        PCI_COMMAND_MEMORY |
 102                                        PCI_COMMAND_MASTER }},
 103         { }
 104 };
 105 #endif
 106
 107 struct pci_controller hose = {
 108 #ifndef CONFIG_PCI_PNP
 109         config_table:pci_linkstation_config_table,
 110 #endif
 111 };
 112
 113 void pci_init_board (void)
 114 {
 115         pci_mpc824x_init (&hose);
 116
 117         /* Reset USB 1.1 */
 118         /* Haven't seen any change without these on a HG, maybe it is
 119          * needed on other models */
 120         out_le32((volatile unsigned*)(PCI_USB0_MEMADDR + 8), 1);
 121         out_le32((volatile unsigned*)(PCI_USB1_MEMADDR + 8), 1);
 122 }
 123 #endif /* CONFIG_PCI */
 124
 125 #define UART_DCR       0x80004511
 126 int board_early_init_f (void)
 127 {
 128         /* set DUART mode */
 129         out_8((volatile u8*)UART_DCR, 1);
 130         return 0;
 131 }
 132
 133 int board_eth_init(bd_t *bis)
 134 {
 135         return pci_eth_init(bis);
 136 }