2 * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
5 * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #if defined(CONFIG_OF_LIBFDT)
36 DECLARE_GLOBAL_DATA_PTR
;
38 int mvblm7_load_fpga(void)
41 void *fpga_data
= NULL
;
42 char *datastr
= getenv("fpgadata");
43 char *sizestr
= getenv("fpgadatasize");
46 fpga_data
= (void *)simple_strtoul(datastr
, NULL
, 16);
48 data_size
= (size_t)simple_strtoul(sizestr
, NULL
, 16);
50 return fpga_load(0, fpga_data
, data_size
);
53 static struct pci_region pci_regions
[] = {
55 bus_start
: CONFIG_SYS_PCI1_MEM_BASE
,
56 phys_start
: CONFIG_SYS_PCI1_MEM_PHYS
,
57 size
: CONFIG_SYS_PCI1_MEM_SIZE
,
58 flags
: PCI_REGION_MEM
| PCI_REGION_PREFETCH
61 bus_start
: CONFIG_SYS_PCI1_MMIO_BASE
,
62 phys_start
: CONFIG_SYS_PCI1_MMIO_PHYS
,
63 size
: CONFIG_SYS_PCI1_MMIO_SIZE
,
67 bus_start
: CONFIG_SYS_PCI1_IO_BASE
,
68 phys_start
: CONFIG_SYS_PCI1_IO_PHYS
,
69 size
: CONFIG_SYS_PCI1_IO_SIZE
,
74 void pci_init_board(void)
80 volatile immap_t
*immr
;
81 volatile pcictrl83xx_t
*pci_ctrl
;
82 volatile gpio83xx_t
*gpio
;
83 volatile clk83xx_t
*clk
;
84 volatile law83xx_t
*pci_law
;
85 struct pci_region
*reg
[] = { pci_regions
};
88 immr
= (immap_t
*) CONFIG_SYS_IMMR
;
89 clk
= (clk83xx_t
*) &immr
->clk
;
90 pci_ctrl
= immr
->pci_ctrl
;
91 pci_law
= immr
->sysconf
.pcilaw
;
92 gpio
= (volatile gpio83xx_t
*)&immr
->gpio
[0];
94 s
= getenv("skip_fpga");
96 printf("found 'skip_fpga' -> FPGA _not_ loaded !\n");
100 gpio
->dat
= MV_GPIO_DAT
;
101 gpio
->odr
= MV_GPIO_ODE
;
103 gpio
->dir
= MV_GPIO_OUT
;
105 gpio
->dir
= MV_GPIO_OUT
& ~(FPGA_DIN
|FPGA_CCLK
);
107 printf("SICRH / SICRL : 0x%08x / 0x%08x\n", immr
->sysconf
.sicrh
,
108 immr
->sysconf
.sicrl
);
114 /* Enable PCI_CLK_OUTPUTs 0 and 1 with 1:1 clocking */
115 clk
->occr
= 0xc0000000;
121 for (i
= 0; i
< 1000; ++i
)
124 pci_law
[0].bar
= CONFIG_SYS_PCI1_MEM_PHYS
& LAWBAR_BAR
;
125 pci_law
[0].ar
= LBLAWAR_EN
| LBLAWAR_1GB
;
127 pci_law
[1].bar
= CONFIG_SYS_PCI1_IO_PHYS
& LAWBAR_BAR
;
128 pci_law
[1].ar
= LBLAWAR_EN
| LBLAWAR_1MB
;
130 warmboot
= gd
->bd
->bi_bootflags
& BOOTFLAG_WARM
;
132 mpc83xx_pci_init(1, reg
, warmboot
);