3 * Denis Peter, MPL AG Switzerland
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm/processor.h>
31 #include "piix4_pci.h"
39 #define PRINTF(fmt,args...) printf (fmt ,##args)
41 #define PRINTF(fmt,args...)
51 #if defined(CONFIG_PIP405)
53 extern int drv_isa_kbd_init (void);
55 /* fdc (logical device 0) */
56 const SIO_LOGDEV_TABLE sio_fdc
[] = {
57 {0x60, 3}, /* set IO to FDPort (3F0) */
58 {0x61, 0xF0}, /* set IO to FDPort (3F0) */
59 {0x70, 06}, /* set IRQ 6 for FDPort */
60 {0x74, 02}, /* set DMA 2 for FDPort */
61 {0xF0, 0x05}, /* set to PS2 type */
62 {0xF1, 0x00}, /* default value */
63 {0x30, 1}, /* and activate the device */
64 {0xFF, 0} /* end of device table */
66 /* paralell port (logical device 3) */
67 const SIO_LOGDEV_TABLE sio_pport
[] = {
68 {0x60, 3}, /* set IO to PPort (378) */
69 {0x61, 0x78}, /* set IO to PPort (378) */
70 {0x70, 07}, /* set IRQ 7 for PPort */
71 {0xF1, 00}, /* set PPort to normal */
72 {0x30, 1}, /* and activate the device */
73 {0xFF, 0} /* end of device table */
75 /* paralell port (logical device 3) Floppy assigned to lpt */
76 const SIO_LOGDEV_TABLE sio_pport_fdc
[] = {
77 {0x60, 3}, /* set IO to PPort (378) */
78 {0x61, 0x78}, /* set IO to PPort (378) */
79 {0x70, 07}, /* set IRQ 7 for PPort */
80 {0xF1, 02}, /* set PPort to Floppy */
81 {0x30, 1}, /* and activate the device */
82 {0xFF, 0} /* end of device table */
84 /* uart 1 (logical device 4) */
85 const SIO_LOGDEV_TABLE sio_com1
[] = {
86 {0x60, 3}, /* set IO to COM1 (3F8) */
87 {0x61, 0xF8}, /* set IO to COM1 (3F8) */
88 {0x70, 04}, /* set IRQ 4 for COM1 */
89 {0x30, 1}, /* and activate the device */
90 {0xFF, 0} /* end of device table */
92 /* uart 2 (logical device 5) */
93 const SIO_LOGDEV_TABLE sio_com2
[] = {
94 {0x60, 2}, /* set IO to COM2 (2F8) */
95 {0x61, 0xF8}, /* set IO to COM2 (2F8) */
96 {0x70, 03}, /* set IRQ 3 for COM2 */
97 {0x30, 1}, /* and activate the device */
98 {0xFF, 0} /* end of device table */
101 /* keyboard controller (logical device 7) */
102 const SIO_LOGDEV_TABLE sio_keyboard
[] = {
103 {0x70, 1}, /* set IRQ 1 for keyboard */
104 {0x72, 12}, /* set IRQ 12 for mouse */
105 {0xF0, 0}, /* disable Port92 (this is a PowerPC!!) */
106 {0x30, 1}, /* and activate the device */
107 {0xFF, 0} /* end of device table */
111 /*******************************************************************************
112 * Config SuperIO FDC37C672
113 ********************************************************************************/
114 unsigned char open_cfg_super_IO(int address
)
116 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS
| address
,0x55); /* open config */
117 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS
| address
,0x20); /* set address to DEV ID */
118 if(in8(CONFIG_SYS_ISA_IO_BASE_ADDRESS
| address
| 0x1)==0x40) /* ok Device ID is correct */
124 void close_cfg_super_IO(int address
)
126 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS
| address
,0xAA); /* close config */
130 unsigned char read_cfg_super_IO(int address
, unsigned char function
, unsigned char regaddr
)
132 /* assuming config reg is open */
133 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS
| address
,0x7); /* points to the function reg */
134 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS
| address
| 1,function
); /* set the function no */
135 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS
| address
,regaddr
); /* sets the address in the function */
136 return in8(CONFIG_SYS_ISA_IO_BASE_ADDRESS
| address
| 1);
139 void write_cfg_super_IO(int address
, unsigned char function
, unsigned char regaddr
, unsigned char data
)
141 /* assuming config reg is open */
142 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS
| address
,0x7); /* points to the function reg */
143 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS
| address
| 1,function
); /* set the function no */
144 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS
| address
,regaddr
); /* sets the address in the function */
145 out8(CONFIG_SYS_ISA_IO_BASE_ADDRESS
| address
| 1,data
); /* writes the data */
148 void isa_write_table(SIO_LOGDEV_TABLE
*ldt
,unsigned char ldev
)
150 while (ldt
->index
!= 0xFF) {
151 write_cfg_super_IO(SIO_CFG_PORT
, ldev
, ldt
->index
, ldt
->val
);
156 void isa_sio_loadtable(void)
158 char *s
= getenv("floppy");
159 /* setup Floppy device 0*/
160 isa_write_table((SIO_LOGDEV_TABLE
*)&sio_fdc
,0);
161 /* setup parallel port device 3 */
162 if(s
&& !strncmp(s
, "lpt", 3)) {
163 printf("SIO: Floppy assigned to LPT\n");
164 /* floppy is assigned to the LPT */
165 isa_write_table((SIO_LOGDEV_TABLE
*)&sio_pport_fdc
,3);
168 /*printf("Floppy assigned to internal port\n");*/
169 isa_write_table((SIO_LOGDEV_TABLE
*)&sio_pport
,3);
171 /* setup Com1 port device 4 */
172 isa_write_table((SIO_LOGDEV_TABLE
*)&sio_com1
,4);
173 /* setup Com2 port device 5 */
174 isa_write_table((SIO_LOGDEV_TABLE
*)&sio_com2
,5);
175 /* setup keyboards device 7 */
176 isa_write_table((SIO_LOGDEV_TABLE
*)&sio_keyboard
,7);
180 void isa_sio_setup(void)
182 if(open_cfg_super_IO(SIO_CFG_PORT
)==TRUE
)
185 close_cfg_super_IO(0x3F0);
190 /******************************************************************************
192 * we use the Vector mode
195 struct isa_irq_action
{
196 interrupt_handler_t
*handler
;
201 static struct isa_irq_action isa_irqs
[16];
205 * This contains the irq mask for both 8259A irq controllers,
207 static unsigned int cached_irq_mask
= 0xfff9;
209 #define cached_imr1 (unsigned char)cached_irq_mask
210 #define cached_imr2 (unsigned char)(cached_irq_mask>>8)
211 #define IMR_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_OCW1
212 #define IMR_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_OCW1
213 #define ICW1_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW1
214 #define ICW1_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW1
215 #define ICW2_1 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT1_ICW2
216 #define ICW2_2 CONFIG_SYS_ISA_IO_BASE_ADDRESS + PIIX4_ISA_INT2_ICW2
217 #define ICW3_1 ICW2_1
218 #define ICW3_2 ICW2_2
219 #define ICW4_1 ICW2_1
220 #define ICW4_2 ICW2_2
225 void disable_8259A_irq(unsigned int irq
)
227 unsigned int mask
= 1 << irq
;
229 cached_irq_mask
|= mask
;
231 out8(IMR_2
,cached_imr2
);
233 out8(IMR_1
,cached_imr1
);
236 void enable_8259A_irq(unsigned int irq
)
238 unsigned int mask
= ~(1 << irq
);
240 cached_irq_mask
&= mask
;
242 out8(IMR_2
,cached_imr2
);
244 out8(IMR_1
,cached_imr1
);
247 int i8259A_irq_pending(unsigned int irq)
249 unsigned int mask = 1<<irq;
253 ret = inb(0x20) & mask;
255 ret = inb(0xA0) & (mask >> 8);
256 spin_unlock_irqrestore(&i8259A_lock, flags);
263 * This function assumes to be called rarely. Switching between
264 * 8259A registers is slow.
266 int i8259A_irq_real(unsigned int irq
)
269 int irqmask
= 1<<irq
;
272 out8(ISR_1
,0x0B); /* ISR register */
273 value
= in8(ISR_1
) & irqmask
;
274 out8(ISR_1
,0x0A); /* back to the IRR register */
277 out8(ISR_2
,0x0B); /* ISR register */
278 value
= in8(ISR_2
) & (irqmask
>> 8);
279 out8(ISR_2
,0x0A); /* back to the IRR register */
284 * Careful! The 8259A is a fragile beast, it pretty
285 * much _has_ to be done exactly like this (mask it
286 * first, _then_ send the EOI, and the order of EOI
287 * to the two 8259s is important!
289 void mask_and_ack_8259A(unsigned int irq
)
291 unsigned int irqmask
= 1 << irq
;
292 unsigned int temp_irqmask
= cached_irq_mask
;
294 * Lightweight spurious IRQ detection. We do not want
295 * to overdo spurious IRQ handling - it's usually a sign
296 * of hardware problems, so we only do the checks we can
297 * do without slowing down good hardware unnecesserily.
299 * Note that IRQ7 and IRQ15 (the two spurious IRQs
300 * usually resulting from the 8259A-1|2 PICs) occur
301 * even if the IRQ is masked in the 8259A. Thus we
302 * can check spurious 8259A IRQs without doing the
303 * quite slow i8259A_irq_real() call for every IRQ.
304 * This does not cover 100% of spurious interrupts,
305 * but should be enough to warn the user that there
306 * is something bad going on ...
308 if (temp_irqmask
& irqmask
)
309 goto spurious_8259A_irq
;
310 temp_irqmask
|= irqmask
;
314 in8(IMR_2
); /* DUMMY - (do we need this?) */
315 out8(IMR_2
,(unsigned char)(temp_irqmask
>>8));
316 out8(ISR_2
,0x60+(irq
&7));/* 'Specific EOI' to slave */
317 out8(ISR_1
,0x62); /* 'Specific EOI' to master-IRQ2 */
318 out8(IMR_2
,cached_imr2
); /* turn it on again */
320 in8(IMR_1
); /* DUMMY - (do we need this?) */
321 out8(IMR_1
,(unsigned char)temp_irqmask
);
322 out8(ISR_1
,0x60+irq
); /* 'Specific EOI' to master */
323 out8(IMR_1
,cached_imr1
); /* turn it on again */
330 * this is the slow path - should happen rarely.
332 if (i8259A_irq_real(irq
))
334 * oops, the IRQ _is_ in service according to the
335 * 8259A - not spurious, go handle it.
337 goto handle_real_irq
;
340 static int spurious_irq_mask
;
342 * At this point we can be sure the IRQ is spurious,
343 * lets ACK and report it. [once per IRQ]
345 if (!(spurious_irq_mask
& irqmask
)) {
346 PRINTF("spurious 8259A interrupt: IRQ%d.\n", irq
);
347 spurious_irq_mask
|= irqmask
;
349 /* irq_err_count++; */
351 * Theoretically we do not have to handle this IRQ,
352 * but in Linux this does not cause problems and is
355 goto handle_real_irq
;
359 void init_8259A(void)
361 out8(IMR_1
,0xff); /* mask all of 8259A-1 */
362 out8(IMR_2
,0xff); /* mask all of 8259A-2 */
364 out8(ICW1_1
,0x11); /* ICW1: select 8259A-1 init */
365 out8(ICW2_1
,0x20 + 0); /* ICW2: 8259A-1 IR0-7 mapped to 0x20-0x27 */
366 out8(ICW3_1
,0x04); /* 8259A-1 (the master) has a slave on IR2 */
367 out8(ICW4_1
,0x01); /* master expects normal EOI */
368 out8(ICW1_2
,0x11); /* ICW2: select 8259A-2 init */
369 out8(ICW2_2
,0x20 + 8); /* ICW2: 8259A-2 IR0-7 mapped to 0x28-0x2f */
370 out8(ICW3_2
,0x02); /* 8259A-2 is a slave on master's IR2 */
371 out8(ICW4_2
,0x01); /* (slave's support for AEOI in flat mode
372 is to be investigated) */
373 udelay(10000); /* wait for 8259A to initialize */
374 out8(IMR_1
,cached_imr1
); /* restore master IRQ mask */
375 udelay(10000); /* wait for 8259A to initialize */
376 out8(IMR_2
,cached_imr2
); /* restore slave IRQ mask */
380 #define PCI_INT_ACK_ADDR 0xEED00000
382 int handle_isa_int(void)
384 unsigned long irqack
;
385 unsigned char isr1
,isr2
,irq
;
386 /* first we acknokledge the int via the PCI bus */
387 irqack
=in32(PCI_INT_ACK_ADDR
);
388 /* now we get the ISRs */
391 irq
=(unsigned char)irqack
;
393 /* if((irq==7)&&((isr1&0x80)==0)) {
394 PRINTF("IRQ7 detected but not in ISR\n");
397 */ /* we should handle cascaded interrupts here also */
399 /* printf("ISA Irq %d\n",irq); */
400 isa_irqs
[irq
].count
++;
401 if(irq
!=2) { /* just swallow the cascade irq 2 */
402 if (isa_irqs
[irq
].handler
!= NULL
)
403 (*isa_irqs
[irq
].handler
)(isa_irqs
[irq
].arg
); /* call isr */
405 PRINTF ("bogus interrupt vector 0x%x\n", irq
);
409 /* issue EOI instruction to clear the IRQ */
410 mask_and_ack_8259A(irq
);
415 /******************************************************************
416 * Install and free an ISA interrupt handler.
419 void isa_irq_install_handler(int vec
, interrupt_handler_t
*handler
, void *arg
)
421 if (isa_irqs
[vec
].handler
!= NULL
) {
422 printf ("ISA Interrupt vector %d: handler 0x%x replacing 0x%x\n",
423 vec
, (uint
)handler
, (uint
)isa_irqs
[vec
].handler
);
425 isa_irqs
[vec
].handler
= handler
;
426 isa_irqs
[vec
].arg
= arg
;
427 enable_8259A_irq(vec
);
428 PRINTF ("Install ISA IRQ %d ==> %p, @ %p mask=%04x\n", vec
, handler
, &isa_irqs
[vec
].handler
,cached_irq_mask
);
432 void isa_irq_free_handler(int vec
)
434 disable_8259A_irq(vec
);
435 isa_irqs
[vec
].handler
= NULL
;
436 isa_irqs
[vec
].arg
= NULL
;
437 PRINTF ("Free ISA IRQ %d mask=%04x\n", vec
, cached_irq_mask
);
441 /****************************************************************************/
442 void isa_init_irq_contr(void)
445 /* disable all Interrupts */
446 /* first write icws controller 1 */
449 isa_irqs
[i
].handler
=NULL
;
450 isa_irqs
[i
].arg
=NULL
;
456 /*************************************************************************/
458 void isa_show_irq(void)
462 printf ("\nISA Interrupt-Information:\n");
463 printf ("Nr Routine Arg Count\n");
465 for (vec
=0; vec
<16; vec
++) {
466 if (isa_irqs
[vec
].handler
!= NULL
) {
467 printf ("%02d %08lx %08lx %d\n",
469 (ulong
)isa_irqs
[vec
].handler
,
470 (ulong
)isa_irqs
[vec
].arg
,
471 isa_irqs
[vec
].count
);
476 int isa_irq_get_count(int vec
)
478 return(isa_irqs
[vec
].count
);
481 /******************************************************************
482 * Init the ISA bus and devices.
485 #if defined(CONFIG_PIP405)
490 isa_init_irq_contr();