board/purple/purple.c

   1 /*
   2  * (C) Copyright 2003
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <command.h>
  26 #include <netdev.h>
  27 #include <asm/inca-ip.h>
  28 #include <asm/regdef.h>
  29 #include <asm/mipsregs.h>
  30 #include <asm/io.h>
  31 #include <asm/addrspace.h>
  32 #include <asm/cacheops.h>
  33 #include <asm/reboot.h>
  34
  35 #include "sconsole.h"
  36
  37 #define cache_unroll(base,op)           \
  38         __asm__ __volatile__("          \
  39                 .set noreorder;         \
  40                 .set mips3;             \
  41                 cache %1, (%0);         \
  42                 .set mips0;             \
  43                 .set reorder"           \
  44                 :                       \
  45                 : "r" (base),           \
  46                   "i" (op));
  47
  48 typedef void (*FUNCPTR)(ulong *source, ulong *destination, ulong nlongs);
  49
  50 extern void     asc_serial_init         (void);
  51 extern void     asc_serial_putc         (char);
  52 extern void     asc_serial_puts         (const char *);
  53 extern int      asc_serial_getc         (void);
  54 extern int      asc_serial_tstc         (void);
  55 extern void     asc_serial_setbrg       (void);
  56
  57 void _machine_restart(void)
  58 {
  59         void (*f)(void) = (void *) 0xbfc00000;
  60
  61         f();
  62 }
  63
  64 static void sdram_timing_init (ulong size)
  65 {
  66         register uint pass;
  67         register uint done;
  68         register uint count;
  69         register uint p0, p1, p2, p3, p4;
  70         register uint addr;
  71
  72 #define WRITE_MC_IOGP_1 *(uint *)0xbf800800 = (p1<<14)+(p2<<13)+(p4<<8)+(p0<<4)+p3;
  73 #define WRITE_MC_IOGP_2 *(uint *)0xbf800800 = (p1<<14)+(p2<<13)+((p4-16)<<8)+(p0<<4)+p3;
  74
  75         done = 0;
  76         p0 = 2;
  77         while (p0 < 4 && done == 0) {
  78             p1 = 0;
  79             while (p1 < 2 && done == 0) {
  80                 p2 = 0;
  81                 while (p2 < 2 && done == 0) {
  82                     p3 = 0;
  83                     while (p3 < 16 && done == 0) {
  84                         count = 0;
  85                         p4 = 0;
  86                         while (p4 < 32 && done == 0) {
  87                             WRITE_MC_IOGP_1;
  88
  89                             for (addr = CKSEG1 + 0x4000;
  90                                  addr < CKSEG1ADDR (size);
  91                                  addr = addr + 4) {
  92                                         *(uint *) addr = 0xaa55aa55;
  93                             }
  94
  95                             pass = 1;
  96
  97                             for (addr = CKSEG1 + 0x4000;
  98                                  addr < CKSEG1ADDR (size) && pass == 1;
  99                                  addr = addr + 4) {
 100                                         if (*(uint *) addr != 0xaa55aa55)
 101                                                 pass = 0;
 102                             }
 103
 104                             if (pass == 1) {
 105                                 count++;
 106                             } else {
 107                                 count = 0;
 108                             }
 109
 110                             if (count == 32) {
 111                                 WRITE_MC_IOGP_2;
 112                                 done = 1;
 113                             }
 114                             p4++;
 115                         }
 116                         p3++;
 117                     }
 118                     p2++;
 119                 }
 120                 p1++;
 121             }
 122             p0++;
 123             if (p0 == 1)
 124                 p0++;
 125         }
 126 }
 127
 128 phys_size_t initdram(int board_type)
 129 {
 130         /* The only supported number of SDRAM banks is 4.
 131          */
 132 #define CONFIG_SYS_NB   4
 133
 134         ulong   cfgpb0  = *INCA_IP_SDRAM_MC_CFGPB0;
 135         ulong   cfgdw   = *INCA_IP_SDRAM_MC_CFGDW;
 136         int     cols    = cfgpb0 & 0xF;
 137         int     rows    = (cfgpb0 & 0xF0) >> 4;
 138         int     dw      = cfgdw & 0xF;
 139         ulong   size    = (1 << (rows + cols)) * (1 << (dw - 1)) * CONFIG_SYS_NB;
 140         void (*  sdram_init) (ulong);
 141
 142         sdram_init = (void (*)(ulong)) CKSEG0ADDR(&sdram_timing_init);
 143
 144         sdram_init(0x10000);
 145
 146         return size;
 147 }
 148
 149 int checkboard (void)
 150 {
 151
 152         unsigned long chipid = *(unsigned long *)0xB800C800;
 153
 154         printf ("Board: Purple PLB 2800 chip version %ld, ", chipid & 0xF);
 155
 156         printf("CPU Speed %d MHz\n", CPU_CLOCK_RATE/1000000);
 157
 158         set_io_port_base(0);
 159
 160         return 0;
 161 }
 162
 163 int misc_init_r (void)
 164 {
 165         asc_serial_init ();
 166
 167         sconsole_putc   = asc_serial_putc;
 168         sconsole_puts   = asc_serial_puts;
 169         sconsole_getc   = asc_serial_getc;
 170         sconsole_tstc   = asc_serial_tstc;
 171         sconsole_setbrg = asc_serial_setbrg;
 172
 173         sconsole_flush ();
 174         return (0);
 175 }
 176
 177 /*******************************************************************************
 178 *
 179 * copydwords - copy one buffer to another a long at a time
 180 *
 181 * This routine copies the first <nlongs> longs from <source> to <destination>.
 182 */
 183 static void copydwords (ulong *source, ulong *destination, ulong nlongs)
 184 {
 185         ulong temp,temp1;
 186         ulong *dstend = destination + nlongs;
 187
 188         while (destination < dstend) {
 189                 temp = *source++;
 190                 /* dummy read from sdram */
 191                 temp1 = *(ulong *)0xa0000000;
 192                 /* avoid optimization from compliler */
 193                 *(ulong *)0xbf0081f8 = temp1 + temp;
 194                 *destination++ = temp;
 195
 196         }
 197 }
 198
 199 /*******************************************************************************
 200 *
 201 * copyLongs - copy one buffer to another a long at a time
 202 *
 203 * This routine copies the first <nlongs> longs from <source> to <destination>.
 204 */
 205 static void copyLongs (ulong *source, ulong *destination, ulong nlongs)
 206 {
 207         FUNCPTR absEntry;
 208
 209         absEntry = (FUNCPTR)(0xbf008000+((ulong)copydwords & 0x7));
 210         absEntry(source, destination, nlongs);
 211 }
 212
 213 /*******************************************************************************
 214 *
 215 * programLoad - load program into ram
 216 *
 217 * This routine load copydwords into ram
 218 *
 219 */
 220 static void programLoad(void)
 221 {
 222         FUNCPTR absEntry;
 223         ulong *src,*dst;
 224
 225         src = (ulong *)(TEXT_BASE + 0x428);
 226         dst = (ulong *)0xbf0081d0;
 227
 228         absEntry = (FUNCPTR)(TEXT_BASE + 0x400);
 229         absEntry(src,dst,0x6);
 230
 231         src = (ulong *)((ulong)copydwords & 0xfffffff8);
 232         dst = (ulong *)0xbf008000;
 233
 234         absEntry(src,dst,0x38);
 235 }
 236
 237 /*******************************************************************************
 238 *
 239 * copy_code - copy u-boot image from flash to RAM
 240 *
 241 * This routine is needed to solve flash problems on this board
 242 *
 243 */
 244 void copy_code (ulong dest_addr)
 245 {
 246         extern long uboot_end_data;
 247         unsigned long start;
 248         unsigned long end;
 249
 250         /* load copydwords into ram
 251          */
 252         programLoad();
 253
 254         /* copy u-boot code
 255          */
 256         copyLongs((ulong *)CONFIG_SYS_MONITOR_BASE,
 257                   (ulong *)dest_addr,
 258                   ((ulong)&uboot_end_data - CONFIG_SYS_MONITOR_BASE + 3) / 4);
 259
 260
 261         /* flush caches
 262          */
 263
 264         start = CKSEG0;
 265         end = start + CONFIG_SYS_DCACHE_SIZE;
 266         while(start < end) {
 267                 cache_unroll(start,Index_Writeback_Inv_D);
 268                 start += CONFIG_SYS_CACHELINE_SIZE;
 269         }
 270
 271         start = CKSEG0;
 272         end = start + CONFIG_SYS_ICACHE_SIZE;
 273         while(start < end) {
 274                 cache_unroll(start,Index_Invalidate_I);
 275                 start += CONFIG_SYS_CACHELINE_SIZE;
 276         }
 277 }
 278
 279 #ifdef CONFIG_PLB2800_ETHER
 280 int board_eth_init(bd_t *bis)
 281 {
 282         return plb2800_eth_initialize(bis);
 283 }
 284 #endif