board/pxa255_idp/pxa_idp.c

   1 /*
   2  * (C) Copyright 2002
   3  * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
   4  *
   5  * (C) Copyright 2002
   6  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   7  * Marius Groeger <mgroeger@sysgo.de>
   8  *
   9  * (C) Copyright 2004
  10  * BEC Systems <http://bec-systems.com>
  11  * Cliff Brake <cliff.brake@gmail.com>
  12  * Support for Accelent/Vibren PXA255 IDP
  13  *
  14  * SPDX-License-Identifier:     GPL-2.0+
  15  */
  16
  17 #include <common.h>
  18 #include <netdev.h>
  19 #include <command.h>
  20 #include <asm/io.h>
  21 #include <asm/arch/pxa.h>
  22 #include <asm/arch/regs-mmc.h>
  23
  24 DECLARE_GLOBAL_DATA_PTR;
  25
  26 /*
  27  * Miscelaneous platform dependent initialisations
  28  */
  29
  30 int board_init (void)
  31 {
  32         /* We have RAM, disable cache */
  33         dcache_disable();
  34         icache_disable();
  35
  36         /* arch number of Lubbock-Board */
  37         gd->bd->bi_arch_number = MACH_TYPE_PXA_IDP;
  38
  39         /* adress of boot parameters */
  40         gd->bd->bi_boot_params = 0xa0000100;
  41
  42         /* turn on serial ports */
  43         *(volatile unsigned int *)(PXA_CS5_PHYS + 0x03C0002c) = 0x13;
  44
  45         /* set PWM for LCD */
  46         /* a value that works is 60Hz, 77% duty cycle */
  47         writel(readl(CKEN) | CKEN0_PWM0, CKEN);
  48         writel(0x3f, PWM_CTRL0);
  49         writel(0x3ff, PWM_PERVAL0);
  50         writel(792, PWM_PWDUTY0);
  51
  52         /* clear reset to AC97 codec */
  53         writel(readl(CKEN) | CKEN2_AC97, CKEN);
  54         writel(GCR_COLD_RST, GCR);
  55
  56         /* enable LCD backlight */
  57         /* *(volatile unsigned int *)(PXA_CS5_PHYS + 0x03C00030) = 0x7; */
  58
  59         /* test display */
  60         /* lcd_puts("This is a test\nTest #2\n"); */
  61
  62         return 0;
  63 }
  64
  65 #ifdef CONFIG_CMD_MMC
  66 int board_mmc_init(bd_t *bis)
  67 {
  68         pxa_mmc_register(0);
  69         return 0;
  70 }
  71 #endif
  72
  73 int board_late_init(void)
  74 {
  75         setenv("stdout", "serial");
  76         setenv("stderr", "serial");
  77         return 0;
  78 }
  79
  80 int dram_init(void)
  81 {
  82         pxa2xx_dram_init();
  83         gd->ram_size = PHYS_SDRAM_1_SIZE;
  84         return 0;
  85 }
  86
  87 void dram_init_banksize(void)
  88 {
  89         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  90         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  91 }
  92
  93 #ifdef DEBUG_BLINKC_ENABLE
  94
  95 void delay_c(void)
  96 {
  97         /* reset OSCR to 0 */
  98         writel(0, OSCR);
  99         while (readl(OSCR) > 0x10000)
 100                 ;
 101
 102         while (readl(OSCR) < 0xd4000)
 103                 ;
 104 }
 105
 106 void blink_c(void)
 107 {
 108         int led_bit = (1<<10);
 109
 110         writel(led_bit, GPDR0);
 111         writel(led_bit, GPCR0);
 112         delay_c();
 113         writel(led_bit, GPSR0);
 114         delay_c();
 115         writel(led_bit, GPCR0);
 116 }
 117
 118 int do_idpcmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 119 {
 120         printf("IDPCMD started\n");
 121         return 0;
 122 }
 123
 124 U_BOOT_CMD(idpcmd, CONFIG_SYS_MAXARGS, 0, do_idpcmd,
 125            "custom IDP command",
 126            "no args at this time"
 127 );
 128
 129 #endif
 130
 131 #ifdef CONFIG_CMD_NET
 132 int board_eth_init(bd_t *bis)
 133 {
 134         int rc = 0;
 135 #ifdef CONFIG_SMC91111
 136         rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
 137 #endif
 138         return rc;
 139 }
 140 #endif