board/quipos/cairo/cairo.c

   1 /*
   2  * Copyright (c) 2014 DENX
   3  * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
   4  *
   5  * Derived from code written by Robert Aigner (ra@spiid.net)
   6  *
   7  * Itself derived from Beagle Board and 3430 SDP code by
   8  *      Richard Woodruff <r-woodruff2@ti.com>
   9  *      Syed Mohammed Khasim <khasim@ti.com>
  10  *
  11  * SPDX-License-Identifier:     GPL-2.0+
  12  */
  13 #include <common.h>
  14 #include <dm.h>
  15 #include <netdev.h>
  16 #include <ns16550.h>
  17 #include <asm/io.h>
  18 #include <asm/arch/mem.h>
  19 #include <asm/arch/mux.h>
  20 #include <asm/arch/sys_proto.h>
  21 #include <i2c.h>
  22 #include <asm/mach-types.h>
  23 #include <asm/omap_mmc.h>
  24 #include "cairo.h"
  25
  26 DECLARE_GLOBAL_DATA_PTR;
  27
  28 /*
  29  * Routine: board_init
  30  * Description: Early hardware init.
  31  */
  32 int board_init(void)
  33 {
  34         gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
  35         /* board id for Linux */
  36         gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
  37         /* boot param addr */
  38         gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
  39         return 0;
  40 }
  41
  42 /*
  43  * Routine: set_muxconf_regs
  44  * Description: Setting up the configuration Mux registers specific to the
  45  *              hardware. Many pins need to be moved from protect to primary
  46  *              mode.
  47  */
  48 void set_muxconf_regs(void)
  49 {
  50         MUX_CAIRO();
  51 }
  52
  53 #if defined(CONFIG_MMC)
  54 int board_mmc_init(bd_t *bis)
  55 {
  56         return omap_mmc_init(0, 0, 0, -1, -1);
  57 }
  58 #endif
  59
  60 #ifdef CONFIG_SPL_BUILD
  61 /*
  62  * Routine: get_board_mem_timings
  63  * Description: If we use SPL then there is no x-loader nor config header
  64  * so we have to setup the DDR timings ourself on the first bank.  This
  65  * provides the timing values back to the function that configures
  66  * the memory.
  67  *
  68  * The Cairo board uses SAMSUNG DDR - K4X51163PG-FGC6
  69  */
  70 void get_board_mem_timings(struct board_sdrc_timings *timings)
  71 {
  72         timings->sharing = SAMSUNG_SHARING;
  73         timings->mcfg = SAMSUNG_V_MCFG_165(128 << 20);
  74         timings->ctrla = SAMSUNG_V_ACTIMA_165;
  75         timings->ctrlb = SAMSUNG_V_ACTIMB_165;
  76         timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
  77         timings->mr = SAMSUNG_V_MR_165;
  78 }
  79 #endif
  80
  81 static const struct ns16550_platdata cairo_serial = {
  82         .base = OMAP34XX_UART2,
  83         .reg_shift = 2,
  84         .clock = V_NS16550_CLK,
  85         .fcr = UART_FCR_DEFVAL,
  86 };
  87
  88 U_BOOT_DEVICE(cairo_uart) = {
  89         "ns16550_serial",
  90         &cairo_serial
  91 };
  92
  93 /* force SPL booting into U-Boot, not Linux */
  94 #ifdef CONFIG_SPL_OS_BOOT
  95 int spl_start_uboot(void)
  96 {
  97         return 1;
  98 }
  99 #endif