board/sunxi/Kconfig

   1 if ARCH_SUNXI
   2
   3 config IDENT_STRING
   4         default " Allwinner Technology"
   5
   6 config PRE_CONSOLE_BUFFER
   7         default y
   8
   9 config SPL_GPIO_SUPPORT
  10         default y
  11
  12 config SPL_LIBCOMMON_SUPPORT
  13         default y
  14
  15 config SPL_LIBDISK_SUPPORT
  16         default y
  17
  18 config SPL_LIBGENERIC_SUPPORT
  19         default y
  20
  21 config SPL_MMC_SUPPORT
  22         default y
  23
  24 config SPL_POWER_SUPPORT
  25         default y
  26
  27 config SPL_SERIAL_SUPPORT
  28         default y
  29
  30 config SUNXI_HIGH_SRAM
  31         bool
  32         default n
  33         ---help---
  34         Older Allwinner SoCs have their mask boot ROM mapped just below 4GB,
  35         with the first SRAM region being located at address 0.
  36         Some newer SoCs map the boot ROM at address 0 instead and move the
  37         SRAM to 64KB, just behind the mask ROM.
  38         Chips using the latter setup are supposed to select this option to
  39         adjust the addresses accordingly.
  40
  41 # Note only one of these may be selected at a time! But hidden choices are
  42 # not supported by Kconfig
  43 config SUNXI_GEN_SUN4I
  44         bool
  45         ---help---
  46         Select this for sunxi SoCs which have resets and clocks set up
  47         as the original A10 (mach-sun4i).
  48
  49 config SUNXI_GEN_SUN6I
  50         bool
  51         ---help---
  52         Select this for sunxi SoCs which have sun6i like periphery, like
  53         separate ahb reset control registers, custom pmic bus, new style
  54         watchdog, etc.
  55
  56
  57 choice
  58         prompt "Sunxi SoC Variant"
  59         optional
  60
  61 config MACH_SUN4I
  62         bool "sun4i (Allwinner A10)"
  63         select CPU_V7
  64         select ARM_CORTEX_CPU_IS_UP
  65         select SUNXI_GEN_SUN4I
  66         select SUPPORT_SPL
  67
  68 config MACH_SUN5I
  69         bool "sun5i (Allwinner A13)"
  70         select CPU_V7
  71         select ARM_CORTEX_CPU_IS_UP
  72         select SUNXI_GEN_SUN4I
  73         select SUPPORT_SPL
  74
  75 config MACH_SUN6I
  76         bool "sun6i (Allwinner A31)"
  77         select CPU_V7
  78         select CPU_V7_HAS_NONSEC
  79         select CPU_V7_HAS_VIRT
  80         select ARCH_SUPPORT_PSCI
  81         select SUNXI_GEN_SUN6I
  82         select SUPPORT_SPL
  83         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  84
  85 config MACH_SUN7I
  86         bool "sun7i (Allwinner A20)"
  87         select CPU_V7
  88         select CPU_V7_HAS_NONSEC
  89         select CPU_V7_HAS_VIRT
  90         select ARCH_SUPPORT_PSCI
  91         select SUNXI_GEN_SUN4I
  92         select SUPPORT_SPL
  93         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
  94
  95 config MACH_SUN8I_A23
  96         bool "sun8i (Allwinner A23)"
  97         select CPU_V7
  98         select CPU_V7_HAS_NONSEC
  99         select CPU_V7_HAS_VIRT
 100         select ARCH_SUPPORT_PSCI
 101         select SUNXI_GEN_SUN6I
 102         select SUPPORT_SPL
 103         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
 104
 105 config MACH_SUN8I_A33
 106         bool "sun8i (Allwinner A33)"
 107         select CPU_V7
 108         select CPU_V7_HAS_NONSEC
 109         select CPU_V7_HAS_VIRT
 110         select ARCH_SUPPORT_PSCI
 111         select SUNXI_GEN_SUN6I
 112         select SUPPORT_SPL
 113         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
 114
 115 config MACH_SUN8I_A83T
 116         bool "sun8i (Allwinner A83T)"
 117         select CPU_V7
 118         select SUNXI_GEN_SUN6I
 119         select SUPPORT_SPL
 120
 121 config MACH_SUN8I_H3
 122         bool "sun8i (Allwinner H3)"
 123         select CPU_V7
 124         select CPU_V7_HAS_NONSEC
 125         select CPU_V7_HAS_VIRT
 126         select ARCH_SUPPORT_PSCI
 127         select SUNXI_GEN_SUN6I
 128         select SUPPORT_SPL
 129         select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
 130
 131 config MACH_SUN9I
 132         bool "sun9i (Allwinner A80)"
 133         select CPU_V7
 134         select SUNXI_HIGH_SRAM
 135         select SUNXI_GEN_SUN6I
 136         select SUPPORT_SPL
 137
 138 config MACH_SUN50I
 139         bool "sun50i (Allwinner A64)"
 140         select ARM64
 141         select SUNXI_GEN_SUN6I
 142         select SUNXI_HIGH_SRAM
 143         select SUPPORT_SPL
 144
 145 endchoice
 146
 147 # The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
 148 config MACH_SUN8I
 149         bool
 150         default y if MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_H3 || MACH_SUN8I_A83T
 151
 152 config RESERVE_ALLWINNER_BOOT0_HEADER
 153         bool "reserve space for Allwinner boot0 header"
 154         select ENABLE_ARM_SOC_BOOT0_HOOK
 155         ---help---
 156         Prepend a 1536 byte (empty) header to the U-Boot image file, to be
 157         filled with magic values post build. The Allwinner provided boot0
 158         blob relies on this information to load and execute U-Boot.
 159         Only needed on 64-bit Allwinner boards so far when using boot0.
 160
 161 config ARM_BOOT_HOOK_RMR
 162         bool
 163         depends on ARM64
 164         default y
 165         select ENABLE_ARM_SOC_BOOT0_HOOK
 166         ---help---
 167         Insert some ARM32 code at the very beginning of the U-Boot binary
 168         which uses an RMR register write to bring the core into AArch64 mode.
 169         The very first instruction acts as a switch, since it's carefully
 170         chosen to be a NOP in one mode and a branch in the other, so the
 171         code would only be executed if not already in AArch64.
 172         This allows both the SPL and the U-Boot proper to be entered in
 173         either mode and switch to AArch64 if needed.
 174
 175 config DRAM_TYPE
 176         int "sunxi dram type"
 177         depends on MACH_SUN8I_A83T
 178         default 3
 179         ---help---
 180         Set the dram type, 3: DDR3, 7: LPDDR3
 181
 182 config DRAM_CLK
 183         int "sunxi dram clock speed"
 184         default 792 if MACH_SUN9I
 185         default 312 if MACH_SUN6I || MACH_SUN8I
 186         default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 187         default 672 if MACH_SUN50I
 188         ---help---
 189         Set the dram clock speed, valid range 240 - 480 (prior to sun9i),
 190         must be a multiple of 24. For the sun9i (A80), the tested values
 191         (for DDR3-1600) are 312 to 792.
 192
 193 if MACH_SUN5I || MACH_SUN7I
 194 config DRAM_MBUS_CLK
 195         int "sunxi mbus clock speed"
 196         default 300
 197         ---help---
 198         Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
 199
 200 endif
 201
 202 config DRAM_ZQ
 203         int "sunxi dram zq value"
 204         default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
 205         default 127 if MACH_SUN7I
 206         default 4145117 if MACH_SUN9I
 207         default 3881915 if MACH_SUN50I
 208         ---help---
 209         Set the dram zq value.
 210
 211 config DRAM_ODT_EN
 212         bool "sunxi dram odt enable"
 213         default n if !MACH_SUN8I_A23
 214         default y if MACH_SUN8I_A23
 215         default y if MACH_SUN50I
 216         ---help---
 217         Select this to enable dram odt (on die termination).
 218
 219 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 220 config DRAM_EMR1
 221         int "sunxi dram emr1 value"
 222         default 0 if MACH_SUN4I
 223         default 4 if MACH_SUN5I || MACH_SUN7I
 224         ---help---
 225         Set the dram controller emr1 value.
 226
 227 config DRAM_TPR3
 228         hex "sunxi dram tpr3 value"
 229         default 0
 230         ---help---
 231         Set the dram controller tpr3 parameter. This parameter configures
 232         the delay on the command lane and also phase shifts, which are
 233         applied for sampling incoming read data. The default value 0
 234         means that no phase/delay adjustments are necessary. Properly
 235         configuring this parameter increases reliability at high DRAM
 236         clock speeds.
 237
 238 config DRAM_DQS_GATING_DELAY
 239         hex "sunxi dram dqs_gating_delay value"
 240         default 0
 241         ---help---
 242         Set the dram controller dqs_gating_delay parmeter. Each byte
 243         encodes the DQS gating delay for each byte lane. The delay
 244         granularity is 1/4 cycle. For example, the value 0x05060606
 245         means that the delay is 5 quarter-cycles for one lane (1.25
 246         cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
 247         The default value 0 means autodetection. The results of hardware
 248         autodetection are not very reliable and depend on the chip
 249         temperature (sometimes producing different results on cold start
 250         and warm reboot). But the accuracy of hardware autodetection
 251         is usually good enough, unless running at really high DRAM
 252         clocks speeds (up to 600MHz). If unsure, keep as 0.
 253
 254 choice
 255         prompt "sunxi dram timings"
 256         default DRAM_TIMINGS_VENDOR_MAGIC
 257         ---help---
 258         Select the timings of the DDR3 chips.
 259
 260 config DRAM_TIMINGS_VENDOR_MAGIC
 261         bool "Magic vendor timings from Android"
 262         ---help---
 263         The same DRAM timings as in the Allwinner boot0 bootloader.
 264
 265 config DRAM_TIMINGS_DDR3_1066F_1333H
 266         bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
 267         ---help---
 268         Use the timings of the standard JEDEC DDR3-1066F speed bin for
 269         DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
 270         for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
 271         used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
 272         or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
 273         that down binning to DDR3-1066F is supported (because DDR3-1066F
 274         uses a bit faster timings than DDR3-1333H).
 275
 276 config DRAM_TIMINGS_DDR3_800E_1066G_1333J
 277         bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
 278         ---help---
 279         Use the timings of the slowest possible JEDEC speed bin for the
 280         selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
 281         DDR3-800E, DDR3-1066G or DDR3-1333J.
 282
 283 endchoice
 284
 285 endif
 286
 287 if MACH_SUN8I_A23
 288 config DRAM_ODT_CORRECTION
 289         int "sunxi dram odt correction value"
 290         default 0
 291         ---help---
 292         Set the dram odt correction value (range -255 - 255). In allwinner
 293         fex files, this option is found in bits 8-15 of the u32 odt_en variable
 294         in the [dram] section. When bit 31 of the odt_en variable is set
 295         then the correction is negative. Usually the value for this is 0.
 296 endif
 297
 298 config SYS_CLK_FREQ
 299         default 816000000 if MACH_SUN50I
 300         default 912000000 if MACH_SUN7I
 301         default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I || MACH_SUN9I
 302
 303 config SYS_CONFIG_NAME
 304         default "sun4i" if MACH_SUN4I
 305         default "sun5i" if MACH_SUN5I
 306         default "sun6i" if MACH_SUN6I
 307         default "sun7i" if MACH_SUN7I
 308         default "sun8i" if MACH_SUN8I
 309         default "sun9i" if MACH_SUN9I
 310         default "sun50i" if MACH_SUN50I
 311
 312 config SYS_BOARD
 313         default "sunxi"
 314
 315 config SYS_SOC
 316         default "sunxi"
 317
 318 config UART0_PORT_F
 319         bool "UART0 on MicroSD breakout board"
 320         default n
 321         ---help---
 322         Repurpose the SD card slot for getting access to the UART0 serial
 323         console. Primarily useful only for low level u-boot debugging on
 324         tablets, where normal UART0 is difficult to access and requires
 325         device disassembly and/or soldering. As the SD card can't be used
 326         at the same time, the system can be only booted in the FEL mode.
 327         Only enable this if you really know what you are doing.
 328
 329 config OLD_SUNXI_KERNEL_COMPAT
 330         bool "Enable workarounds for booting old kernels"
 331         default n
 332         ---help---
 333         Set this to enable various workarounds for old kernels, this results in
 334         sub-optimal settings for newer kernels, only enable if needed.
 335
 336 config MMC0_CD_PIN
 337         string "Card detect pin for mmc0"
 338         default "PF6" if MACH_SUN8I_A83T || MACH_SUN8I_H3 || MACH_SUN50I
 339         default ""
 340         ---help---
 341         Set the card detect pin for mmc0, leave empty to not use cd. This
 342         takes a string in the format understood by sunxi_name_to_gpio, e.g.
 343         PH1 for pin 1 of port H.
 344
 345 config MMC1_CD_PIN
 346         string "Card detect pin for mmc1"
 347         default ""
 348         ---help---
 349         See MMC0_CD_PIN help text.
 350
 351 config MMC2_CD_PIN
 352         string "Card detect pin for mmc2"
 353         default ""
 354         ---help---
 355         See MMC0_CD_PIN help text.
 356
 357 config MMC3_CD_PIN
 358         string "Card detect pin for mmc3"
 359         default ""
 360         ---help---
 361         See MMC0_CD_PIN help text.
 362
 363 config MMC1_PINS
 364         string "Pins for mmc1"
 365         default ""
 366         ---help---
 367         Set the pins used for mmc1, when applicable. This takes a string in the
 368         format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
 369
 370 config MMC2_PINS
 371         string "Pins for mmc2"
 372         default ""
 373         ---help---
 374         See MMC1_PINS help text.
 375
 376 config MMC3_PINS
 377         string "Pins for mmc3"
 378         default ""
 379         ---help---
 380         See MMC1_PINS help text.
 381
 382 config MMC_SUNXI_SLOT_EXTRA
 383         int "mmc extra slot number"
 384         default -1
 385         ---help---
 386         sunxi builds always enable mmc0, some boards also have a second sdcard
 387         slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
 388         support for this.
 389
 390 config INITIAL_USB_SCAN_DELAY
 391         int "delay initial usb scan by x ms to allow builtin devices to init"
 392         default 0
 393         ---help---
 394         Some boards have on board usb devices which need longer than the
 395         USB spec's 1 second to connect from board powerup. Set this config
 396         option to a non 0 value to add an extra delay before the first usb
 397         bus scan.
 398
 399 config USB0_VBUS_PIN
 400         string "Vbus enable pin for usb0 (otg)"
 401         default ""
 402         ---help---
 403         Set the Vbus enable pin for usb0 (otg). This takes a string in the
 404         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 405
 406 config USB0_VBUS_DET
 407         string "Vbus detect pin for usb0 (otg)"
 408         default ""
 409         ---help---
 410         Set the Vbus detect pin for usb0 (otg). This takes a string in the
 411         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 412
 413 config USB0_ID_DET
 414         string "ID detect pin for usb0 (otg)"
 415         default ""
 416         ---help---
 417         Set the ID detect pin for usb0 (otg). This takes a string in the
 418         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 419
 420 config USB1_VBUS_PIN
 421         string "Vbus enable pin for usb1 (ehci0)"
 422         default "PH6" if MACH_SUN4I || MACH_SUN7I
 423         default "PH27" if MACH_SUN6I
 424         ---help---
 425         Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
 426         a string in the format understood by sunxi_name_to_gpio, e.g.
 427         PH1 for pin 1 of port H.
 428
 429 config USB2_VBUS_PIN
 430         string "Vbus enable pin for usb2 (ehci1)"
 431         default "PH3" if MACH_SUN4I || MACH_SUN7I
 432         default "PH24" if MACH_SUN6I
 433         ---help---
 434         See USB1_VBUS_PIN help text.
 435
 436 config USB3_VBUS_PIN
 437         string "Vbus enable pin for usb3 (ehci2)"
 438         default ""
 439         ---help---
 440         See USB1_VBUS_PIN help text.
 441
 442 config I2C0_ENABLE
 443         bool "Enable I2C/TWI controller 0"
 444         default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
 445         default n if MACH_SUN6I || MACH_SUN8I
 446         select CMD_I2C
 447         ---help---
 448         This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
 449         its clock and setting up the bus. This is especially useful on devices
 450         with slaves connected to the bus or with pins exposed through e.g. an
 451         expansion port/header.
 452
 453 config I2C1_ENABLE
 454         bool "Enable I2C/TWI controller 1"
 455         default n
 456         select CMD_I2C
 457         ---help---
 458         See I2C0_ENABLE help text.
 459
 460 config I2C2_ENABLE
 461         bool "Enable I2C/TWI controller 2"
 462         default n
 463         select CMD_I2C
 464         ---help---
 465         See I2C0_ENABLE help text.
 466
 467 if MACH_SUN6I || MACH_SUN7I
 468 config I2C3_ENABLE
 469         bool "Enable I2C/TWI controller 3"
 470         default n
 471         select CMD_I2C
 472         ---help---
 473         See I2C0_ENABLE help text.
 474 endif
 475
 476 if SUNXI_GEN_SUN6I
 477 config R_I2C_ENABLE
 478         bool "Enable the PRCM I2C/TWI controller"
 479         # This is used for the pmic on H3
 480         default y if SY8106A_POWER
 481         select CMD_I2C
 482         ---help---
 483         Set this to y to enable the I2C controller which is part of the PRCM.
 484 endif
 485
 486 if MACH_SUN7I
 487 config I2C4_ENABLE
 488         bool "Enable I2C/TWI controller 4"
 489         default n
 490         select CMD_I2C
 491         ---help---
 492         See I2C0_ENABLE help text.
 493 endif
 494
 495 config AXP_GPIO
 496         bool "Enable support for gpio-s on axp PMICs"
 497         default n
 498         ---help---
 499         Say Y here to enable support for the gpio pins of the axp PMIC ICs.
 500
 501 config VIDEO
 502         bool "Enable graphical uboot console on HDMI, LCD or VGA"
 503         depends on !MACH_SUN8I_A83T && !MACH_SUN8I_H3 && !MACH_SUN9I && !MACH_SUN50I
 504         default y
 505         ---help---
 506         Say Y here to add support for using a cfb console on the HDMI, LCD
 507         or VGA output found on most sunxi devices. See doc/README.video for
 508         info on how to select the video output and mode.
 509
 510 config VIDEO_HDMI
 511         bool "HDMI output support"
 512         depends on VIDEO && !MACH_SUN8I
 513         default y
 514         ---help---
 515         Say Y here to add support for outputting video over HDMI.
 516
 517 config VIDEO_VGA
 518         bool "VGA output support"
 519         depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
 520         default n
 521         ---help---
 522         Say Y here to add support for outputting video over VGA.
 523
 524 config VIDEO_VGA_VIA_LCD
 525         bool "VGA via LCD controller support"
 526         depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
 527         default n
 528         ---help---
 529         Say Y here to add support for external DACs connected to the parallel
 530         LCD interface driving a VGA connector, such as found on the
 531         Olimex A13 boards.
 532
 533 config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
 534         bool "Force sync active high for VGA via LCD controller support"
 535         depends on VIDEO_VGA_VIA_LCD
 536         default n
 537         ---help---
 538         Say Y here if you've a board which uses opendrain drivers for the vga
 539         hsync and vsync signals. Opendrain drivers cannot generate steep enough
 540         positive edges for a stable video output, so on boards with opendrain
 541         drivers the sync signals must always be active high.
 542
 543 config VIDEO_VGA_EXTERNAL_DAC_EN
 544         string "LCD panel power enable pin"
 545         depends on VIDEO_VGA_VIA_LCD
 546         default ""
 547         ---help---
 548         Set the enable pin for the external VGA DAC. This takes a string in the
 549         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 550
 551 config VIDEO_COMPOSITE
 552         bool "Composite video output support"
 553         depends on VIDEO && (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
 554         default n
 555         ---help---
 556         Say Y here to add support for outputting composite video.
 557
 558 config VIDEO_LCD_MODE
 559         string "LCD panel timing details"
 560         depends on VIDEO
 561         default ""
 562         ---help---
 563         LCD panel timing details string, leave empty if there is no LCD panel.
 564         This is in drivers/video/videomodes.c: video_get_params() format, e.g.
 565         x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
 566         Also see: http://linux-sunxi.org/LCD
 567
 568 config VIDEO_LCD_DCLK_PHASE
 569         int "LCD panel display clock phase"
 570         depends on VIDEO
 571         default 1
 572         ---help---
 573         Select LCD panel display clock phase shift, range 0-3.
 574
 575 config VIDEO_LCD_POWER
 576         string "LCD panel power enable pin"
 577         depends on VIDEO
 578         default ""
 579         ---help---
 580         Set the power enable pin for the LCD panel. This takes a string in the
 581         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 582
 583 config VIDEO_LCD_RESET
 584         string "LCD panel reset pin"
 585         depends on VIDEO
 586         default ""
 587         ---help---
 588         Set the reset pin for the LCD panel. This takes a string in the format
 589         understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 590
 591 config VIDEO_LCD_BL_EN
 592         string "LCD panel backlight enable pin"
 593         depends on VIDEO
 594         default ""
 595         ---help---
 596         Set the backlight enable pin for the LCD panel. This takes a string in the
 597         the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
 598         port H.
 599
 600 config VIDEO_LCD_BL_PWM
 601         string "LCD panel backlight pwm pin"
 602         depends on VIDEO
 603         default ""
 604         ---help---
 605         Set the backlight pwm pin for the LCD panel. This takes a string in the
 606         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 607
 608 config VIDEO_LCD_BL_PWM_ACTIVE_LOW
 609         bool "LCD panel backlight pwm is inverted"
 610         depends on VIDEO
 611         default y
 612         ---help---
 613         Set this if the backlight pwm output is active low.
 614
 615 config VIDEO_LCD_PANEL_I2C
 616         bool "LCD panel needs to be configured via i2c"
 617         depends on VIDEO
 618         default n
 619         select CMD_I2C
 620         ---help---
 621         Say y here if the LCD panel needs to be configured via i2c. This
 622         will add a bitbang i2c controller using gpios to talk to the LCD.
 623
 624 config VIDEO_LCD_PANEL_I2C_SDA
 625         string "LCD panel i2c interface SDA pin"
 626         depends on VIDEO_LCD_PANEL_I2C
 627         default "PG12"
 628         ---help---
 629         Set the SDA pin for the LCD i2c interface. This takes a string in the
 630         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 631
 632 config VIDEO_LCD_PANEL_I2C_SCL
 633         string "LCD panel i2c interface SCL pin"
 634         depends on VIDEO_LCD_PANEL_I2C
 635         default "PG10"
 636         ---help---
 637         Set the SCL pin for the LCD i2c interface. This takes a string in the
 638         format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
 639
 640
 641 # Note only one of these may be selected at a time! But hidden choices are
 642 # not supported by Kconfig
 643 config VIDEO_LCD_IF_PARALLEL
 644         bool
 645
 646 config VIDEO_LCD_IF_LVDS
 647         bool
 648
 649
 650 choice
 651         prompt "LCD panel support"
 652         depends on VIDEO
 653         ---help---
 654         Select which type of LCD panel to support.
 655
 656 config VIDEO_LCD_PANEL_PARALLEL
 657         bool "Generic parallel interface LCD panel"
 658         select VIDEO_LCD_IF_PARALLEL
 659
 660 config VIDEO_LCD_PANEL_LVDS
 661         bool "Generic lvds interface LCD panel"
 662         select VIDEO_LCD_IF_LVDS
 663
 664 config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
 665         bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
 666         select VIDEO_LCD_SSD2828
 667         select VIDEO_LCD_IF_PARALLEL
 668         ---help---
 669         7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
 670
 671 config VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
 672         bool "eDP 4-lane, 1.62G LCD panel via ANX9804 bridge chip"
 673         select VIDEO_LCD_ANX9804
 674         select VIDEO_LCD_IF_PARALLEL
 675         select VIDEO_LCD_PANEL_I2C
 676         ---help---
 677         Select this for eDP LCD panels with 4 lanes running at 1.62G,
 678         connected via an ANX9804 bridge chip.
 679
 680 config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
 681         bool "Hitachi tx18d42vm LCD panel"
 682         select VIDEO_LCD_HITACHI_TX18D42VM
 683         select VIDEO_LCD_IF_LVDS
 684         ---help---
 685         7.85" 1024x768 Hitachi tx18d42vm LCD panel support
 686
 687 config VIDEO_LCD_TL059WV5C0
 688         bool "tl059wv5c0 LCD panel"
 689         select VIDEO_LCD_PANEL_I2C
 690         select VIDEO_LCD_IF_PARALLEL
 691         ---help---
 692         6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
 693         Aigo M60/M608/M606 tablets.
 694
 695 endchoice
 696
 697
 698 config GMAC_TX_DELAY
 699         int "GMAC Transmit Clock Delay Chain"
 700         default 0
 701         ---help---
 702         Set the GMAC Transmit Clock Delay Chain value.
 703
 704 config SPL_STACK_R_ADDR
 705         default 0x4fe00000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN7I || MACH_SUN8I || MACH_SUN50I
 706         default 0x2fe00000 if MACH_SUN9I
 707
 708 endif