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git.ipfire.org Git - people/ms/u-boot.git/blob - board/total5200/sdram.c
2 * (C) Copyright 2003-2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * Mark Jonas, Freescale Semiconductor, mark.jonas@freescale.com.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 #ifndef CONFIG_SYS_RAMBOOT
33 static void mpc5xxx_sdram_start (sdram_conf_t
*sdram_conf
, int hi_addr
)
35 long hi_addr_bit
= hi_addr
? 0x01000000 : 0;
37 /* unlock mode register */
38 *(vu_long
*)MPC5XXX_SDRAM_CTRL
= sdram_conf
->control
| 0x80000000 | hi_addr_bit
;
39 __asm__
volatile ("sync");
41 /* precharge all banks */
42 *(vu_long
*)MPC5XXX_SDRAM_CTRL
= sdram_conf
->control
| 0x80000002 | hi_addr_bit
;
43 __asm__
volatile ("sync");
45 if (sdram_conf
->ddr
) {
46 /* set mode register: extended mode */
47 *(vu_long
*)MPC5XXX_SDRAM_MODE
= sdram_conf
->emode
;
48 __asm__
volatile ("sync");
50 /* set mode register: reset DLL */
51 *(vu_long
*)MPC5XXX_SDRAM_MODE
= sdram_conf
->mode
| 0x04000000;
52 __asm__
volatile ("sync");
55 /* precharge all banks */
56 *(vu_long
*)MPC5XXX_SDRAM_CTRL
= sdram_conf
->control
| 0x80000002 | hi_addr_bit
;
57 __asm__
volatile ("sync");
60 *(vu_long
*)MPC5XXX_SDRAM_CTRL
= sdram_conf
->control
| 0x80000004 | hi_addr_bit
;
61 __asm__
volatile ("sync");
63 /* set mode register */
64 *(vu_long
*)MPC5XXX_SDRAM_MODE
= sdram_conf
->mode
;
65 __asm__
volatile ("sync");
67 /* normal operation */
68 *(vu_long
*)MPC5XXX_SDRAM_CTRL
= sdram_conf
->control
| hi_addr_bit
;
69 __asm__
volatile ("sync");
74 * ATTENTION: Although partially referenced initdram does NOT make real use
75 * use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE
76 * is something else than 0x00000000.
79 #if defined(CONFIG_MPC5200)
80 long int mpc5xxx_sdram_init (sdram_conf_t
*sdram_conf
)
84 #ifndef CONFIG_SYS_RAMBOOT
87 /* setup SDRAM chip selects */
88 *(vu_long
*)MPC5XXX_SDRAM_CS0CFG
= 0x0000001e;/* 2G at 0x0 */
89 *(vu_long
*)MPC5XXX_SDRAM_CS1CFG
= 0x80000000;/* disabled */
90 __asm__
volatile ("sync");
92 /* setup config registers */
93 *(vu_long
*)MPC5XXX_SDRAM_CONFIG1
= sdram_conf
->config1
;
94 *(vu_long
*)MPC5XXX_SDRAM_CONFIG2
= sdram_conf
->config2
;
95 __asm__
volatile ("sync");
97 if (sdram_conf
->ddr
) {
99 *(vu_long
*)MPC5XXX_CDM_PORCFG
= sdram_conf
->tapdelay
;
100 __asm__
volatile ("sync");
103 /* find RAM size using SDRAM CS0 only */
104 mpc5xxx_sdram_start(sdram_conf
, 0);
105 test1
= get_ram_size((long *)CONFIG_SYS_SDRAM_BASE
, 0x80000000);
106 mpc5xxx_sdram_start(sdram_conf
, 1);
107 test2
= get_ram_size((long *)CONFIG_SYS_SDRAM_BASE
, 0x80000000);
109 mpc5xxx_sdram_start(sdram_conf
, 0);
115 /* memory smaller than 1MB is impossible */
116 if (dramsize
< (1 << 20)) {
120 /* set SDRAM CS0 size according to the amount of RAM found */
122 *(vu_long
*)MPC5XXX_SDRAM_CS0CFG
= 0x13 + __builtin_ffs(dramsize
>> 20) - 1;
124 *(vu_long
*)MPC5XXX_SDRAM_CS0CFG
= 0; /* disabled */
127 /* let SDRAM CS1 start right after CS0 */
128 *(vu_long
*)MPC5XXX_SDRAM_CS1CFG
= dramsize
+ 0x0000001e;/* 2G */
130 /* find RAM size using SDRAM CS1 only */
131 mpc5xxx_sdram_start(sdram_conf
, 0);
132 test1
= get_ram_size((long *)(CONFIG_SYS_SDRAM_BASE
+ dramsize
), 0x80000000);
133 mpc5xxx_sdram_start(sdram_conf
, 1);
134 test2
= get_ram_size((long *)(CONFIG_SYS_SDRAM_BASE
+ dramsize
), 0x80000000);
136 mpc5xxx_sdram_start(sdram_conf
, 0);
142 /* memory smaller than 1MB is impossible */
143 if (dramsize2
< (1 << 20)) {
147 /* set SDRAM CS1 size according to the amount of RAM found */
149 *(vu_long
*)MPC5XXX_SDRAM_CS1CFG
= dramsize
150 | (0x13 + __builtin_ffs(dramsize2
>> 20) - 1);
152 *(vu_long
*)MPC5XXX_SDRAM_CS1CFG
= dramsize
; /* disabled */
155 #else /* CONFIG_SYS_RAMBOOT */
157 /* retrieve size of memory connected to SDRAM CS0 */
158 dramsize
= *(vu_long
*)MPC5XXX_SDRAM_CS0CFG
& 0xFF;
159 if (dramsize
>= 0x13) {
160 dramsize
= (1 << (dramsize
- 0x13)) << 20;
165 /* retrieve size of memory connected to SDRAM CS1 */
166 dramsize2
= *(vu_long
*)MPC5XXX_SDRAM_CS1CFG
& 0xFF;
167 if (dramsize2
>= 0x13) {
168 dramsize2
= (1 << (dramsize2
- 0x13)) << 20;
173 #endif /* CONFIG_SYS_RAMBOOT */
175 return dramsize
+ dramsize2
;
178 #elif defined(CONFIG_MGT5100)
180 long int mpc5xxx_sdram_init (sdram_conf_t
*sdram_conf
)
183 #ifndef CONFIG_SYS_RAMBOOT
186 /* setup and enable SDRAM chip selects */
187 *(vu_long
*)MPC5XXX_SDRAM_START
= 0x00000000;
188 *(vu_long
*)MPC5XXX_SDRAM_STOP
= 0x0000ffff;/* 2G */
189 *(vu_long
*)MPC5XXX_ADDECR
|= (1 << 22); /* Enable SDRAM */
190 __asm__
volatile ("sync");
192 /* setup config registers */
193 *(vu_long
*)MPC5XXX_SDRAM_CONFIG1
= sdram_conf
->config1
;
194 *(vu_long
*)MPC5XXX_SDRAM_CONFIG2
= sdram_conf
->config2
;
196 /* address select register */
197 *(vu_long
*)MPC5XXX_SDRAM_XLBSEL
= sdram_conf
->addrsel
;
198 __asm__
volatile ("sync");
201 mpc5xxx_sdram_start(sdram_conf
, 0);
202 test1
= get_ram_size((long *)CONFIG_SYS_SDRAM_BASE
, 0x80000000);
203 mpc5xxx_sdram_start(sdram_conf
, 1);
204 test2
= get_ram_size((long *)CONFIG_SYS_SDRAM_BASE
, 0x80000000);
206 mpc5xxx_sdram_start(sdram_conf
, 0);
212 /* set SDRAM end address according to size */
213 *(vu_long
*)MPC5XXX_SDRAM_STOP
= ((dramsize
- 1) >> 15);
215 #else /* CONFIG_SYS_RAMBOOT */
217 /* Retrieve amount of SDRAM available */
218 dramsize
= ((*(vu_long
*)MPC5XXX_SDRAM_STOP
+ 1) << 15);
220 #endif /* CONFIG_SYS_RAMBOOT */
226 #error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined