3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
6 * Gregory E. Allen, gallen@arlut.utexas.edu
7 * Matthew E. Karger, karger@arlut.utexas.edu
8 * Applied Research Laboratories, The University of Texas at Austin
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #include <asm/processor.h>
42 ulong busfreq
= get_bus_freq(0);
45 printf("Board: UTX8245 Local Bus at %s MHz\n", strmhz(buf
, busfreq
));
50 phys_size_t
initdram(int board_type
)
58 size
= get_ram_size(CONFIG_SYS_SDRAM_BASE
, CONFIG_SYS_MAX_RAM_SIZE
);
60 new_bank0_end
= size
/2 - 1;
61 new_bank1_end
= size
- 1;
62 mear1
= mpc824x_mpc107_getreg(MEAR1
);
63 emear1
= mpc824x_mpc107_getreg(EMEAR1
);
65 mear1
= (mear1
& 0xFFFF0000) |
66 ((new_bank0_end
& MICR_ADDR_MASK
) >> MICR_ADDR_SHIFT
) |
67 ((new_bank1_end
& MICR_ADDR_MASK
) >> MICR_ADDR_SHIFT
<< 8);
68 emear1
= (emear1
& 0xFFFF0000) |
69 ((new_bank0_end
& MICR_EADDR_MASK
) >> MICR_EADDR_SHIFT
) |
70 ((new_bank1_end
& MICR_EADDR_MASK
) >> MICR_EADDR_SHIFT
<< 8);
72 mpc824x_mpc107_setreg(MEAR1
, mear1
);
73 mpc824x_mpc107_setreg(EMEAR1
, emear1
);
80 * Initialize PCI Devices, report devices found.
83 static struct pci_config_table pci_utx8245_config_table
[] = {
84 #ifndef CONFIG_PCI_PNP
85 { PCI_ANY_ID
, PCI_ANY_ID
, PCI_ANY_ID
, PCI_ANY_ID
, 0x0C, PCI_ANY_ID
,
86 pci_cfgfunc_config_device
, { PCI_ENET0_IOADDR
,
88 PCI_COMMAND_MEMORY
| PCI_COMMAND_MASTER
}},
89 { PCI_ANY_ID
, PCI_ANY_ID
, PCI_ANY_ID
, PCI_ANY_ID
, 0x0B, PCI_ANY_ID
,
90 pci_cfgfunc_config_device
, { PCI_FIREWIRE_IOADDR
,
92 PCI_COMMAND_MEMORY
| PCI_COMMAND_MASTER
}},
93 #endif /*CONFIG_PCI_PNP*/
98 static void pci_utx8245_fixup_irq(struct pci_controller
*hose
, pci_dev_t dev
)
100 if (PCI_DEV(dev
) == 11)
101 /* assign serial interrupt line 9 (int25) to FireWire */
102 pci_hose_write_config_byte(hose
, dev
, PCI_INTERRUPT_LINE
, 25);
104 else if (PCI_DEV(dev
) == 12)
105 /* assign serial interrupt line 8 (int24) to Ethernet */
106 pci_hose_write_config_byte(hose
, dev
, PCI_INTERRUPT_LINE
, 24);
108 else if (PCI_DEV(dev
) == 14)
109 /* assign serial interrupt line 0 (int16) to PMC slot 0 */
110 pci_hose_write_config_byte(hose
, dev
, PCI_INTERRUPT_LINE
, 16);
112 else if (PCI_DEV(dev
) == 15)
113 /* assign serial interrupt line 1 (int17) to PMC slot 1 */
114 pci_hose_write_config_byte(hose
, dev
, PCI_INTERRUPT_LINE
, 17);
117 static struct pci_controller utx8245_hose
= {
118 #ifndef CONFIG_PCI_PNP
119 config_table
: pci_utx8245_config_table
,
120 fixup_irq
: pci_utx8245_fixup_irq
,
121 write_byte
: pci_hose_write_config_byte
122 #endif /*CONFIG_PCI_PNP*/
125 void pci_init_board (void)
127 pci_mpc824x_init(&utx8245_hose
);
132 int board_eth_init(bd_t
*bis
)
134 return pci_eth_init(bis
);