cpu/arm920t/start.S

   1 /*
   2  *  armboot - Startup Code for ARM920 CPU-core
   3  *
   4  *  Copyright (c) 2001  Marius Gröger <mag@sysgo.de>
   5  *  Copyright (c) 2002  Alex Züpke <azu@sysgo.de>
   6  *  Copyright (c) 2002  Gary Jennejohn <gj@denx.de>
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27
  28 #include <config.h>
  29 #include <version.h>
  30 #include <status_led.h>
  31
  32 /*
  33  *************************************************************************
  34  *
  35  * Jump vector table as in table 3.1 in [1]
  36  *
  37  *************************************************************************
  38  */
  39
  40
  41 .globl _start
  42 _start: b       start_code
  43         ldr     pc, _undefined_instruction
  44         ldr     pc, _software_interrupt
  45         ldr     pc, _prefetch_abort
  46         ldr     pc, _data_abort
  47         ldr     pc, _not_used
  48         ldr     pc, _irq
  49         ldr     pc, _fiq
  50
  51 _undefined_instruction: .word undefined_instruction
  52 _software_interrupt:    .word software_interrupt
  53 _prefetch_abort:        .word prefetch_abort
  54 _data_abort:            .word data_abort
  55 _not_used:              .word not_used
  56 _irq:                   .word irq
  57 _fiq:                   .word fiq
  58
  59         .balignl 16,0xdeadbeef
  60
  61
  62 /*
  63  *************************************************************************
  64  *
  65  * Startup Code (called from the ARM reset exception vector)
  66  *
  67  * do important init only if we don't start from memory!
  68  * relocate armboot to ram
  69  * setup stack
  70  * jump to second stage
  71  *
  72  *************************************************************************
  73  */
  74
  75 _TEXT_BASE:
  76         .word   TEXT_BASE
  77
  78 .globl _armboot_start
  79 _armboot_start:
  80         .word _start
  81
  82 /*
  83  * These are defined in the board-specific linker script.
  84  */
  85 .globl _bss_start
  86 _bss_start:
  87         .word __bss_start
  88
  89 .globl _bss_end
  90 _bss_end:
  91         .word _end
  92
  93 #ifdef CONFIG_USE_IRQ
  94 /* IRQ stack memory (calculated at run-time) */
  95 .globl IRQ_STACK_START
  96 IRQ_STACK_START:
  97         .word   0x0badc0de
  98
  99 /* IRQ stack memory (calculated at run-time) */
 100 .globl FIQ_STACK_START
 101 FIQ_STACK_START:
 102         .word 0x0badc0de
 103 #endif
 104
 105
 106 /*
 107  * the actual start code
 108  */
 109
 110 start_code:
 111         /*
 112          * set the cpu to SVC32 mode
 113          */
 114         mrs     r0,cpsr
 115         bic     r0,r0,#0x1f
 116         orr     r0,r0,#0xd3
 117         msr     cpsr,r0
 118
 119         bl coloured_LED_init
 120         bl red_LED_on
 121
 122 #if     defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
 123         /*
 124          * relocate exception table
 125          */
 126         ldr     r0, =_start
 127         ldr     r1, =0x0
 128         mov     r2, #16
 129 copyex:
 130         subs    r2, r2, #1
 131         ldr     r3, [r0], #4
 132         str     r3, [r1], #4
 133         bne     copyex
 134 #endif
 135
 136 #if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
 137         /* turn off the watchdog */
 138
 139 # if defined(CONFIG_S3C2400)
 140 #  define pWTCON                0x15300000
 141 #  define INTMSK                0x14400008      /* Interupt-Controller base addresses */
 142 #  define CLKDIVN       0x14800014      /* clock divisor register */
 143 #else
 144 #  define pWTCON                0x53000000
 145 #  define INTMSK                0x4A000008      /* Interupt-Controller base addresses */
 146 #  define INTSUBMSK     0x4A00001C
 147 #  define CLKDIVN       0x4C000014      /* clock divisor register */
 148 # endif
 149
 150         ldr     r0, =pWTCON
 151         mov     r1, #0x0
 152         str     r1, [r0]
 153
 154         /*
 155          * mask all IRQs by setting all bits in the INTMR - default
 156          */
 157         mov     r1, #0xffffffff
 158         ldr     r0, =INTMSK
 159         str     r1, [r0]
 160 # if defined(CONFIG_S3C2410)
 161         ldr     r1, =0x3ff
 162         ldr     r0, =INTSUBMSK
 163         str     r1, [r0]
 164 # endif
 165
 166         /* FCLK:HCLK:PCLK = 1:2:4 */
 167         /* default FCLK is 120 MHz ! */
 168         ldr     r0, =CLKDIVN
 169         mov     r1, #3
 170         str     r1, [r0]
 171 #endif  /* CONFIG_S3C2400 || CONFIG_S3C2410 */
 172
 173         /*
 174          * we do sys-critical inits only at reboot,
 175          * not when booting from ram!
 176          */
 177 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 178         bl      cpu_init_crit
 179 #endif
 180
 181 #ifndef CONFIG_AT91RM9200
 182
 183 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
 184 relocate:                               /* relocate U-Boot to RAM           */
 185         adr     r0, _start              /* r0 <- current position of code   */
 186         ldr     r1, _TEXT_BASE          /* test if we run from flash or RAM */
 187         cmp     r0, r1                  /* don't reloc during debug         */
 188         beq     stack_setup
 189
 190         ldr     r2, _armboot_start
 191         ldr     r3, _bss_start
 192         sub     r2, r3, r2              /* r2 <- size of armboot            */
 193         add     r2, r0, r2              /* r2 <- source end address         */
 194
 195 copy_loop:
 196         ldmia   r0!, {r3-r10}           /* copy from source address [r0]    */
 197         stmia   r1!, {r3-r10}           /* copy to   target address [r1]    */
 198         cmp     r0, r2                  /* until source end addreee [r2]    */
 199         ble     copy_loop
 200 #endif  /* CONFIG_SKIP_RELOCATE_UBOOT */
 201 #endif
 202         /* Set up the stack                                                 */
 203 stack_setup:
 204         ldr     r0, _TEXT_BASE          /* upper 128 KiB: relocated uboot   */
 205         sub     r0, r0, #CFG_MALLOC_LEN /* malloc area                      */
 206         sub     r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo                        */
 207 #ifdef CONFIG_USE_IRQ
 208         sub     r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
 209 #endif
 210         sub     sp, r0, #12             /* leave 3 words for abort-stack    */
 211
 212 clear_bss:
 213         ldr     r0, _bss_start          /* find start of bss segment        */
 214         ldr     r1, _bss_end            /* stop here                        */
 215         mov     r2, #0x00000000         /* clear                            */
 216
 217 clbss_l:str     r2, [r0]                /* clear loop...                    */
 218         add     r0, r0, #4
 219         cmp     r0, r1
 220         ble     clbss_l
 221
 222         ldr     pc, _start_armboot
 223
 224 _start_armboot: .word start_armboot
 225
 226
 227 /*
 228  *************************************************************************
 229  *
 230  * CPU_init_critical registers
 231  *
 232  * setup important registers
 233  * setup memory timing
 234  *
 235  *************************************************************************
 236  */
 237
 238
 239 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 240 cpu_init_crit:
 241         /*
 242          * flush v4 I/D caches
 243          */
 244         mov     r0, #0
 245         mcr     p15, 0, r0, c7, c7, 0   /* flush v3/v4 cache */
 246         mcr     p15, 0, r0, c8, c7, 0   /* flush v4 TLB */
 247
 248         /*
 249          * disable MMU stuff and caches
 250          */
 251         mrc     p15, 0, r0, c1, c0, 0
 252         bic     r0, r0, #0x00002300     @ clear bits 13, 9:8 (--V- --RS)
 253         bic     r0, r0, #0x00000087     @ clear bits 7, 2:0 (B--- -CAM)
 254         orr     r0, r0, #0x00000002     @ set bit 2 (A) Align
 255         orr     r0, r0, #0x00001000     @ set bit 12 (I) I-Cache
 256         mcr     p15, 0, r0, c1, c0, 0
 257
 258         /*
 259          * before relocating, we have to setup RAM timing
 260          * because memory timing is board-dependend, you will
 261          * find a lowlevel_init.S in your board directory.
 262          */
 263         mov     ip, lr
 264 #if     defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
 265
 266 #else
 267         bl      lowlevel_init
 268 #endif
 269         mov     lr, ip
 270         mov     pc, lr
 271 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
 272
 273 /*
 274  *************************************************************************
 275  *
 276  * Interrupt handling
 277  *
 278  *************************************************************************
 279  */
 280
 281 @
 282 @ IRQ stack frame.
 283 @
 284 #define S_FRAME_SIZE    72
 285
 286 #define S_OLD_R0        68
 287 #define S_PSR           64
 288 #define S_PC            60
 289 #define S_LR            56
 290 #define S_SP            52
 291
 292 #define S_IP            48
 293 #define S_FP            44
 294 #define S_R10           40
 295 #define S_R9            36
 296 #define S_R8            32
 297 #define S_R7            28
 298 #define S_R6            24
 299 #define S_R5            20
 300 #define S_R4            16
 301 #define S_R3            12
 302 #define S_R2            8
 303 #define S_R1            4
 304 #define S_R0            0
 305
 306 #define MODE_SVC 0x13
 307 #define I_BIT    0x80
 308
 309 /*
 310  * use bad_save_user_regs for abort/prefetch/undef/swi ...
 311  * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
 312  */
 313
 314         .macro  bad_save_user_regs
 315         sub     sp, sp, #S_FRAME_SIZE
 316         stmia   sp, {r0 - r12}                  @ Calling r0-r12
 317         ldr     r2, _armboot_start
 318         sub     r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
 319         sub     r2, r2, #(CFG_GBL_DATA_SIZE+8)  @ set base 2 words into abort stack
 320         ldmia   r2, {r2 - r3}                   @ get pc, cpsr
 321         add     r0, sp, #S_FRAME_SIZE           @ restore sp_SVC
 322
 323         add     r5, sp, #S_SP
 324         mov     r1, lr
 325         stmia   r5, {r0 - r3}                   @ save sp_SVC, lr_SVC, pc, cpsr
 326         mov     r0, sp
 327         .endm
 328
 329         .macro  irq_save_user_regs
 330         sub     sp, sp, #S_FRAME_SIZE
 331         stmia   sp, {r0 - r12}                  @ Calling r0-r12
 332         add     r7, sp, #S_PC
 333         stmdb   r7, {sp, lr}^                   @ Calling SP, LR
 334         str     lr, [r7, #0]                    @ Save calling PC
 335         mrs     r6, spsr
 336         str     r6, [r7, #4]                    @ Save CPSR
 337         str     r0, [r7, #8]                    @ Save OLD_R0
 338         mov     r0, sp
 339         .endm
 340
 341         .macro  irq_restore_user_regs
 342         ldmia   sp, {r0 - lr}^                  @ Calling r0 - lr
 343         mov     r0, r0
 344         ldr     lr, [sp, #S_PC]                 @ Get PC
 345         add     sp, sp, #S_FRAME_SIZE
 346         subs    pc, lr, #4                      @ return & move spsr_svc into cpsr
 347         .endm
 348
 349         .macro get_bad_stack
 350         ldr     r13, _armboot_start             @ setup our mode stack
 351         sub     r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
 352         sub     r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
 353
 354         str     lr, [r13]                       @ save caller lr / spsr
 355         mrs     lr, spsr
 356         str     lr, [r13, #4]
 357
 358         mov     r13, #MODE_SVC                  @ prepare SVC-Mode
 359         @ msr   spsr_c, r13
 360         msr     spsr, r13
 361         mov     lr, pc
 362         movs    pc, lr
 363         .endm
 364
 365         .macro get_irq_stack                    @ setup IRQ stack
 366         ldr     sp, IRQ_STACK_START
 367         .endm
 368
 369         .macro get_fiq_stack                    @ setup FIQ stack
 370         ldr     sp, FIQ_STACK_START
 371         .endm
 372
 373 /*
 374  * exception handlers
 375  */
 376         .align  5
 377 undefined_instruction:
 378         get_bad_stack
 379         bad_save_user_regs
 380         bl      do_undefined_instruction
 381
 382         .align  5
 383 software_interrupt:
 384         get_bad_stack
 385         bad_save_user_regs
 386         bl      do_software_interrupt
 387
 388         .align  5
 389 prefetch_abort:
 390         get_bad_stack
 391         bad_save_user_regs
 392         bl      do_prefetch_abort
 393
 394         .align  5
 395 data_abort:
 396         get_bad_stack
 397         bad_save_user_regs
 398         bl      do_data_abort
 399
 400         .align  5
 401 not_used:
 402         get_bad_stack
 403         bad_save_user_regs
 404         bl      do_not_used
 405
 406 #ifdef CONFIG_USE_IRQ
 407
 408         .align  5
 409 irq:
 410         get_irq_stack
 411         irq_save_user_regs
 412         bl      do_irq
 413         irq_restore_user_regs
 414
 415         .align  5
 416 fiq:
 417         get_fiq_stack
 418         /* someone ought to write a more effiction fiq_save_user_regs */
 419         irq_save_user_regs
 420         bl      do_fiq
 421         irq_restore_user_regs
 422
 423 #else
 424
 425         .align  5
 426 irq:
 427         get_bad_stack
 428         bad_save_user_regs
 429         bl      do_irq
 430
 431         .align  5
 432 fiq:
 433         get_bad_stack
 434         bad_save_user_regs
 435         bl      do_fiq
 436
 437 #endif