2 * Driver for ATMEL DataFlash support
3 * Author : Hamid Ikdoumi (Atmel)
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 #include <asm/arch/hardware.h>
24 #include <asm/arch/gpio.h>
25 #include <asm/arch/io.h>
26 #include <asm/arch/at91_pio.h>
27 #include <asm/arch/at91_spi.h>
29 #include <dataflash.h>
31 #define AT91_SPI_PCS0_DATAFLASH_CARD 0xE /* Chip Select 0: NPCS0%1110 */
32 #define AT91_SPI_PCS1_DATAFLASH_CARD 0xD /* Chip Select 0: NPCS0%1101 */
33 #define AT91_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3: NPCS3%0111 */
35 void AT91F_SpiInit(void)
38 writel(AT91_SPI_SWRST
, AT91_BASE_SPI
+ AT91_SPI_CR
);
40 /* Configure SPI in Master Mode with No CS selected !!! */
41 writel(AT91_SPI_MSTR
| AT91_SPI_MODFDIS
| AT91_SPI_PCS
,
42 AT91_BASE_SPI
+ AT91_SPI_MR
);
45 writel(AT91_SPI_NCPHA
|
46 (AT91_SPI_DLYBS
& DATAFLASH_TCSS
) |
47 (AT91_SPI_DLYBCT
& DATAFLASH_TCHS
) |
48 ((AT91_MASTER_CLOCK
/ AT91_SPI_CLK
) << 8),
49 AT91_BASE_SPI
+ AT91_SPI_CSR(0));
51 #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
53 writel(AT91_SPI_NCPHA
|
54 (AT91_SPI_DLYBS
& DATAFLASH_TCSS
) |
55 (AT91_SPI_DLYBCT
& DATAFLASH_TCHS
) |
56 ((AT91_MASTER_CLOCK
/ AT91_SPI_CLK
) << 8),
57 AT91_BASE_SPI
+ AT91_SPI_CSR(1));
60 #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
62 writel(AT91_SPI_NCPHA
|
63 (AT91_SPI_DLYBS
& DATAFLASH_TCSS
) |
64 (AT91_SPI_DLYBCT
& DATAFLASH_TCHS
) |
65 ((AT91_MASTER_CLOCK
/ AT91_SPI_CLK
) << 8),
66 AT91_BASE_SPI
+ AT91_SPI_CSR(3));
70 writel(AT91_SPI_SPIEN
, AT91_BASE_SPI
+ AT91_SPI_CR
);
72 while (!(readl(AT91_BASE_SPI
+ AT91_SPI_SR
) & AT91_SPI_SPIENS
));
75 * Add tempo to get SPI in a safe state.
76 * Should not be needed for new silicon (Rev B)
79 readl(AT91_BASE_SPI
+ AT91_SPI_SR
);
80 readl(AT91_BASE_SPI
+ AT91_SPI_RDR
);
84 void AT91F_SpiEnable(int cs
)
89 case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
90 mode
= readl(AT91_BASE_SPI
+ AT91_SPI_MR
);
92 writel(mode
| ((AT91_SPI_PCS0_DATAFLASH_CARD
<<16) & AT91_SPI_PCS
),
93 AT91_BASE_SPI
+ AT91_SPI_MR
);
95 case 1: /* Configure SPI CS1 for Serial DataFlash AT45DBxx */
96 mode
= readl(AT91_BASE_SPI
+ AT91_SPI_MR
);
98 writel(mode
| ((AT91_SPI_PCS1_DATAFLASH_CARD
<<16) & AT91_SPI_PCS
),
99 AT91_BASE_SPI
+ AT91_SPI_MR
);
102 mode
= readl(AT91_BASE_SPI
+ AT91_SPI_MR
);
104 writel(mode
| ((AT91_SPI_PCS3_DATAFLASH_CARD
<<16) & AT91_SPI_PCS
),
105 AT91_BASE_SPI
+ AT91_SPI_MR
);
110 writel(AT91_SPI_SPIEN
, AT91_BASE_SPI
+ AT91_SPI_CR
);
113 unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc
);
115 unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc
)
117 unsigned int timeout
;
121 writel(AT91_SPI_TXTDIS
+ AT91_SPI_RXTDIS
, AT91_BASE_SPI
+ AT91_SPI_PTCR
);
123 /* Initialize the Transmit and Receive Pointer */
124 writel((unsigned int)pDesc
->rx_cmd_pt
, AT91_BASE_SPI
+ AT91_SPI_RPR
);
125 writel((unsigned int)pDesc
->tx_cmd_pt
, AT91_BASE_SPI
+ AT91_SPI_TPR
);
127 /* Intialize the Transmit and Receive Counters */
128 writel(pDesc
->rx_cmd_size
, AT91_BASE_SPI
+ AT91_SPI_RCR
);
129 writel(pDesc
->tx_cmd_size
, AT91_BASE_SPI
+ AT91_SPI_TCR
);
131 if (pDesc
->tx_data_size
!= 0) {
132 /* Initialize the Next Transmit and Next Receive Pointer */
133 writel((unsigned int)pDesc
->rx_data_pt
, AT91_BASE_SPI
+ AT91_SPI_RNPR
);
134 writel((unsigned int)pDesc
->tx_data_pt
, AT91_BASE_SPI
+ AT91_SPI_TNPR
);
136 /* Intialize the Next Transmit and Next Receive Counters */
137 writel(pDesc
->rx_data_size
, AT91_BASE_SPI
+ AT91_SPI_RNCR
);
138 writel(pDesc
->tx_data_size
, AT91_BASE_SPI
+ AT91_SPI_TNCR
);
141 /* arm simple, non interrupt dependent timer */
142 reset_timer_masked();
145 writel(AT91_SPI_TXTEN
+ AT91_SPI_RXTEN
, AT91_BASE_SPI
+ AT91_SPI_PTCR
);
146 while (!(readl(AT91_BASE_SPI
+ AT91_SPI_SR
) & AT91_SPI_RXBUFF
) &&
147 ((timeout
= get_timer_masked()) < CONFIG_SYS_SPI_WRITE_TOUT
));
148 writel(AT91_SPI_TXTDIS
+ AT91_SPI_RXTDIS
, AT91_BASE_SPI
+ AT91_SPI_PTCR
);
151 if (timeout
>= CONFIG_SYS_SPI_WRITE_TOUT
) {
152 printf("Error Timeout\n\r");
153 return DATAFLASH_ERROR
;