cpu/arm926ejs/davinci/timer.c

   1 /*
   2  * (C) Copyright 2003
   3  * Texas Instruments <www.ti.com>
   4  *
   5  * (C) Copyright 2002
   6  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   7  * Marius Groeger <mgroeger@sysgo.de>
   8  *
   9  * (C) Copyright 2002
  10  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  11  * Alex Zuepke <azu@sysgo.de>
  12  *
  13  * (C) Copyright 2002-2004
  14  * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  15  *
  16  * (C) Copyright 2004
  17  * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
  18  *
  19  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  20  *
  21  * See file CREDITS for list of people who contributed to this
  22  * project.
  23  *
  24  * This program is free software; you can redistribute it and/or
  25  * modify it under the terms of the GNU General Public License as
  26  * published by the Free Software Foundation; either version 2 of
  27  * the License, or (at your option) any later version.
  28  *
  29  * This program is distributed in the hope that it will be useful,
  30  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  31  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  32  * GNU General Public License for more details.
  33  *
  34  * You should have received a copy of the GNU General Public License
  35  * along with this program; if not, write to the Free Software
  36  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  37  * MA 02111-1307 USA
  38  */
  39
  40 #include <common.h>
  41 #include <arm926ejs.h>
  42
  43 typedef volatile struct {
  44         u_int32_t       pid12;
  45         u_int32_t       emumgt_clksped;
  46         u_int32_t       gpint_en;
  47         u_int32_t       gpdir_dat;
  48         u_int32_t       tim12;
  49         u_int32_t       tim34;
  50         u_int32_t       prd12;
  51         u_int32_t       prd34;
  52         u_int32_t       tcr;
  53         u_int32_t       tgcr;
  54         u_int32_t       wdtcr;
  55         u_int32_t       tlgc;
  56         u_int32_t       tlmr;
  57 } davinci_timer;
  58
  59 davinci_timer           *timer = (davinci_timer *)CFG_TIMERBASE;
  60
  61 #define TIMER_LOAD_VAL  (CFG_HZ_CLOCK / CFG_HZ)
  62 #define READ_TIMER      timer->tim34
  63
  64 /*
  65  * Timer runs with CFG_HZ_CLOCK, currently 27MHz. To avoid wrap
  66  * around of timestamp already after min ~159s, divide it, e.g. by 16.
  67  * timestamp will then wrap around all min ~42min
  68  */
  69 #define DIV(x)          ((x) >> 4)
  70
  71 static ulong timestamp;
  72 static ulong lastinc;
  73
  74 int timer_init(void)
  75 {
  76         /* We are using timer34 in unchained 32-bit mode, full speed */
  77         timer->tcr = 0x0;
  78         timer->tgcr = 0x0;
  79         timer->tgcr = 0x06;
  80         timer->tim34 = 0x0;
  81         timer->prd34 = TIMER_LOAD_VAL;
  82         lastinc = 0;
  83         timer->tcr = 0x80 << 16;
  84         timestamp = 0;
  85
  86         return(0);
  87 }
  88
  89 void reset_timer(void)
  90 {
  91         reset_timer_masked();
  92 }
  93
  94 ulong get_timer(ulong base)
  95 {
  96         return(get_timer_masked() - base);
  97 }
  98
  99 void set_timer(ulong t)
 100 {
 101         timestamp = t;
 102 }
 103
 104 void udelay(unsigned long usec)
 105 {
 106         udelay_masked(usec);
 107 }
 108
 109 void reset_timer_masked(void)
 110 {
 111         lastinc = DIV(READ_TIMER);
 112         timestamp = 0;
 113 }
 114
 115 ulong get_timer_raw(void)
 116 {
 117         ulong now = DIV(READ_TIMER);
 118
 119         if (now >= lastinc) {
 120                 /* normal mode */
 121                 timestamp += now - lastinc;
 122         } else {
 123                 /* overflow ... */
 124                 timestamp += now + DIV(TIMER_LOAD_VAL) - lastinc;
 125         }
 126         lastinc = now;
 127         return timestamp;
 128 }
 129
 130 ulong get_timer_masked(void)
 131 {
 132         return(get_timer_raw() / DIV(TIMER_LOAD_VAL));
 133 }
 134
 135 void udelay_masked(unsigned long usec)
 136 {
 137         ulong tmo;
 138         ulong endtime;
 139         signed long diff;
 140
 141         tmo = CFG_HZ_CLOCK / 1000;
 142         tmo *= usec;
 143         tmo /= 1000;
 144
 145         endtime = get_timer_raw() + tmo;
 146
 147         do {
 148                 ulong now = get_timer_raw();
 149                 diff = endtime - now;
 150         } while (diff >= 0);
 151 }
 152
 153 /*
 154  * This function is derived from PowerPC code (read timebase as long long).
 155  * On ARM it just returns the timer value.
 156  */
 157 unsigned long long get_ticks(void)
 158 {
 159         return(get_timer(0));
 160 }
 161
 162 /*
 163  * This function is derived from PowerPC code (timebase clock frequency).
 164  * On ARM it returns the number of timer ticks per second.
 165  */
 166 ulong get_tbclk(void)
 167 {
 168         ulong tbclk;
 169
 170         tbclk = CFG_HZ;
 171         return(tbclk);
 172 }