cpu/arm926ejs/start.S

   1 /*
   2  *  armboot - Startup Code for ARM926EJS CPU-core
   3  *
   4  *  Copyright (c) 2003  Texas Instruments
   5  *
   6  *  ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
   7  *
   8  *  Copyright (c) 2001  Marius Gröger <mag@sysgo.de>
   9  *  Copyright (c) 2002  Alex Züpke <azu@sysgo.de>
  10  *  Copyright (c) 2002  Gary Jennejohn <gj@denx.de>
  11  *  Copyright (c) 2003  Richard Woodruff <r-woodruff2@ti.com>
  12  *  Copyright (c) 2003  Kshitij <kshitij@ti.com>
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  */
  32
  33
  34 #include <config.h>
  35 #include <version.h>
  36
  37 #if defined(CONFIG_OMAP1610)
  38 #include <./configs/omap1510.h>
  39 #elif defined(CONFIG_OMAP730)
  40 #include <./configs/omap730.h>
  41 #endif
  42
  43 /*
  44  *************************************************************************
  45  *
  46  * Jump vector table as in table 3.1 in [1]
  47  *
  48  *************************************************************************
  49  */
  50
  51
  52 .globl _start
  53 _start:
  54         b       reset
  55         ldr     pc, _undefined_instruction
  56         ldr     pc, _software_interrupt
  57         ldr     pc, _prefetch_abort
  58         ldr     pc, _data_abort
  59         ldr     pc, _not_used
  60         ldr     pc, _irq
  61         ldr     pc, _fiq
  62
  63 _undefined_instruction:
  64         .word undefined_instruction
  65 _software_interrupt:
  66         .word software_interrupt
  67 _prefetch_abort:
  68         .word prefetch_abort
  69 _data_abort:
  70         .word data_abort
  71 _not_used:
  72         .word not_used
  73 _irq:
  74         .word irq
  75 _fiq:
  76         .word fiq
  77
  78         .balignl 16,0xdeadbeef
  79
  80
  81 /*
  82  *************************************************************************
  83  *
  84  * Startup Code (reset vector)
  85  *
  86  * do important init only if we don't start from memory!
  87  * setup Memory and board specific bits prior to relocation.
  88  * relocate armboot to ram
  89  * setup stack
  90  *
  91  *************************************************************************
  92  */
  93
  94 _TEXT_BASE:
  95         .word   TEXT_BASE
  96
  97 .globl _armboot_start
  98 _armboot_start:
  99         .word _start
 100
 101 /*
 102  * These are defined in the board-specific linker script.
 103  */
 104 .globl _bss_start
 105 _bss_start:
 106         .word __bss_start
 107
 108 .globl _bss_end
 109 _bss_end:
 110         .word _end
 111
 112 #ifdef CONFIG_USE_IRQ
 113 /* IRQ stack memory (calculated at run-time) */
 114 .globl IRQ_STACK_START
 115 IRQ_STACK_START:
 116         .word   0x0badc0de
 117
 118 /* IRQ stack memory (calculated at run-time) */
 119 .globl FIQ_STACK_START
 120 FIQ_STACK_START:
 121         .word 0x0badc0de
 122 #endif
 123
 124
 125 /*
 126  * the actual reset code
 127  */
 128
 129 reset:
 130         /*
 131          * set the cpu to SVC32 mode
 132          */
 133         mrs     r0,cpsr
 134         bic     r0,r0,#0x1f
 135         orr     r0,r0,#0xd3
 136         msr     cpsr,r0
 137
 138         /*
 139          * we do sys-critical inits only at reboot,
 140          * not when booting from ram!
 141          */
 142 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 143         bl      cpu_init_crit
 144 #endif
 145
 146 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
 147 relocate:                               /* relocate U-Boot to RAM           */
 148         adr     r0, _start              /* r0 <- current position of code   */
 149         ldr     r1, _TEXT_BASE          /* test if we run from flash or RAM */
 150         cmp     r0, r1                  /* don't reloc during debug         */
 151         beq     stack_setup
 152
 153         ldr     r2, _armboot_start
 154         ldr     r3, _bss_start
 155         sub     r2, r3, r2              /* r2 <- size of armboot            */
 156         add     r2, r0, r2              /* r2 <- source end address         */
 157
 158 copy_loop:
 159         ldmia   r0!, {r3-r10}           /* copy from source address [r0]    */
 160         stmia   r1!, {r3-r10}           /* copy to   target address [r1]    */
 161         cmp     r0, r2                  /* until source end addreee [r2]    */
 162         ble     copy_loop
 163 #endif  /* CONFIG_SKIP_RELOCATE_UBOOT */
 164
 165         /* Set up the stack                                                 */
 166 stack_setup:
 167         ldr     r0, _TEXT_BASE          /* upper 128 KiB: relocated uboot   */
 168         sub     r0, r0, #CFG_MALLOC_LEN /* malloc area                      */
 169         sub     r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo                        */
 170 #ifdef CONFIG_USE_IRQ
 171         sub     r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
 172 #endif
 173         sub     sp, r0, #12             /* leave 3 words for abort-stack    */
 174
 175 clear_bss:
 176         ldr     r0, _bss_start          /* find start of bss segment        */
 177         ldr     r1, _bss_end            /* stop here                        */
 178         mov     r2, #0x00000000         /* clear                            */
 179
 180 clbss_l:str     r2, [r0]                /* clear loop...                    */
 181         add     r0, r0, #4
 182         cmp     r0, r1
 183         ble     clbss_l
 184
 185         ldr     pc, _start_armboot
 186
 187 _start_armboot:
 188         .word start_armboot
 189
 190
 191 /*
 192  *************************************************************************
 193  *
 194  * CPU_init_critical registers
 195  *
 196  * setup important registers
 197  * setup memory timing
 198  *
 199  *************************************************************************
 200  */
 201
 202
 203 cpu_init_crit:
 204         /*
 205          * flush v4 I/D caches
 206          */
 207         mov     r0, #0
 208         mcr     p15, 0, r0, c7, c7, 0   /* flush v3/v4 cache */
 209         mcr     p15, 0, r0, c8, c7, 0   /* flush v4 TLB */
 210
 211         /*
 212          * disable MMU stuff and caches
 213          */
 214         mrc     p15, 0, r0, c1, c0, 0
 215         bic     r0, r0, #0x00002300     /* clear bits 13, 9:8 (--V- --RS) */
 216         bic     r0, r0, #0x00000087     /* clear bits 7, 2:0 (B--- -CAM) */
 217         orr     r0, r0, #0x00000002     /* set bit 2 (A) Align */
 218         orr     r0, r0, #0x00001000     /* set bit 12 (I) I-Cache */
 219         mcr     p15, 0, r0, c1, c0, 0
 220
 221         /*
 222          * Go setup Memory and board specific bits prior to relocation.
 223          */
 224         mov     ip, lr          /* perserve link reg across call */
 225         bl      platformsetup   /* go setup pll,mux,memory */
 226         mov     lr, ip          /* restore link */
 227         mov     pc, lr          /* back to my caller */
 228 /*
 229  *************************************************************************
 230  *
 231  * Interrupt handling
 232  *
 233  *************************************************************************
 234  */
 235
 236 @
 237 @ IRQ stack frame.
 238 @
 239 #define S_FRAME_SIZE    72
 240
 241 #define S_OLD_R0        68
 242 #define S_PSR           64
 243 #define S_PC            60
 244 #define S_LR            56
 245 #define S_SP            52
 246
 247 #define S_IP            48
 248 #define S_FP            44
 249 #define S_R10           40
 250 #define S_R9            36
 251 #define S_R8            32
 252 #define S_R7            28
 253 #define S_R6            24
 254 #define S_R5            20
 255 #define S_R4            16
 256 #define S_R3            12
 257 #define S_R2            8
 258 #define S_R1            4
 259 #define S_R0            0
 260
 261 #define MODE_SVC 0x13
 262 #define I_BIT    0x80
 263
 264 /*
 265  * use bad_save_user_regs for abort/prefetch/undef/swi ...
 266  * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
 267  */
 268
 269         .macro  bad_save_user_regs
 270         @ carve out a frame on current user stack
 271         sub     sp, sp, #S_FRAME_SIZE
 272         stmia   sp, {r0 - r12}  @ Save user registers (now in svc mode) r0-r12
 273
 274         ldr     r2, _armboot_start
 275         sub     r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
 276         sub     r2, r2, #(CFG_GBL_DATA_SIZE+8)  @ set base 2 words into abort stack
 277         @ get values for "aborted" pc and cpsr (into parm regs)
 278         ldmia   r2, {r2 - r3}
 279         add     r0, sp, #S_FRAME_SIZE           @ grab pointer to old stack
 280         add     r5, sp, #S_SP
 281         mov     r1, lr
 282         stmia   r5, {r0 - r3}   @ save sp_SVC, lr_SVC, pc, cpsr
 283         mov     r0, sp          @ save current stack into r0 (param register)
 284         .endm
 285
 286         .macro  irq_save_user_regs
 287         sub     sp, sp, #S_FRAME_SIZE
 288         stmia   sp, {r0 - r12}                  @ Calling r0-r12
 289         @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
 290         add     r8, sp, #S_PC
 291         stmdb   r8, {sp, lr}^           @ Calling SP, LR
 292         str     lr, [r8, #0]            @ Save calling PC
 293         mrs     r6, spsr
 294         str     r6, [r8, #4]            @ Save CPSR
 295         str     r0, [r8, #8]            @ Save OLD_R0
 296         mov     r0, sp
 297         .endm
 298
 299         .macro  irq_restore_user_regs
 300         ldmia   sp, {r0 - lr}^                  @ Calling r0 - lr
 301         mov     r0, r0
 302         ldr     lr, [sp, #S_PC]                 @ Get PC
 303         add     sp, sp, #S_FRAME_SIZE
 304         subs    pc, lr, #4              @ return & move spsr_svc into cpsr
 305         .endm
 306
 307         .macro get_bad_stack
 308         ldr     r13, _armboot_start             @ setup our mode stack
 309         sub     r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
 310         sub     r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
 311
 312         str     lr, [r13]       @ save caller lr in position 0 of saved stack
 313         mrs     lr, spsr        @ get the spsr
 314         str     lr, [r13, #4]   @ save spsr in position 1 of saved stack
 315         mov     r13, #MODE_SVC  @ prepare SVC-Mode
 316         @ msr   spsr_c, r13
 317         msr     spsr, r13       @ switch modes, make sure moves will execute
 318         mov     lr, pc          @ capture return pc
 319         movs    pc, lr          @ jump to next instruction & switch modes.
 320         .endm
 321
 322         .macro get_irq_stack                    @ setup IRQ stack
 323         ldr     sp, IRQ_STACK_START
 324         .endm
 325
 326         .macro get_fiq_stack                    @ setup FIQ stack
 327         ldr     sp, FIQ_STACK_START
 328         .endm
 329
 330 /*
 331  * exception handlers
 332  */
 333         .align  5
 334 undefined_instruction:
 335         get_bad_stack
 336         bad_save_user_regs
 337         bl      do_undefined_instruction
 338
 339         .align  5
 340 software_interrupt:
 341         get_bad_stack
 342         bad_save_user_regs
 343         bl      do_software_interrupt
 344
 345         .align  5
 346 prefetch_abort:
 347         get_bad_stack
 348         bad_save_user_regs
 349         bl      do_prefetch_abort
 350
 351         .align  5
 352 data_abort:
 353         get_bad_stack
 354         bad_save_user_regs
 355         bl      do_data_abort
 356
 357         .align  5
 358 not_used:
 359         get_bad_stack
 360         bad_save_user_regs
 361         bl      do_not_used
 362
 363 #ifdef CONFIG_USE_IRQ
 364
 365         .align  5
 366 irq:
 367         get_irq_stack
 368         irq_save_user_regs
 369         bl      do_irq
 370         irq_restore_user_regs
 371
 372         .align  5
 373 fiq:
 374         get_fiq_stack
 375         /* someone ought to write a more effiction fiq_save_user_regs */
 376         irq_save_user_regs
 377         bl      do_fiq
 378         irq_restore_user_regs
 379
 380 #else
 381
 382         .align  5
 383 irq:
 384         get_bad_stack
 385         bad_save_user_regs
 386         bl      do_irq
 387
 388         .align  5
 389 fiq:
 390         get_bad_stack
 391         bad_save_user_regs
 392         bl      do_fiq
 393
 394 #endif
 395
 396 # ifdef CONFIG_INTEGRATOR
 397
 398         /* Satisfied by Integrator routine (AP or CP) */
 399
 400 #else
 401
 402         .align  5
 403 .globl reset_cpu
 404 reset_cpu:
 405         ldr     r1, rstctl1     /* get clkm1 reset ctl */
 406         mov     r3, #0x0
 407         strh    r3, [r1]        /* clear it */
 408         mov     r3, #0x8
 409         strh    r3, [r1]        /* force dsp+arm reset */
 410 _loop_forever:
 411         b       _loop_forever
 412
 413 rstctl1:
 414         .word   0xfffece10
 415
 416 #endif /* #ifdef CONFIG_INTEGRATOR */
 417