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rename CFG_ macros to CONFIG_SYS
[people/ms/u-boot.git] / cpu / arm946es / cpu.c
1 /*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28 /*
29 * CPU specific code
30 */
31
32 #include <common.h>
33 #include <command.h>
34 #include <arm946es.h>
35
36 #ifdef CONFIG_USE_IRQ
37 DECLARE_GLOBAL_DATA_PTR;
38 #endif
39
40 /* read co-processor 15, register #1 (control register) */
41 static unsigned long read_p15_c1 (void)
42 {
43 unsigned long value;
44
45 __asm__ __volatile__(
46 "mrc p15, 0, %0, c1, c0, 0 @ read control reg\n"
47 : "=r" (value)
48 :
49 : "memory");
50
51 #ifdef MMU_DEBUG
52 printf ("p15/c1 is = %08lx\n", value);
53 #endif
54 return value;
55 }
56
57 /* write to co-processor 15, register #1 (control register) */
58 static void write_p15_c1 (unsigned long value)
59 {
60 #ifdef MMU_DEBUG
61 printf ("write %08lx to p15/c1\n", value);
62 #endif
63 __asm__ __volatile__(
64 "mcr p15, 0, %0, c1, c0, 0 @ write it back\n"
65 :
66 : "r" (value)
67 : "memory");
68
69 read_p15_c1 ();
70 }
71
72 static void cp_delay (void)
73 {
74 volatile int i;
75
76 /* copro seems to need some delay between reading and writing */
77 for (i = 0; i < 100; i++);
78 }
79
80 /* See also ARM946E-S Technical Reference Manual */
81 #define C1_MMU (1<<0) /* mmu off/on */
82 #define C1_ALIGN (1<<1) /* alignment faults off/on */
83 #define C1_DC (1<<2) /* dcache off/on */
84
85 #define C1_BIG_ENDIAN (1<<7) /* big endian off/on */
86 #define C1_SYS_PROT (1<<8) /* system protection */
87 #define C1_ROM_PROT (1<<9) /* ROM protection */
88 #define C1_IC (1<<12) /* icache off/on */
89 #define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */
90
91
92 int cpu_init (void)
93 {
94 /*
95 * setup up stacks if necessary
96 */
97 #ifdef CONFIG_USE_IRQ
98 IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4;
99 FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
100 #endif
101 return 0;
102 }
103
104 int cleanup_before_linux (void)
105 {
106 /*
107 * this function is called just before we call linux
108 * it prepares the processor for linux
109 *
110 * we turn off caches etc ...
111 */
112
113 unsigned long i;
114
115 disable_interrupts ();
116
117 /* ARM926E-S needs the protection unit enabled for the icache to have
118 * been enabled - left for possible later use
119 * should turn off the protection unit as well....
120 */
121 /* turn off I/D-cache */
122 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
123 i &= ~(C1_DC | C1_IC);
124 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
125
126 /* flush I/D-cache */
127 i = 0;
128 asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
129 asm ("mcr p15, 0, %0, c7, c6, 0": :"r" (i));
130 return (0);
131 }
132
133 int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
134 {
135 extern void reset_cpu (ulong addr);
136
137 disable_interrupts ();
138 reset_cpu (0);
139 /*NOTREACHED*/
140 return (0);
141 }
142 /* ARM926E-S needs the protection unit enabled for this to have any effect
143 - left for possible later use */
144 void icache_enable (void)
145 {
146 ulong reg;
147
148 reg = read_p15_c1 (); /* get control reg. */
149 cp_delay ();
150 write_p15_c1 (reg | C1_IC);
151 }
152
153 void icache_disable (void)
154 {
155 ulong reg;
156
157 reg = read_p15_c1 ();
158 cp_delay ();
159 write_p15_c1 (reg & ~C1_IC);
160 }
161
162 int icache_status (void)
163 {
164 return (read_p15_c1 () & C1_IC) != 0;
165 }