cpu/at32ap/at32ap700x/gpio.c

   1 /*
   2  * Copyright (C) 2006 Atmel Corporation
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22 #include <common.h>
  23
  24 #include <asm/io.h>
  25
  26 #include <asm/arch/chip-features.h>
  27 #include <asm/arch/gpio.h>
  28 #include <asm/arch/memory-map.h>
  29
  30 /*
  31  * Lots of small functions here. We depend on --gc-sections getting
  32  * rid of the ones we don't need.
  33  */
  34 void gpio_enable_ebi(void)
  35 {
  36 #ifdef CONFIG_SYS_HSDRAMC
  37 #ifndef CONFIG_SYS_SDRAM_16BIT
  38         gpio_select_periph_A(GPIO_PIN_PE0, 0);
  39         gpio_select_periph_A(GPIO_PIN_PE1, 0);
  40         gpio_select_periph_A(GPIO_PIN_PE2, 0);
  41         gpio_select_periph_A(GPIO_PIN_PE3, 0);
  42         gpio_select_periph_A(GPIO_PIN_PE4, 0);
  43         gpio_select_periph_A(GPIO_PIN_PE5, 0);
  44         gpio_select_periph_A(GPIO_PIN_PE6, 0);
  45         gpio_select_periph_A(GPIO_PIN_PE7, 0);
  46         gpio_select_periph_A(GPIO_PIN_PE8, 0);
  47         gpio_select_periph_A(GPIO_PIN_PE9, 0);
  48         gpio_select_periph_A(GPIO_PIN_PE10, 0);
  49         gpio_select_periph_A(GPIO_PIN_PE11, 0);
  50         gpio_select_periph_A(GPIO_PIN_PE12, 0);
  51         gpio_select_periph_A(GPIO_PIN_PE13, 0);
  52         gpio_select_periph_A(GPIO_PIN_PE14, 0);
  53         gpio_select_periph_A(GPIO_PIN_PE15, 0);
  54 #endif
  55         gpio_select_periph_A(GPIO_PIN_PE26, 0);
  56 #endif
  57 }
  58
  59 #ifdef AT32AP700x_CHIP_HAS_USART
  60 void gpio_enable_usart0(void)
  61 {
  62         gpio_select_periph_B(GPIO_PIN_PA8, 0);
  63         gpio_select_periph_B(GPIO_PIN_PA9, 0);
  64 }
  65
  66 void gpio_enable_usart1(void)
  67 {
  68         gpio_select_periph_A(GPIO_PIN_PA17, 0);
  69         gpio_select_periph_A(GPIO_PIN_PA18, 0);
  70 }
  71
  72 void gpio_enable_usart2(void)
  73 {
  74         gpio_select_periph_B(GPIO_PIN_PB26, 0);
  75         gpio_select_periph_B(GPIO_PIN_PB27, 0);
  76 }
  77
  78 void gpio_enable_usart3(void)
  79 {
  80         gpio_select_periph_B(GPIO_PIN_PB17, 0);
  81         gpio_select_periph_B(GPIO_PIN_PB18, 0);
  82 }
  83 #endif
  84
  85 #ifdef AT32AP700x_CHIP_HAS_MACB
  86 void gpio_enable_macb0(void)
  87 {
  88         gpio_select_periph_A(GPIO_PIN_PC3,  0); /* TXD0 */
  89         gpio_select_periph_A(GPIO_PIN_PC4,  0); /* TXD1 */
  90         gpio_select_periph_A(GPIO_PIN_PC7,  0); /* TXEN */
  91         gpio_select_periph_A(GPIO_PIN_PC8,  0); /* TXCK */
  92         gpio_select_periph_A(GPIO_PIN_PC9,  0); /* RXD0 */
  93         gpio_select_periph_A(GPIO_PIN_PC10, 0); /* RXD1 */
  94         gpio_select_periph_A(GPIO_PIN_PC13, 0); /* RXER */
  95         gpio_select_periph_A(GPIO_PIN_PC15, 0); /* RXDV */
  96         gpio_select_periph_A(GPIO_PIN_PC16, 0); /* MDC  */
  97         gpio_select_periph_A(GPIO_PIN_PC17, 0); /* MDIO */
  98 #if !defined(CONFIG_RMII)
  99         gpio_select_periph_A(GPIO_PIN_PC0,  0); /* COL  */
 100         gpio_select_periph_A(GPIO_PIN_PC1,  0); /* CRS  */
 101         gpio_select_periph_A(GPIO_PIN_PC2,  0); /* TXER */
 102         gpio_select_periph_A(GPIO_PIN_PC5,  0); /* TXD2 */
 103         gpio_select_periph_A(GPIO_PIN_PC6,  0); /* TXD3 */
 104         gpio_select_periph_A(GPIO_PIN_PC11, 0); /* RXD2 */
 105         gpio_select_periph_A(GPIO_PIN_PC12, 0); /* RXD3 */
 106         gpio_select_periph_A(GPIO_PIN_PC14, 0); /* RXCK */
 107         gpio_select_periph_A(GPIO_PIN_PC18, 0); /* SPD  */
 108 #endif
 109 }
 110
 111 void gpio_enable_macb1(void)
 112 {
 113         gpio_select_periph_B(GPIO_PIN_PD13, 0); /* TXD0 */
 114         gpio_select_periph_B(GPIO_PIN_PD14, 0); /* TXD1 */
 115         gpio_select_periph_B(GPIO_PIN_PD11, 0); /* TXEN */
 116         gpio_select_periph_B(GPIO_PIN_PD12, 0); /* TXCK */
 117         gpio_select_periph_B(GPIO_PIN_PD10, 0); /* RXD0 */
 118         gpio_select_periph_B(GPIO_PIN_PD6,  0); /* RXD1 */
 119         gpio_select_periph_B(GPIO_PIN_PD5,  0); /* RXER */
 120         gpio_select_periph_B(GPIO_PIN_PD4,  0); /* RXDV */
 121         gpio_select_periph_B(GPIO_PIN_PD3,  0); /* MDC  */
 122         gpio_select_periph_B(GPIO_PIN_PD2,  0); /* MDIO */
 123 #if !defined(CONFIG_RMII)
 124         gpio_select_periph_B(GPIO_PIN_PC19, 0); /* COL  */
 125         gpio_select_periph_B(GPIO_PIN_PC23, 0); /* CRS  */
 126         gpio_select_periph_B(GPIO_PIN_PC26, 0); /* TXER */
 127         gpio_select_periph_B(GPIO_PIN_PC27, 0); /* TXD2 */
 128         gpio_select_periph_B(GPIO_PIN_PC28, 0); /* TXD3 */
 129         gpio_select_periph_B(GPIO_PIN_PC29, 0); /* RXD2 */
 130         gpio_select_periph_B(GPIO_PIN_PC30, 0); /* RXD3 */
 131         gpio_select_periph_B(GPIO_PIN_PC24, 0); /* RXCK */
 132         gpio_select_periph_B(GPIO_PIN_PD15, 0); /* SPD  */
 133 #endif
 134 }
 135 #endif
 136
 137 #ifdef AT32AP700x_CHIP_HAS_MMCI
 138 void gpio_enable_mmci(void)
 139 {
 140         gpio_select_periph_A(GPIO_PIN_PA10, 0); /* CLK   */
 141         gpio_select_periph_A(GPIO_PIN_PA11, 0); /* CMD   */
 142         gpio_select_periph_A(GPIO_PIN_PA12, 0); /* DATA0 */
 143         gpio_select_periph_A(GPIO_PIN_PA13, 0); /* DATA1 */
 144         gpio_select_periph_A(GPIO_PIN_PA14, 0); /* DATA2 */
 145         gpio_select_periph_A(GPIO_PIN_PA15, 0); /* DATA3 */
 146 }
 147 #endif
 148
 149 #ifdef AT32AP700x_CHIP_HAS_SPI
 150 void gpio_enable_spi0(unsigned long cs_mask)
 151 {
 152         gpio_select_periph_A(GPIO_PIN_PA0,  0); /* MISO */
 153         gpio_select_periph_A(GPIO_PIN_PA1,  0); /* MOSI */
 154         gpio_select_periph_A(GPIO_PIN_PA2,  0); /* SCK  */
 155
 156         /* Set up NPCSx as GPIO outputs, initially high */
 157         if (cs_mask & (1 << 0)) {
 158                 gpio_set_value(GPIO_PIN_PA3, 1);
 159                 gpio_select_pio(GPIO_PIN_PA3, GPIOF_OUTPUT);
 160         }
 161         if (cs_mask & (1 << 1)) {
 162                 gpio_set_value(GPIO_PIN_PA4, 1);
 163                 gpio_select_pio(GPIO_PIN_PA4, GPIOF_OUTPUT);
 164         }
 165         if (cs_mask & (1 << 2)) {
 166                 gpio_set_value(GPIO_PIN_PA5, 1);
 167                 gpio_select_pio(GPIO_PIN_PA5, GPIOF_OUTPUT);
 168         }
 169         if (cs_mask & (1 << 3)) {
 170                 gpio_set_value(GPIO_PIN_PA20, 1);
 171                 gpio_select_pio(GPIO_PIN_PA20, GPIOF_OUTPUT);
 172         }
 173 }
 174
 175 void gpio_enable_spi1(unsigned long cs_mask)
 176 {
 177         gpio_select_periph_B(GPIO_PIN_PA0,  0); /* MISO */
 178         gpio_select_periph_B(GPIO_PIN_PB1,  0); /* MOSI */
 179         gpio_select_periph_B(GPIO_PIN_PB5,  0); /* SCK  */
 180
 181         /* Set up NPCSx as GPIO outputs, initially high */
 182         if (cs_mask & (1 << 0)) {
 183                 gpio_set_value(GPIO_PIN_PB2, 1);
 184                 gpio_select_pio(GPIO_PIN_PB2, GPIOF_OUTPUT);
 185         }
 186         if (cs_mask & (1 << 1)) {
 187                 gpio_set_value(GPIO_PIN_PB3, 1);
 188                 gpio_select_pio(GPIO_PIN_PB3, GPIOF_OUTPUT);
 189         }
 190         if (cs_mask & (1 << 2)) {
 191                 gpio_set_value(GPIO_PIN_PB4, 1);
 192                 gpio_select_pio(GPIO_PIN_PB4, GPIOF_OUTPUT);
 193         }
 194         if (cs_mask & (1 << 3)) {
 195                 gpio_set_value(GPIO_PIN_PA27, 1);
 196                 gpio_select_pio(GPIO_PIN_PA27, GPIOF_OUTPUT);
 197         }
 198 }
 199 #endif