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git.ipfire.org Git - people/ms/u-boot.git/blob - cpu/blackfin/traps.c
2 * U-boot - traps.c Routines related to interrupts and exceptions
4 * Copyright (c) 2005-2008 Analog Devices Inc.
6 * This file is based on
7 * No original Copyright holder listed,
8 * Probabily original (C) Roman Zippel (assigned DJD, 1999)
10 * Copyright 2003 Metrowerks - for Blackfin
11 * Copyright 2000-2001 Lineo, Inc. D. Jeff Dionne <jeff@lineo.ca>
12 * Copyright 1999-2000 D. Jeff Dionne, <jeff@uclinux.org>
14 * (C) Copyright 2000-2004
15 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
17 * Licensed under the GPL-2 or later.
21 #include <linux/types.h>
22 #include <asm/traps.h>
25 #include <asm/mach-common/bits/core.h>
26 #include <asm/mach-common/bits/mpu.h>
27 #include <asm/mach-common/bits/trace.h>
30 #define trace_buffer_save(x) \
32 (x) = bfin_read_TBUFCTL(); \
33 bfin_write_TBUFCTL((x) & ~TBUFEN); \
36 #define trace_buffer_restore(x) \
37 bfin_write_TBUFCTL((x))
39 /* The purpose of this map is to provide a mapping of address<->cplb settings
40 * rather than an exact map of what is actually addressable on the part. This
41 * map covers all current Blackfin parts. If you try to access an address that
42 * is in this map but not actually on the part, you won't get an exception and
43 * reboot, you'll get an external hardware addressing error and reboot. Since
44 * only the ends matter (you did something wrong and the board reset), the means
45 * are largely irrelevant.
49 uint32_t data_flags
, inst_flags
;
51 const struct memory_map
const bfin_memory_map
[] = {
52 { /* external memory */
55 .data_flags
= SDRAM_DGENERIC
,
56 .inst_flags
= SDRAM_IGENERIC
,
61 .data_flags
= SDRAM_EBIU
,
62 .inst_flags
= SDRAM_INON_CHBL
,
64 { /* everything on chip */
67 .data_flags
= L1_DMEMORY
,
68 .inst_flags
= L1_IMEMORY
,
72 void trap_c(struct pt_regs
*regs
)
74 uint32_t trapnr
= (regs
->seqstat
& EXCAUSE
);
78 /* 0x26 - Data CPLB Miss */
81 if (ANOMALY_05000261
) {
82 static uint32_t last_cplb_fault_retx
;
84 * Work around an anomaly: if we see a new DCPLB fault,
85 * return without doing anything. Then,
86 * if we get the same fault again, handle it.
88 if (last_cplb_fault_retx
!= regs
->retx
) {
89 last_cplb_fault_retx
= regs
->retx
;
97 /* 0x27 - Instruction CPLB Miss */
99 volatile uint32_t *CPLB_ADDR_BASE
, *CPLB_DATA_BASE
, *CPLB_ADDR
, *CPLB_DATA
;
100 uint32_t new_cplb_addr
= 0, new_cplb_data
= 0;
101 static size_t last_evicted
;
104 new_cplb_addr
= (data
? bfin_read_DCPLB_FAULT_ADDR() : bfin_read_ICPLB_FAULT_ADDR()) & ~(4 * 1024 * 1024 - 1);
106 for (i
= 0; i
< ARRAY_SIZE(bfin_memory_map
); ++i
) {
107 /* if the exception is inside this range, lets use it */
108 if (new_cplb_addr
>= bfin_memory_map
[i
].start
&&
109 new_cplb_addr
< bfin_memory_map
[i
].end
)
112 if (i
== ARRAY_SIZE(bfin_memory_map
)) {
113 printf("%cCPLB exception outside of memory map at 0x%p\n",
114 (data
? 'D' : 'I'), new_cplb_addr
);
117 debug("CPLB addr %p matches map 0x%p - 0x%p\n", new_cplb_addr
, bfin_memory_map
[i
].start
, bfin_memory_map
[i
].end
);
118 new_cplb_data
= (data
? bfin_memory_map
[i
].data_flags
: bfin_memory_map
[i
].inst_flags
);
120 /* Turn the cache off */
124 *pDMEM_CONTROL
&= ~ENDCPLB
;
127 *pIMEM_CONTROL
&= ~ENICPLB
;
132 CPLB_ADDR_BASE
= (uint32_t *)DCPLB_ADDR0
;
133 CPLB_DATA_BASE
= (uint32_t *)DCPLB_DATA0
;
135 CPLB_ADDR_BASE
= (uint32_t *)ICPLB_ADDR0
;
136 CPLB_DATA_BASE
= (uint32_t *)ICPLB_DATA0
;
139 /* find the next unlocked entry and evict it */
140 i
= last_evicted
& 0xF;
141 debug("last evicted = %i\n", i
);
142 CPLB_DATA
= CPLB_DATA_BASE
+ i
;
143 while (*CPLB_DATA
& CPLB_LOCK
) {
144 debug("skipping %i %p - %08X\n", i
, CPLB_DATA
, *CPLB_DATA
);
145 i
= (i
+ 1) & 0xF; /* wrap around */
146 CPLB_DATA
= CPLB_DATA_BASE
+ i
;
148 CPLB_ADDR
= CPLB_ADDR_BASE
+ i
;
150 debug("evicting entry %i: 0x%p 0x%08X\n", i
, *CPLB_ADDR
, *CPLB_DATA
);
151 last_evicted
= i
+ 1;
152 *CPLB_ADDR
= new_cplb_addr
;
153 *CPLB_DATA
= new_cplb_data
;
155 /* dump current table for debugging purposes */
156 CPLB_ADDR
= CPLB_ADDR_BASE
;
157 CPLB_DATA
= CPLB_DATA_BASE
;
158 for (i
= 0; i
< 16; ++i
)
159 debug("%2i 0x%p 0x%08X\n", i
, *CPLB_ADDR
++, *CPLB_DATA
++);
161 /* Turn the cache back on */
165 *pDMEM_CONTROL
|= ENDCPLB
;
168 *pIMEM_CONTROL
|= ENICPLB
;
176 /* All traps come here */
181 #ifdef CONFIG_DEBUG_DUMP
182 # define ENABLE_DUMP 1
184 # define ENABLE_DUMP 0
187 #ifdef CONFIG_DEBUG_DUMP_SYMS
188 # define ENABLE_DUMP_SYMS 1
190 # define ENABLE_DUMP_SYMS 0
193 static const char *symbol_lookup(unsigned long addr
, unsigned long *caddr
)
195 if (!ENABLE_DUMP_SYMS
)
198 extern const char system_map
[] __attribute__((__weak__
));
199 const char *sym
, *csym
;
201 unsigned long sym_addr
;
208 sym_addr
= simple_strtoul(sym
, &esym
, 16);
214 sym
+= strlen(sym
) + 1;
220 static void decode_address(char *buf
, unsigned long address
)
222 unsigned long sym_addr
;
223 const char *sym
= symbol_lookup(address
, &sym_addr
);
226 sprintf(buf
, "<0x%p> { %s + 0x%x }", address
, sym
, address
- sym_addr
);
231 sprintf(buf
, "<0x%p> /* Maybe null pointer? */", address
);
232 else if (address
>= CONFIG_SYS_MONITOR_BASE
&&
233 address
< CONFIG_SYS_MONITOR_BASE
+ CONFIG_SYS_MONITOR_LEN
)
234 sprintf(buf
, "<0x%p> /* somewhere in u-boot */", address
);
236 sprintf(buf
, "<0x%p> /* unknown address */", address
);
239 void dump(struct pt_regs
*fp
)
247 printf("SEQUENCER STATUS:\n");
248 printf(" SEQSTAT: %08lx IPEND: %04lx SYSCFG: %04lx\n",
249 fp
->seqstat
, fp
->ipend
, fp
->syscfg
);
250 printf(" HWERRCAUSE: 0x%lx\n", (fp
->seqstat
& HWERRCAUSE
) >> HWERRCAUSE_P
);
251 printf(" EXCAUSE : 0x%lx\n", (fp
->seqstat
& EXCAUSE
) >> EXCAUSE_P
);
252 for (i
= 6; i
<= 15; ++i
) {
253 if (fp
->ipend
& (1 << i
)) {
254 decode_address(buf
, bfin_read32(EVT0
+ 4*i
));
255 printf(" physical IVG%i asserted : %s\n", i
, buf
);
258 decode_address(buf
, fp
->rete
);
259 printf(" RETE: %s\n", buf
);
260 decode_address(buf
, fp
->retn
);
261 printf(" RETN: %s\n", buf
);
262 decode_address(buf
, fp
->retx
);
263 printf(" RETX: %s\n", buf
);
264 decode_address(buf
, fp
->rets
);
265 printf(" RETS: %s\n", buf
);
266 decode_address(buf
, fp
->pc
);
267 printf(" PC : %s\n", buf
);
269 if (fp
->seqstat
& EXCAUSE
) {
270 decode_address(buf
, bfin_read_DCPLB_FAULT_ADDR());
271 printf("DCPLB_FAULT_ADDR: %s\n", buf
);
272 decode_address(buf
, bfin_read_ICPLB_FAULT_ADDR());
273 printf("ICPLB_FAULT_ADDR: %s\n", buf
);
276 printf("\nPROCESSOR STATE:\n");
277 printf(" R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n",
278 fp
->r0
, fp
->r1
, fp
->r2
, fp
->r3
);
279 printf(" R4 : %08lx R5 : %08lx R6 : %08lx R7 : %08lx\n",
280 fp
->r4
, fp
->r5
, fp
->r6
, fp
->r7
);
281 printf(" P0 : %08lx P1 : %08lx P2 : %08lx P3 : %08lx\n",
282 fp
->p0
, fp
->p1
, fp
->p2
, fp
->p3
);
283 printf(" P4 : %08lx P5 : %08lx FP : %08lx SP : %08lx\n",
284 fp
->p4
, fp
->p5
, fp
->fp
, fp
);
285 printf(" LB0: %08lx LT0: %08lx LC0: %08lx\n",
286 fp
->lb0
, fp
->lt0
, fp
->lc0
);
287 printf(" LB1: %08lx LT1: %08lx LC1: %08lx\n",
288 fp
->lb1
, fp
->lt1
, fp
->lc1
);
289 printf(" B0 : %08lx L0 : %08lx M0 : %08lx I0 : %08lx\n",
290 fp
->b0
, fp
->l0
, fp
->m0
, fp
->i0
);
291 printf(" B1 : %08lx L1 : %08lx M1 : %08lx I1 : %08lx\n",
292 fp
->b1
, fp
->l1
, fp
->m1
, fp
->i1
);
293 printf(" B2 : %08lx L2 : %08lx M2 : %08lx I2 : %08lx\n",
294 fp
->b2
, fp
->l2
, fp
->m2
, fp
->i2
);
295 printf(" B3 : %08lx L3 : %08lx M3 : %08lx I3 : %08lx\n",
296 fp
->b3
, fp
->l3
, fp
->m3
, fp
->i3
);
297 printf("A0.w: %08lx A0.x: %08lx A1.w: %08lx A1.x: %08lx\n",
298 fp
->a0w
, fp
->a0x
, fp
->a1w
, fp
->a1x
);
300 printf("USP : %08lx ASTAT: %08lx\n",
306 void dump_bfin_trace_buffer(void)
309 unsigned long tflags
;
315 trace_buffer_save(tflags
);
317 printf("Hardware Trace:\n");
319 if (bfin_read_TBUFSTAT() & TBUFCNT
) {
320 for (; bfin_read_TBUFSTAT() & TBUFCNT
; i
++) {
321 decode_address(buf
, bfin_read_TBUF());
322 printf("%4i Target : %s\n", i
, buf
);
323 decode_address(buf
, bfin_read_TBUF());
324 printf(" Source : %s\n", buf
);
328 trace_buffer_restore(tflags
);
331 void bfin_panic(struct pt_regs
*regs
)
334 unsigned long tflags
;
335 trace_buffer_save(tflags
);
342 "Ack! Something bad happened to the Blackfin!\n"
346 dump_bfin_trace_buffer();
349 "Please reset the board\n"
352 bfin_reset_or_hang();