cpu/mpc5xx/cpu_init.c

   1 /*
   2  * (C) Copyright 2003  Martin Winistoerfer, martinwinistoerfer@gmx.ch.
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation,
  20  */
  21
  22 /*
  23  * File:                cpu_init.c
  24  *
  25  * Discription:         Contains initialisation functions to setup
  26  *                      the cpu properly
  27  *
  28  */
  29
  30 #include <common.h>
  31 #include <mpc5xx.h>
  32 #include <watchdog.h>
  33
  34 /*
  35  * Setup essential cpu registers to run
  36  */
  37 void cpu_init_f (volatile immap_t * immr)
  38 {
  39         volatile memctl5xx_t *memctl = &immr->im_memctl;
  40         ulong reg;
  41
  42         /* SYPCR - contains watchdog control. This will enable watchdog */
  43         /* if CONFIG_WATCHDOG is set */
  44         immr->im_siu_conf.sc_sypcr = CONFIG_SYS_SYPCR;
  45
  46 #if defined(CONFIG_WATCHDOG)
  47         reset_5xx_watchdog (immr);
  48 #endif
  49
  50         /* SIUMCR - contains debug pin configuration */
  51         immr->im_siu_conf.sc_siumcr |= CONFIG_SYS_SIUMCR;
  52
  53         /* Initialize timebase. Unlock TBSCRK */
  54         immr->im_sitk.sitk_tbscrk = KAPWR_KEY;
  55         immr->im_sit.sit_tbscr = CONFIG_SYS_TBSCR;
  56
  57         /* Full IMB bus speed */
  58         immr->im_uimb.uimb_umcr = CONFIG_SYS_UMCR;
  59
  60         /* Time base and decrementer will be enables (TBE) */
  61         /* in init_timebase() in time.c called from board_init_f(). */
  62
  63         /* Initialize the PIT. Unlock PISCRK */
  64         immr->im_sitk.sitk_piscrk = KAPWR_KEY;
  65         immr->im_sit.sit_piscr = CONFIG_SYS_PISCR;
  66
  67 #if !defined(CONFIG_PATI)
  68         /* PATI sest PLL in start.S */
  69         /* PLL (CPU clock) settings */
  70         immr->im_clkrstk.cark_plprcrk = KAPWR_KEY;
  71
  72         /* If CONFIG_SYS_PLPRCR (set in the various *_config.h files) tries to
  73          * set the MF field, then just copy CONFIG_SYS_PLPRCR over car_plprcr,
  74          * otherwise OR in CONFIG_SYS_PLPRCR so we do not change the currentMF
  75          * field value.
  76          */
  77 #if ((CONFIG_SYS_PLPRCR & PLPRCR_MF_MSK) != 0)
  78         reg = CONFIG_SYS_PLPRCR;                        /* reset control bits   */
  79 #else
  80         reg = immr->im_clkrst.car_plprcr;
  81         reg &= PLPRCR_MF_MSK;                   /* isolate MF field */
  82         reg |= CONFIG_SYS_PLPRCR;                       /* reset control bits   */
  83 #endif
  84         immr->im_clkrst.car_plprcr = reg;
  85
  86 #endif /* !defined(CONFIG_PATI) */
  87
  88         /* System integration timers. CONFIG_SYS_MASK has EBDF configuration */
  89         immr->im_clkrstk.cark_sccrk = KAPWR_KEY;
  90         reg = immr->im_clkrst.car_sccr;
  91         reg &= SCCR_MASK;
  92         reg |= CONFIG_SYS_SCCR;
  93         immr->im_clkrst.car_sccr = reg;
  94
  95         /* Memory Controller */
  96         memctl->memc_br0 = CONFIG_SYS_BR0_PRELIM;
  97         memctl->memc_or0 = CONFIG_SYS_OR0_PRELIM;
  98
  99 #if (defined(CONFIG_SYS_OR1_PRELIM) && defined(CONFIG_SYS_BR1_PRELIM))
 100         memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM;
 101         memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM;
 102 #endif
 103
 104 #if defined(CONFIG_SYS_OR2_PRELIM) && defined(CONFIG_SYS_BR2_PRELIM)
 105         memctl->memc_or2 = CONFIG_SYS_OR2_PRELIM;
 106         memctl->memc_br2 = CONFIG_SYS_BR2_PRELIM;
 107 #endif
 108
 109 #if defined(CONFIG_SYS_OR3_PRELIM) && defined(CONFIG_SYS_BR3_PRELIM)
 110         memctl->memc_or3 = CONFIG_SYS_OR3_PRELIM;
 111         memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM;
 112 #endif
 113
 114 }
 115
 116 /*
 117  * Initialize higher level parts of cpu
 118  */
 119 int cpu_init_r (void)
 120 {
 121         /* Nothing to do at the moment */
 122         return (0);
 123 }