cpu/mpc8220/speed.c

   1 /*
   2  * (C) Copyright 2004, Freescale, Inc
   3  * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <mpc8220.h>
  26 #include <asm/processor.h>
  27
  28 DECLARE_GLOBAL_DATA_PTR;
  29
  30 typedef struct pllmultiplier {
  31         u8 hid1;
  32         int multi;
  33         int vco_div;
  34 } pllcfg_t;
  35
  36 /* ------------------------------------------------------------------------- */
  37
  38 /*
  39  *
  40  */
  41
  42 int get_clocks (void)
  43 {
  44         pllcfg_t bus2core[] = {
  45                 {0x02, 2, 8},   /* 1 */
  46                 {0x01, 2, 4},
  47                 {0x0C, 3, 8},   /* 1.5 */
  48                 {0x00, 3, 4},
  49                 {0x18, 3, 2},
  50                 {0x05, 4, 4},   /* 2 */
  51                 {0x04, 4, 2},
  52                 {0x11, 5, 4},   /* 2.5 */
  53                 {0x06, 5, 2},
  54                 {0x10, 6, 4},   /* 3 */
  55                 {0x08, 6, 2},
  56                 {0x0E, 7, 2},   /* 3.5 */
  57                 {0x0A, 8, 2},   /* 4 */
  58                 {0x07, 9, 2},   /* 4.5 */
  59                 {0x0B, 10, 2},  /* 5 */
  60                 {0x09, 11, 2},  /* 5.5 */
  61                 {0x0D, 12, 2},  /* 6 */
  62                 {0x12, 13, 2},  /* 6.5 */
  63                 {0x14, 14, 2},  /* 7 */
  64                 {0x16, 15, 2},  /* 7.5 */
  65                 {0x1C, 16, 2}   /* 8 */
  66         };
  67         u32 hid1;
  68         int i, size, pci2bus;
  69
  70 #if !defined(CONFIG_SYS_MPC8220_CLKIN)
  71 #error clock measuring not implemented yet - define CONFIG_SYS_MPC8220_CLKIN
  72 #endif
  73
  74         gd->inp_clk = CONFIG_SYS_MPC8220_CLKIN;
  75
  76         /* Read XLB to PCI(INP) clock multiplier */
  77         pci2bus = (*((volatile u32 *)PCI_REG_PCIGSCR) &
  78                 PCI_REG_PCIGSCR_PCI2XLB_CLK_MASK)>>PCI_REG_PCIGSCR_PCI2XLB_CLK_BIT;
  79
  80         /* XLB bus clock */
  81         gd->bus_clk = CONFIG_SYS_MPC8220_CLKIN * pci2bus;
  82
  83         /* PCI clock is same as input clock */
  84         gd->pci_clk = CONFIG_SYS_MPC8220_CLKIN;
  85
  86         /* FlexBus is temporary set as the same as input clock */
  87         /* will do dynamic in the future */
  88         gd->flb_clk = CONFIG_SYS_MPC8220_CLKIN;
  89
  90         /* CPU Clock - Read HID1 */
  91         asm volatile ("mfspr %0, 1009":"=r" (hid1):);
  92
  93         size = sizeof (bus2core) / sizeof (pllcfg_t);
  94
  95         hid1 >>= 27;
  96
  97         for (i = 0; i < size; i++)
  98                 if (hid1 == bus2core[i].hid1) {
  99                         gd->cpu_clk = (bus2core[i].multi * gd->bus_clk) >> 1;
 100                         gd->vco_clk = CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER * (gd->pci_clk * bus2core[i].vco_div)/2;
 101                         break;
 102                 }
 103
 104         /* hardcoded 81MHz for now */
 105         gd->pev_clk = 81000000;
 106
 107         return (0);
 108 }
 109
 110 int prt_mpc8220_clks (void)
 111 {
 112         printf ("       Bus %ld MHz, CPU %ld MHz, PCI %ld MHz, VCO %ld MHz\n",
 113                 gd->bus_clk / 1000000, gd->cpu_clk / 1000000,
 114                 gd->pci_clk / 1000000, gd->vco_clk / 1000000);
 115
 116         return (0);
 117 }
 118
 119 /* ------------------------------------------------------------------------- */