crypto/arm_arch.h

   1 /*
   2  * Copyright 2011-2024 The OpenSSL Project Authors. All Rights Reserved.
   3  *
   4  * Licensed under the Apache License 2.0 (the "License").  You may not use
   5  * this file except in compliance with the License.  You can obtain a copy
   6  * in the file LICENSE in the source distribution or at
   7  * https://www.openssl.org/source/license.html
   8  */
   9
  10 #ifndef OSSL_CRYPTO_ARM_ARCH_H
  11 # define OSSL_CRYPTO_ARM_ARCH_H
  12
  13 # if !defined(__ARM_ARCH__)
  14 #  if defined(__CC_ARM)
  15 #   define __ARM_ARCH__ __TARGET_ARCH_ARM
  16 #   if defined(__BIG_ENDIAN)
  17 #    define __ARMEB__
  18 #   else
  19 #    define __ARMEL__
  20 #   endif
  21 #  elif defined(__GNUC__)
  22 #   if   defined(__aarch64__)
  23 #    define __ARM_ARCH__ 8
  24   /*
  25    * Why doesn't gcc define __ARM_ARCH__? Instead it defines
  26    * bunch of below macros. See all_architectures[] table in
  27    * gcc/config/arm/arm.c. On a side note it defines
  28    * __ARMEL__/__ARMEB__ for little-/big-endian.
  29    */
  30 #   elif defined(__ARM_ARCH)
  31 #    define __ARM_ARCH__ __ARM_ARCH
  32 #   elif defined(__ARM_ARCH_8A__)
  33 #    define __ARM_ARCH__ 8
  34 #   elif defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__)     || \
  35         defined(__ARM_ARCH_7R__)|| defined(__ARM_ARCH_7M__)     || \
  36         defined(__ARM_ARCH_7EM__)
  37 #    define __ARM_ARCH__ 7
  38 #   elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__)     || \
  39         defined(__ARM_ARCH_6K__)|| defined(__ARM_ARCH_6M__)     || \
  40         defined(__ARM_ARCH_6Z__)|| defined(__ARM_ARCH_6ZK__)    || \
  41         defined(__ARM_ARCH_6T2__)
  42 #    define __ARM_ARCH__ 6
  43 #   elif defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__)     || \
  44         defined(__ARM_ARCH_5E__)|| defined(__ARM_ARCH_5TE__)    || \
  45         defined(__ARM_ARCH_5TEJ__)
  46 #    define __ARM_ARCH__ 5
  47 #   elif defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__)
  48 #    define __ARM_ARCH__ 4
  49 #   else
  50 #    error "unsupported ARM architecture"
  51 #   endif
  52 #  elif defined(__ARM_ARCH)
  53 #   define __ARM_ARCH__ __ARM_ARCH
  54 #  endif
  55 # endif
  56
  57 # if !defined(__ARM_MAX_ARCH__)
  58 #  define __ARM_MAX_ARCH__ __ARM_ARCH__
  59 # endif
  60
  61 # if __ARM_MAX_ARCH__<__ARM_ARCH__
  62 #  error "__ARM_MAX_ARCH__ can't be less than __ARM_ARCH__"
  63 # elif __ARM_MAX_ARCH__!=__ARM_ARCH__
  64 #  if __ARM_ARCH__<7 && __ARM_MAX_ARCH__>=7 && defined(__ARMEB__)
  65 #   error "can't build universal big-endian binary"
  66 #  endif
  67 # endif
  68
  69 # ifndef __ASSEMBLER__
  70 extern unsigned int OPENSSL_armcap_P;
  71 extern unsigned int OPENSSL_arm_midr;
  72 extern unsigned int OPENSSL_armv8_rsa_neonized;
  73 # endif
  74
  75 # define ARMV7_NEON      (1<<0)
  76 # define ARMV7_TICK      (1<<1)
  77 # define ARMV8_AES       (1<<2)
  78 # define ARMV8_SHA1      (1<<3)
  79 # define ARMV8_SHA256    (1<<4)
  80 # define ARMV8_PMULL     (1<<5)
  81 # define ARMV8_SHA512    (1<<6)
  82 # define ARMV8_CPUID     (1<<7)
  83 # define ARMV8_RNG       (1<<8)
  84 # define ARMV8_SM3       (1<<9)
  85 # define ARMV8_SM4       (1<<10)
  86 # define ARMV8_SHA3      (1<<11)
  87 # define ARMV8_UNROLL8_EOR3      (1<<12)
  88 # define ARMV8_SVE       (1<<13)
  89 # define ARMV8_SVE2      (1<<14)
  90 # define ARMV8_HAVE_SHA3_AND_WORTH_USING     (1<<15)
  91 # define ARMV8_UNROLL12_EOR3     (1<<16)
  92
  93 /*
  94  * MIDR_EL1 system register
  95  *
  96  * 63___ _ ___32_31___ _ ___24_23_____20_19_____16_15__ _ __4_3_______0
  97  * |            |             |         |         |          |        |
  98  * |RES0        | Implementer | Variant | Arch    | PartNum  |Revision|
  99  * |____ _ _____|_____ _ _____|_________|_______ _|____ _ ___|________|
 100  *
 101  */
 102
 103 # define ARM_CPU_IMP_ARM           0x41
 104 # define HISI_CPU_IMP              0x48
 105 # define ARM_CPU_IMP_APPLE         0x61
 106 # define ARM_CPU_IMP_MICROSOFT     0x6D
 107 # define ARM_CPU_IMP_AMPERE        0xC0
 108
 109 # define ARM_CPU_PART_CORTEX_A72   0xD08
 110 # define ARM_CPU_PART_N1           0xD0C
 111 # define ARM_CPU_PART_V1           0xD40
 112 # define ARM_CPU_PART_N2           0xD49
 113 # define HISI_CPU_PART_KP920       0xD01
 114 # define ARM_CPU_PART_V2           0xD4F
 115
 116 # define APPLE_CPU_PART_M1_ICESTORM         0x022
 117 # define APPLE_CPU_PART_M1_FIRESTORM        0x023
 118 # define APPLE_CPU_PART_M1_ICESTORM_PRO     0x024
 119 # define APPLE_CPU_PART_M1_FIRESTORM_PRO    0x025
 120 # define APPLE_CPU_PART_M1_ICESTORM_MAX     0x028
 121 # define APPLE_CPU_PART_M1_FIRESTORM_MAX    0x029
 122 # define APPLE_CPU_PART_M2_BLIZZARD         0x032
 123 # define APPLE_CPU_PART_M2_AVALANCHE        0x033
 124 # define APPLE_CPU_PART_M2_BLIZZARD_PRO     0x034
 125 # define APPLE_CPU_PART_M2_AVALANCHE_PRO    0x035
 126 # define APPLE_CPU_PART_M2_BLIZZARD_MAX     0x038
 127 # define APPLE_CPU_PART_M2_AVALANCHE_MAX    0x039
 128
 129 # define MICROSOFT_CPU_PART_COBALT_100      0xD49
 130
 131 # define MIDR_PARTNUM_SHIFT       4
 132 # define MIDR_PARTNUM_MASK        (0xfffU << MIDR_PARTNUM_SHIFT)
 133 # define MIDR_PARTNUM(midr)       \
 134            (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
 135
 136 # define MIDR_IMPLEMENTER_SHIFT   24
 137 # define MIDR_IMPLEMENTER_MASK    (0xffU << MIDR_IMPLEMENTER_SHIFT)
 138 # define MIDR_IMPLEMENTER(midr)   \
 139            (((midr) & MIDR_IMPLEMENTER_MASK) >> MIDR_IMPLEMENTER_SHIFT)
 140
 141 # define MIDR_ARCHITECTURE_SHIFT  16
 142 # define MIDR_ARCHITECTURE_MASK   (0xfU << MIDR_ARCHITECTURE_SHIFT)
 143 # define MIDR_ARCHITECTURE(midr)  \
 144            (((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT)
 145
 146 # define MIDR_CPU_MODEL_MASK \
 147            (MIDR_IMPLEMENTER_MASK | \
 148             MIDR_PARTNUM_MASK     | \
 149             MIDR_ARCHITECTURE_MASK)
 150
 151 # define MIDR_CPU_MODEL(imp, partnum) \
 152            (((imp)     << MIDR_IMPLEMENTER_SHIFT)  | \
 153             (0xfU      << MIDR_ARCHITECTURE_SHIFT) | \
 154             ((partnum) << MIDR_PARTNUM_SHIFT))
 155
 156 # define MIDR_IS_CPU_MODEL(midr, imp, partnum) \
 157            (((midr) & MIDR_CPU_MODEL_MASK) == MIDR_CPU_MODEL(imp, partnum))
 158
 159 #if defined(__ASSEMBLER__)
 160
 161    /*
 162     * Support macros for
 163     *   - Armv8.3-A Pointer Authentication and
 164     *   - Armv8.5-A Branch Target Identification
 165     * features which require emitting a .note.gnu.property section with the
 166     * appropriate architecture-dependent feature bits set.
 167     * Read more: "ELF for the Arm® 64-bit Architecture"
 168     */
 169
 170 #  if defined(__ARM_FEATURE_BTI_DEFAULT) && __ARM_FEATURE_BTI_DEFAULT == 1
 171 #   define GNU_PROPERTY_AARCH64_BTI (1 << 0)   /* Has Branch Target Identification */
 172 #   define AARCH64_VALID_CALL_TARGET hint #34  /* BTI 'c' */
 173 #  else
 174 #   define GNU_PROPERTY_AARCH64_BTI 0  /* No Branch Target Identification */
 175 #   define AARCH64_VALID_CALL_TARGET
 176 #  endif
 177
 178 #  if defined(__ARM_FEATURE_PAC_DEFAULT) && \
 179        (__ARM_FEATURE_PAC_DEFAULT & 1) == 1  /* Signed with A-key */
 180 #   define GNU_PROPERTY_AARCH64_POINTER_AUTH \
 181      (1 << 1)                                       /* Has Pointer Authentication */
 182 #   define AARCH64_SIGN_LINK_REGISTER hint #25      /* PACIASP */
 183 #   define AARCH64_VALIDATE_LINK_REGISTER hint #29  /* AUTIASP */
 184 #  elif defined(__ARM_FEATURE_PAC_DEFAULT) && \
 185        (__ARM_FEATURE_PAC_DEFAULT & 2) == 2  /* Signed with B-key */
 186 #   define GNU_PROPERTY_AARCH64_POINTER_AUTH \
 187      (1 << 1)                                       /* Has Pointer Authentication */
 188 #   define AARCH64_SIGN_LINK_REGISTER hint #27      /* PACIBSP */
 189 #   define AARCH64_VALIDATE_LINK_REGISTER hint #31  /* AUTIBSP */
 190 #  else
 191 #   define GNU_PROPERTY_AARCH64_POINTER_AUTH 0  /* No Pointer Authentication */
 192 #   if GNU_PROPERTY_AARCH64_BTI != 0
 193 #    define AARCH64_SIGN_LINK_REGISTER AARCH64_VALID_CALL_TARGET
 194 #   else
 195 #    define AARCH64_SIGN_LINK_REGISTER
 196 #   endif
 197 #   define AARCH64_VALIDATE_LINK_REGISTER
 198 #  endif
 199
 200 #  if GNU_PROPERTY_AARCH64_POINTER_AUTH != 0 || GNU_PROPERTY_AARCH64_BTI != 0
 201     .pushsection .note.gnu.property, "a";
 202     .balign 8;
 203     .long 4;
 204     .long 0x10;
 205     .long 0x5;
 206     .asciz "GNU";
 207     .long 0xc0000000; /* GNU_PROPERTY_AARCH64_FEATURE_1_AND */
 208     .long 4;
 209     .long (GNU_PROPERTY_AARCH64_POINTER_AUTH | GNU_PROPERTY_AARCH64_BTI);
 210     .long 0;
 211     .popsection;
 212 #  endif
 213
 214 # endif  /* defined __ASSEMBLER__ */
 215
 216 # define IS_CPU_SUPPORT_UNROLL8_EOR3() \
 217            (OPENSSL_armcap_P & ARMV8_UNROLL8_EOR3)
 218
 219 #endif