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1 /*
2 * Copyright 2009-2021 The OpenSSL Project Authors. All Rights Reserved.
3 *
4 * Licensed under the Apache License 2.0 (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
8 */
9
10 #include <stdio.h>
11 #include <stdlib.h>
12 #include <string.h>
13 #include <setjmp.h>
14 #include <signal.h>
15 #include <unistd.h>
16 #if defined(__linux) || defined(_AIX)
17 # include <sys/utsname.h>
18 #endif
19 #if defined(_AIX53) /* defined even on post-5.3 */
20 # include <sys/systemcfg.h>
21 # if !defined(__power_set)
22 # define __power_set(a) (_system_configuration.implementation & (a))
23 # endif
24 #endif
25 #if defined(__APPLE__) && defined(__MACH__)
26 # include <sys/types.h>
27 # include <sys/sysctl.h>
28 #endif
29 #include <openssl/crypto.h>
30 #include <openssl/bn.h>
31 #include <internal/cryptlib.h>
32 #include <crypto/chacha.h>
33 #include "bn/bn_local.h"
34
35 #include "ppc_arch.h"
36
37 unsigned int OPENSSL_ppccap_P = 0;
38
39 static sigset_t all_masked;
40
41
42 #ifdef OPENSSL_BN_ASM_MONT
43 int bn_mul_mont(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
44 const BN_ULONG *np, const BN_ULONG *n0, int num)
45 {
46 int bn_mul_mont_int(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
47 const BN_ULONG *np, const BN_ULONG *n0, int num);
48 int bn_mul4x_mont_int(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
49 const BN_ULONG *np, const BN_ULONG *n0, int num);
50
51 if (num < 4)
52 return 0;
53
54 if ((num & 3) == 0)
55 return bn_mul4x_mont_int(rp, ap, bp, np, n0, num);
56
57 /*
58 * There used to be [optional] call to bn_mul_mont_fpu64 here,
59 * but above subroutine is faster on contemporary processors.
60 * Formulation means that there might be old processors where
61 * FPU code path would be faster, POWER6 perhaps, but there was
62 * no opportunity to figure it out...
63 */
64
65 return bn_mul_mont_int(rp, ap, bp, np, n0, num);
66 }
67 #endif
68 void sha256_block_p8(void *ctx, const void *inp, size_t len);
69 void sha256_block_ppc(void *ctx, const void *inp, size_t len);
70 void sha256_block_data_order(void *ctx, const void *inp, size_t len);
71 void sha256_block_data_order(void *ctx, const void *inp, size_t len)
72 {
73 OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha256_block_p8(ctx, inp, len) :
74 sha256_block_ppc(ctx, inp, len);
75 }
76
77 void sha512_block_p8(void *ctx, const void *inp, size_t len);
78 void sha512_block_ppc(void *ctx, const void *inp, size_t len);
79 void sha512_block_data_order(void *ctx, const void *inp, size_t len);
80 void sha512_block_data_order(void *ctx, const void *inp, size_t len)
81 {
82 OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha512_block_p8(ctx, inp, len) :
83 sha512_block_ppc(ctx, inp, len);
84 }
85
86 #ifndef FIPS_MODULE
87 # ifndef OPENSSL_NO_CHACHA
88 void ChaCha20_ctr32_int(unsigned char *out, const unsigned char *inp,
89 size_t len, const unsigned int key[8],
90 const unsigned int counter[4]);
91 void ChaCha20_ctr32_vmx(unsigned char *out, const unsigned char *inp,
92 size_t len, const unsigned int key[8],
93 const unsigned int counter[4]);
94 void ChaCha20_ctr32_vsx(unsigned char *out, const unsigned char *inp,
95 size_t len, const unsigned int key[8],
96 const unsigned int counter[4]);
97 void ChaCha20_ctr32(unsigned char *out, const unsigned char *inp,
98 size_t len, const unsigned int key[8],
99 const unsigned int counter[4])
100 {
101 OPENSSL_ppccap_P & PPC_CRYPTO207
102 ? ChaCha20_ctr32_vsx(out, inp, len, key, counter)
103 : OPENSSL_ppccap_P & PPC_ALTIVEC
104 ? ChaCha20_ctr32_vmx(out, inp, len, key, counter)
105 : ChaCha20_ctr32_int(out, inp, len, key, counter);
106 }
107 # endif
108
109 # ifndef OPENSSL_NO_POLY1305
110 void poly1305_init_int(void *ctx, const unsigned char key[16]);
111 void poly1305_blocks(void *ctx, const unsigned char *inp, size_t len,
112 unsigned int padbit);
113 void poly1305_emit(void *ctx, unsigned char mac[16],
114 const unsigned int nonce[4]);
115 void poly1305_init_fpu(void *ctx, const unsigned char key[16]);
116 void poly1305_blocks_fpu(void *ctx, const unsigned char *inp, size_t len,
117 unsigned int padbit);
118 void poly1305_emit_fpu(void *ctx, unsigned char mac[16],
119 const unsigned int nonce[4]);
120 void poly1305_init_vsx(void *ctx, const unsigned char key[16]);
121 void poly1305_blocks_vsx(void *ctx, const unsigned char *inp, size_t len,
122 unsigned int padbit);
123 void poly1305_emit_vsx(void *ctx, unsigned char mac[16],
124 const unsigned int nonce[4]);
125 int poly1305_init(void *ctx, const unsigned char key[16], void *func[2]);
126 int poly1305_init(void *ctx, const unsigned char key[16], void *func[2])
127 {
128 if (OPENSSL_ppccap_P & PPC_CRYPTO207) {
129 poly1305_init_int(ctx, key);
130 func[0] = (void*)(uintptr_t)poly1305_blocks_vsx;
131 func[1] = (void*)(uintptr_t)poly1305_emit;
132 } else if (sizeof(size_t) == 4 && (OPENSSL_ppccap_P & PPC_FPU)) {
133 poly1305_init_fpu(ctx, key);
134 func[0] = (void*)(uintptr_t)poly1305_blocks_fpu;
135 func[1] = (void*)(uintptr_t)poly1305_emit_fpu;
136 } else {
137 poly1305_init_int(ctx, key);
138 func[0] = (void*)(uintptr_t)poly1305_blocks;
139 func[1] = (void*)(uintptr_t)poly1305_emit;
140 }
141 return 1;
142 }
143 # endif
144 #endif /* FIPS_MODULE */
145
146 #ifdef ECP_NISTZ256_ASM
147 void ecp_nistz256_mul_mont(unsigned long res[4], const unsigned long a[4],
148 const unsigned long b[4]);
149
150 void ecp_nistz256_to_mont(unsigned long res[4], const unsigned long in[4]);
151 void ecp_nistz256_to_mont(unsigned long res[4], const unsigned long in[4])
152 {
153 static const unsigned long RR[] = { 0x0000000000000003U,
154 0xfffffffbffffffffU,
155 0xfffffffffffffffeU,
156 0x00000004fffffffdU };
157
158 ecp_nistz256_mul_mont(res, in, RR);
159 }
160
161 void ecp_nistz256_from_mont(unsigned long res[4], const unsigned long in[4]);
162 void ecp_nistz256_from_mont(unsigned long res[4], const unsigned long in[4])
163 {
164 static const unsigned long one[] = { 1, 0, 0, 0 };
165
166 ecp_nistz256_mul_mont(res, in, one);
167 }
168 #endif
169
170 static sigjmp_buf ill_jmp;
171 static void ill_handler(int sig)
172 {
173 siglongjmp(ill_jmp, sig);
174 }
175
176 void OPENSSL_fpu_probe(void);
177 void OPENSSL_ppc64_probe(void);
178 void OPENSSL_altivec_probe(void);
179 void OPENSSL_crypto207_probe(void);
180 void OPENSSL_madd300_probe(void);
181
182 long OPENSSL_rdtsc_mftb(void);
183 long OPENSSL_rdtsc_mfspr268(void);
184
185 uint32_t OPENSSL_rdtsc(void)
186 {
187 if (OPENSSL_ppccap_P & PPC_MFTB)
188 return OPENSSL_rdtsc_mftb();
189 else if (OPENSSL_ppccap_P & PPC_MFSPR268)
190 return OPENSSL_rdtsc_mfspr268();
191 else
192 return 0;
193 }
194
195 size_t OPENSSL_instrument_bus_mftb(unsigned int *, size_t);
196 size_t OPENSSL_instrument_bus_mfspr268(unsigned int *, size_t);
197
198 size_t OPENSSL_instrument_bus(unsigned int *out, size_t cnt)
199 {
200 if (OPENSSL_ppccap_P & PPC_MFTB)
201 return OPENSSL_instrument_bus_mftb(out, cnt);
202 else if (OPENSSL_ppccap_P & PPC_MFSPR268)
203 return OPENSSL_instrument_bus_mfspr268(out, cnt);
204 else
205 return 0;
206 }
207
208 size_t OPENSSL_instrument_bus2_mftb(unsigned int *, size_t, size_t);
209 size_t OPENSSL_instrument_bus2_mfspr268(unsigned int *, size_t, size_t);
210
211 size_t OPENSSL_instrument_bus2(unsigned int *out, size_t cnt, size_t max)
212 {
213 if (OPENSSL_ppccap_P & PPC_MFTB)
214 return OPENSSL_instrument_bus2_mftb(out, cnt, max);
215 else if (OPENSSL_ppccap_P & PPC_MFSPR268)
216 return OPENSSL_instrument_bus2_mfspr268(out, cnt, max);
217 else
218 return 0;
219 }
220
221 #if defined(__GLIBC__) && defined(__GLIBC_PREREQ)
222 # if __GLIBC_PREREQ(2, 16)
223 # include <sys/auxv.h>
224 # define OSSL_IMPLEMENT_GETAUXVAL
225 # endif
226 #endif
227
228 #if defined(__FreeBSD__)
229 # include <sys/param.h>
230 # if __FreeBSD_version >= 1200000
231 # include <sys/auxv.h>
232 # define OSSL_IMPLEMENT_GETAUXVAL
233
234 static unsigned long getauxval(unsigned long key)
235 {
236 unsigned long val = 0ul;
237
238 if (elf_aux_info((int)key, &val, sizeof(val)) != 0)
239 return 0ul;
240
241 return val;
242 }
243 # endif
244 #endif
245
246 /* I wish <sys/auxv.h> was universally available */
247 #define HWCAP 16 /* AT_HWCAP */
248 #define HWCAP_PPC64 (1U << 30)
249 #define HWCAP_ALTIVEC (1U << 28)
250 #define HWCAP_FPU (1U << 27)
251 #define HWCAP_POWER6_EXT (1U << 9)
252 #define HWCAP_VSX (1U << 7)
253
254 #define HWCAP2 26 /* AT_HWCAP2 */
255 #define HWCAP_VEC_CRYPTO (1U << 25)
256 #define HWCAP_ARCH_3_00 (1U << 23)
257
258 # if defined(__GNUC__) && __GNUC__>=2
259 __attribute__ ((constructor))
260 # endif
261 void OPENSSL_cpuid_setup(void)
262 {
263 char *e;
264 struct sigaction ill_oact, ill_act;
265 sigset_t oset;
266 static int trigger = 0;
267
268 if (trigger)
269 return;
270 trigger = 1;
271
272 if ((e = getenv("OPENSSL_ppccap"))) {
273 OPENSSL_ppccap_P = strtoul(e, NULL, 0);
274 return;
275 }
276
277 OPENSSL_ppccap_P = 0;
278
279 #if defined(_AIX)
280 OPENSSL_ppccap_P |= PPC_FPU;
281
282 if (sizeof(size_t) == 4) {
283 struct utsname uts;
284 # if defined(_SC_AIX_KERNEL_BITMODE)
285 if (sysconf(_SC_AIX_KERNEL_BITMODE) != 64)
286 return;
287 # endif
288 if (uname(&uts) != 0 || atoi(uts.version) < 6)
289 return;
290 }
291
292 # if defined(__power_set)
293 /*
294 * Value used in __power_set is a single-bit 1<<n one denoting
295 * specific processor class. Incidentally 0xffffffff<<n can be
296 * used to denote specific processor and its successors.
297 */
298 if (sizeof(size_t) == 4) {
299 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
300 if (__power_set(0xffffffffU<<13)) /* POWER5 and later */
301 OPENSSL_ppccap_P |= PPC_FPU64;
302 } else {
303 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
304 if (__power_set(0x1U<<14)) /* POWER6 */
305 OPENSSL_ppccap_P |= PPC_FPU64;
306 }
307
308 if (__power_set(0xffffffffU<<14)) /* POWER6 and later */
309 OPENSSL_ppccap_P |= PPC_ALTIVEC;
310
311 if (__power_set(0xffffffffU<<16)) /* POWER8 and later */
312 OPENSSL_ppccap_P |= PPC_CRYPTO207;
313
314 if (__power_set(0xffffffffU<<17)) /* POWER9 and later */
315 OPENSSL_ppccap_P |= PPC_MADD300;
316
317 return;
318 # endif
319 #endif
320
321 #if defined(__APPLE__) && defined(__MACH__)
322 OPENSSL_ppccap_P |= PPC_FPU;
323
324 {
325 int val;
326 size_t len = sizeof(val);
327
328 if (sysctlbyname("hw.optional.64bitops", &val, &len, NULL, 0) == 0) {
329 if (val)
330 OPENSSL_ppccap_P |= PPC_FPU64;
331 }
332
333 len = sizeof(val);
334 if (sysctlbyname("hw.optional.altivec", &val, &len, NULL, 0) == 0) {
335 if (val)
336 OPENSSL_ppccap_P |= PPC_ALTIVEC;
337 }
338
339 return;
340 }
341 #endif
342
343 #ifdef OSSL_IMPLEMENT_GETAUXVAL
344 {
345 unsigned long hwcap = getauxval(HWCAP);
346 unsigned long hwcap2 = getauxval(HWCAP2);
347
348 if (hwcap & HWCAP_FPU) {
349 OPENSSL_ppccap_P |= PPC_FPU;
350
351 if (sizeof(size_t) == 4) {
352 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
353 if (hwcap & HWCAP_PPC64)
354 OPENSSL_ppccap_P |= PPC_FPU64;
355 } else {
356 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
357 if (hwcap & HWCAP_POWER6_EXT)
358 OPENSSL_ppccap_P |= PPC_FPU64;
359 }
360 }
361
362 if (hwcap & HWCAP_ALTIVEC) {
363 OPENSSL_ppccap_P |= PPC_ALTIVEC;
364
365 if ((hwcap & HWCAP_VSX) && (hwcap2 & HWCAP_VEC_CRYPTO))
366 OPENSSL_ppccap_P |= PPC_CRYPTO207;
367 }
368
369 if (hwcap2 & HWCAP_ARCH_3_00) {
370 OPENSSL_ppccap_P |= PPC_MADD300;
371 }
372 }
373 #endif
374
375 sigfillset(&all_masked);
376 sigdelset(&all_masked, SIGILL);
377 sigdelset(&all_masked, SIGTRAP);
378 #ifdef SIGEMT
379 sigdelset(&all_masked, SIGEMT);
380 #endif
381 sigdelset(&all_masked, SIGFPE);
382 sigdelset(&all_masked, SIGBUS);
383 sigdelset(&all_masked, SIGSEGV);
384
385 memset(&ill_act, 0, sizeof(ill_act));
386 ill_act.sa_handler = ill_handler;
387 ill_act.sa_mask = all_masked;
388
389 sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
390 sigaction(SIGILL, &ill_act, &ill_oact);
391
392 #ifndef OSSL_IMPLEMENT_GETAUXVAL
393 if (sigsetjmp(ill_jmp,1) == 0) {
394 OPENSSL_fpu_probe();
395 OPENSSL_ppccap_P |= PPC_FPU;
396
397 if (sizeof(size_t) == 4) {
398 # ifdef __linux
399 struct utsname uts;
400 if (uname(&uts) == 0 && strcmp(uts.machine, "ppc64") == 0)
401 # endif
402 if (sigsetjmp(ill_jmp, 1) == 0) {
403 OPENSSL_ppc64_probe();
404 OPENSSL_ppccap_P |= PPC_FPU64;
405 }
406 } else {
407 /*
408 * Wanted code detecting POWER6 CPU and setting PPC_FPU64
409 */
410 }
411 }
412
413 if (sigsetjmp(ill_jmp, 1) == 0) {
414 OPENSSL_altivec_probe();
415 OPENSSL_ppccap_P |= PPC_ALTIVEC;
416 if (sigsetjmp(ill_jmp, 1) == 0) {
417 OPENSSL_crypto207_probe();
418 OPENSSL_ppccap_P |= PPC_CRYPTO207;
419 }
420 }
421
422 if (sigsetjmp(ill_jmp, 1) == 0) {
423 OPENSSL_madd300_probe();
424 OPENSSL_ppccap_P |= PPC_MADD300;
425 }
426 #endif
427
428 if (sigsetjmp(ill_jmp, 1) == 0) {
429 OPENSSL_rdtsc_mftb();
430 OPENSSL_ppccap_P |= PPC_MFTB;
431 } else if (sigsetjmp(ill_jmp, 1) == 0) {
432 OPENSSL_rdtsc_mfspr268();
433 OPENSSL_ppccap_P |= PPC_MFSPR268;
434 }
435
436 sigaction(SIGILL, &ill_oact, NULL);
437 sigprocmask(SIG_SETMASK, &oset, NULL);
438 }