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git.ipfire.org Git - thirdparty/openssl.git/blob - crypto/ppccap.c
2 * Copyright 2009-2016 The OpenSSL Project Authors. All Rights Reserved.
4 * Licensed under the OpenSSL license (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
16 #if defined(__linux) || defined(_AIX)
17 # include <sys/utsname.h>
19 #if defined(_AIX53) /* defined even on post-5.3 */
20 # include <sys/systemcfg.h>
21 # if !defined(__power_set)
22 # define __power_set(a) (_system_configuration.implementation & (a))
25 #include <openssl/crypto.h>
26 #include <openssl/bn.h>
30 unsigned int OPENSSL_ppccap_P
= 0;
32 static sigset_t all_masked
;
34 #ifdef OPENSSL_BN_ASM_MONT
35 int bn_mul_mont(BN_ULONG
*rp
, const BN_ULONG
*ap
, const BN_ULONG
*bp
,
36 const BN_ULONG
*np
, const BN_ULONG
*n0
, int num
)
38 int bn_mul_mont_int(BN_ULONG
*rp
, const BN_ULONG
*ap
, const BN_ULONG
*bp
,
39 const BN_ULONG
*np
, const BN_ULONG
*n0
, int num
);
40 int bn_mul4x_mont_int(BN_ULONG
*rp
, const BN_ULONG
*ap
, const BN_ULONG
*bp
,
41 const BN_ULONG
*np
, const BN_ULONG
*n0
, int num
);
47 return bn_mul4x_mont_int(rp
, ap
, bp
, np
, n0
, num
);
50 * There used to be [optional] call to bn_mul_mont_fpu64 here,
51 * but above subroutine is faster on contemporary processors.
52 * Formulation means that there might be old processors where
53 * FPU code path would be faster, POWER6 perhaps, but there was
54 * no opportunity to figure it out...
57 return bn_mul_mont_int(rp
, ap
, bp
, np
, n0
, num
);
61 void sha256_block_p8(void *ctx
, const void *inp
, size_t len
);
62 void sha256_block_ppc(void *ctx
, const void *inp
, size_t len
);
63 void sha256_block_data_order(void *ctx
, const void *inp
, size_t len
)
65 OPENSSL_ppccap_P
& PPC_CRYPTO207
? sha256_block_p8(ctx
, inp
, len
) :
66 sha256_block_ppc(ctx
, inp
, len
);
69 void sha512_block_p8(void *ctx
, const void *inp
, size_t len
);
70 void sha512_block_ppc(void *ctx
, const void *inp
, size_t len
);
71 void sha512_block_data_order(void *ctx
, const void *inp
, size_t len
)
73 OPENSSL_ppccap_P
& PPC_CRYPTO207
? sha512_block_p8(ctx
, inp
, len
) :
74 sha512_block_ppc(ctx
, inp
, len
);
77 #ifndef OPENSSL_NO_CHACHA
78 void ChaCha20_ctr32_int(unsigned char *out
, const unsigned char *inp
,
79 size_t len
, const unsigned int key
[8],
80 const unsigned int counter
[4]);
81 void ChaCha20_ctr32_vmx(unsigned char *out
, const unsigned char *inp
,
82 size_t len
, const unsigned int key
[8],
83 const unsigned int counter
[4]);
84 void ChaCha20_ctr32(unsigned char *out
, const unsigned char *inp
,
85 size_t len
, const unsigned int key
[8],
86 const unsigned int counter
[4])
88 OPENSSL_ppccap_P
& PPC_ALTIVEC
89 ? ChaCha20_ctr32_vmx(out
, inp
, len
, key
, counter
)
90 : ChaCha20_ctr32_int(out
, inp
, len
, key
, counter
);
94 #ifndef OPENSSL_NO_POLY1305
95 void poly1305_init_int(void *ctx
, const unsigned char key
[16]);
96 void poly1305_blocks(void *ctx
, const unsigned char *inp
, size_t len
,
98 void poly1305_emit(void *ctx
, unsigned char mac
[16],
99 const unsigned int nonce
[4]);
100 void poly1305_init_fpu(void *ctx
, const unsigned char key
[16]);
101 void poly1305_blocks_fpu(void *ctx
, const unsigned char *inp
, size_t len
,
102 unsigned int padbit
);
103 void poly1305_emit_fpu(void *ctx
, unsigned char mac
[16],
104 const unsigned int nonce
[4]);
105 int poly1305_init(void *ctx
, const unsigned char key
[16], void *func
[2])
107 if (sizeof(size_t) == 4 && (OPENSSL_ppccap_P
& PPC_FPU
)) {
108 poly1305_init_fpu(ctx
, key
);
109 func
[0] = poly1305_blocks_fpu
;
110 func
[1] = poly1305_emit_fpu
;
112 poly1305_init_int(ctx
, key
);
113 func
[0] = poly1305_blocks
;
114 func
[1] = poly1305_emit
;
120 #ifdef ECP_NISTZ256_ASM
121 void ecp_nistz256_mul_mont(unsigned long res
[4], const unsigned long a
[4],
122 const unsigned long b
[4]);
124 void ecp_nistz256_to_mont(unsigned long res
[4], const unsigned long in
[4]);
125 void ecp_nistz256_to_mont(unsigned long res
[4], const unsigned long in
[4])
127 static const unsigned long RR
[] = { 0x0000000000000003U
,
130 0x00000004fffffffdU
};
132 ecp_nistz256_mul_mont(res
, in
, RR
);
135 void ecp_nistz256_from_mont(unsigned long res
[4], const unsigned long in
[4]);
136 void ecp_nistz256_from_mont(unsigned long res
[4], const unsigned long in
[4])
138 static const unsigned long one
[] = { 1, 0, 0, 0 };
140 ecp_nistz256_mul_mont(res
, in
, one
);
144 static sigjmp_buf ill_jmp
;
145 static void ill_handler(int sig
)
147 siglongjmp(ill_jmp
, sig
);
150 void OPENSSL_fpu_probe(void);
151 void OPENSSL_ppc64_probe(void);
152 void OPENSSL_altivec_probe(void);
153 void OPENSSL_crypto207_probe(void);
154 void OPENSSL_madd300_probe(void);
157 * Use a weak reference to getauxval() so we can use it if it is available
158 * but don't break the build if it is not. Note that this is *link-time*
159 * feature detection, not *run-time*. In other words if we link with
160 * symbol present, it's expected to be present even at run-time.
162 #if defined(__GNUC__) && __GNUC__>=2 && defined(__ELF__)
163 extern unsigned long getauxval(unsigned long type
) __attribute__ ((weak
));
165 static unsigned long (*getauxval
) (unsigned long) = NULL
;
168 /* I wish <sys/auxv.h> was universally available */
169 #define HWCAP 16 /* AT_HWCAP */
170 #define HWCAP_PPC64 (1U << 30)
171 #define HWCAP_ALTIVEC (1U << 28)
172 #define HWCAP_FPU (1U << 27)
173 #define HWCAP_POWER6_EXT (1U << 9)
174 #define HWCAP_VSX (1U << 7)
176 #define HWCAP2 26 /* AT_HWCAP2 */
177 #define HWCAP_VEC_CRYPTO (1U << 25)
178 #define HWCAP_ARCH_3_00 (1U << 23)
180 # if defined(__GNUC__) && __GNUC__>=2
181 __attribute__ ((constructor
))
183 void OPENSSL_cpuid_setup(void)
186 struct sigaction ill_oact
, ill_act
;
188 static int trigger
= 0;
194 if ((e
= getenv("OPENSSL_ppccap"))) {
195 OPENSSL_ppccap_P
= strtoul(e
, NULL
, 0);
199 OPENSSL_ppccap_P
= 0;
202 OPENSSL_ppccap_P
|= PPC_FPU
;
204 if (sizeof(size_t) == 4) {
206 # if defined(_SC_AIX_KERNEL_BITMODE)
207 if (sysconf(_SC_AIX_KERNEL_BITMODE
) != 64)
210 if (uname(&uts
) != 0 || atoi(uts
.version
) < 6)
214 # if defined(__power_set)
216 * Value used in __power_set is a single-bit 1<<n one denoting
217 * specific processor class. Incidentally 0xffffffff<<n can be
218 * used to denote specific processor and its successors.
220 if (sizeof(size_t) == 4) {
221 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
222 if (__power_set(0xffffffffU
<<13)) /* POWER5 and later */
223 OPENSSL_ppccap_P
|= PPC_FPU64
;
225 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
226 if (__power_set(0x1U
<<14)) /* POWER6 */
227 OPENSSL_ppccap_P
|= PPC_FPU64
;
230 if (__power_set(0xffffffffU
<<14)) /* POWER6 and later */
231 OPENSSL_ppccap_P
|= PPC_ALTIVEC
;
233 if (__power_set(0xffffffffU
<<16)) /* POWER8 and later */
234 OPENSSL_ppccap_P
|= PPC_CRYPTO207
;
236 if (__power_set(0xffffffffU
<<17)) /* POWER9 and later */
237 OPENSSL_ppccap_P
|= PPC_MADD300
;
243 if (getauxval
!= NULL
) {
244 unsigned long hwcap
= getauxval(HWCAP
);
246 if (hwcap
& HWCAP_FPU
) {
247 OPENSSL_ppccap_P
|= PPC_FPU
;
249 if (sizeof(size_t) == 4) {
250 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
251 if (hwcap
& HWCAP_PPC64
)
252 OPENSSL_ppccap_P
|= PPC_FPU64
;
254 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
255 if (hwcap
& HWCAP_POWER6_EXT
)
256 OPENSSL_ppccap_P
|= PPC_FPU64
;
260 if (hwcap
& HWCAP_ALTIVEC
) {
261 OPENSSL_ppccap_P
|= PPC_ALTIVEC
;
263 if ((hwcap
& HWCAP_VSX
) && (getauxval(HWCAP2
) & HWCAP_VEC_CRYPTO
))
264 OPENSSL_ppccap_P
|= PPC_CRYPTO207
;
267 if (hwcap
& HWCAP_ARCH_3_00
) {
268 OPENSSL_ppccap_P
|= PPC_MADD300
;
274 sigfillset(&all_masked
);
275 sigdelset(&all_masked
, SIGILL
);
276 sigdelset(&all_masked
, SIGTRAP
);
278 sigdelset(&all_masked
, SIGEMT
);
280 sigdelset(&all_masked
, SIGFPE
);
281 sigdelset(&all_masked
, SIGBUS
);
282 sigdelset(&all_masked
, SIGSEGV
);
284 memset(&ill_act
, 0, sizeof(ill_act
));
285 ill_act
.sa_handler
= ill_handler
;
286 ill_act
.sa_mask
= all_masked
;
288 sigprocmask(SIG_SETMASK
, &ill_act
.sa_mask
, &oset
);
289 sigaction(SIGILL
, &ill_act
, &ill_oact
);
291 if (sigsetjmp(ill_jmp
,1) == 0) {
293 OPENSSL_ppccap_P
|= PPC_FPU
;
295 if (sizeof(size_t) == 4) {
298 if (uname(&uts
) == 0 && strcmp(uts
.machine
, "ppc64") == 0)
300 if (sigsetjmp(ill_jmp
, 1) == 0) {
301 OPENSSL_ppc64_probe();
302 OPENSSL_ppccap_P
|= PPC_FPU64
;
306 * Wanted code detecting POWER6 CPU and setting PPC_FPU64
311 if (sigsetjmp(ill_jmp
, 1) == 0) {
312 OPENSSL_altivec_probe();
313 OPENSSL_ppccap_P
|= PPC_ALTIVEC
;
314 if (sigsetjmp(ill_jmp
, 1) == 0) {
315 OPENSSL_crypto207_probe();
316 OPENSSL_ppccap_P
|= PPC_CRYPTO207
;
320 if (sigsetjmp(ill_jmp
, 1) == 0) {
321 OPENSSL_madd300_probe();
322 OPENSSL_ppccap_P
|= PPC_MADD300
;
325 sigaction(SIGILL
, &ill_oact
, NULL
);
326 sigprocmask(SIG_SETMASK
, &oset
, NULL
);