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git.ipfire.org Git - thirdparty/openssl.git/blob - crypto/ppccap.c
2 * Copyright 2009-2016 The OpenSSL Project Authors. All Rights Reserved.
4 * Licensed under the OpenSSL license (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
16 #if defined(__linux) || defined(_AIX)
17 # include <sys/utsname.h>
19 #if defined(_AIX53) /* defined even on post-5.3 */
20 # include <sys/systemcfg.h>
21 # if !defined(__power_set)
22 # define __power_set(a) (_system_configuration.implementation & (a))
25 #include <openssl/crypto.h>
26 #include <openssl/bn.h>
30 unsigned int OPENSSL_ppccap_P
= 0;
32 static sigset_t all_masked
;
34 #ifdef OPENSSL_BN_ASM_MONT
35 int bn_mul_mont(BN_ULONG
*rp
, const BN_ULONG
*ap
, const BN_ULONG
*bp
,
36 const BN_ULONG
*np
, const BN_ULONG
*n0
, int num
)
38 int bn_mul_mont_fpu64(BN_ULONG
*rp
, const BN_ULONG
*ap
,
39 const BN_ULONG
*bp
, const BN_ULONG
*np
,
40 const BN_ULONG
*n0
, int num
);
41 int bn_mul_mont_int(BN_ULONG
*rp
, const BN_ULONG
*ap
, const BN_ULONG
*bp
,
42 const BN_ULONG
*np
, const BN_ULONG
*n0
, int num
);
44 if (sizeof(size_t) == 4) {
45 # if 1 || (defined(__APPLE__) && defined(__MACH__))
46 if (num
>= 8 && (num
& 3) == 0 && (OPENSSL_ppccap_P
& PPC_FPU64
))
47 return bn_mul_mont_fpu64(rp
, ap
, bp
, np
, n0
, num
);
50 * boundary of 32 was experimentally determined on Linux 2.6.22,
51 * might have to be adjusted on AIX...
53 if (num
>= 32 && (num
& 3) == 0 && (OPENSSL_ppccap_P
& PPC_FPU64
)) {
57 sigprocmask(SIG_SETMASK
, &all_masked
, &oset
);
58 ret
= bn_mul_mont_fpu64(rp
, ap
, bp
, np
, n0
, num
);
59 sigprocmask(SIG_SETMASK
, &oset
, NULL
);
64 } else if ((OPENSSL_ppccap_P
& PPC_FPU64
))
66 * this is a "must" on POWER6, but run-time detection is not
69 return bn_mul_mont_fpu64(rp
, ap
, bp
, np
, n0
, num
);
71 return bn_mul_mont_int(rp
, ap
, bp
, np
, n0
, num
);
75 void sha256_block_p8(void *ctx
, const void *inp
, size_t len
);
76 void sha256_block_ppc(void *ctx
, const void *inp
, size_t len
);
77 void sha256_block_data_order(void *ctx
, const void *inp
, size_t len
)
79 OPENSSL_ppccap_P
& PPC_CRYPTO207
? sha256_block_p8(ctx
, inp
, len
) :
80 sha256_block_ppc(ctx
, inp
, len
);
83 void sha512_block_p8(void *ctx
, const void *inp
, size_t len
);
84 void sha512_block_ppc(void *ctx
, const void *inp
, size_t len
);
85 void sha512_block_data_order(void *ctx
, const void *inp
, size_t len
)
87 OPENSSL_ppccap_P
& PPC_CRYPTO207
? sha512_block_p8(ctx
, inp
, len
) :
88 sha512_block_ppc(ctx
, inp
, len
);
91 #ifndef OPENSSL_NO_CHACHA
92 void ChaCha20_ctr32_int(unsigned char *out
, const unsigned char *inp
,
93 size_t len
, const unsigned int key
[8],
94 const unsigned int counter
[4]);
95 void ChaCha20_ctr32_vmx(unsigned char *out
, const unsigned char *inp
,
96 size_t len
, const unsigned int key
[8],
97 const unsigned int counter
[4]);
98 void ChaCha20_ctr32(unsigned char *out
, const unsigned char *inp
,
99 size_t len
, const unsigned int key
[8],
100 const unsigned int counter
[4])
102 OPENSSL_ppccap_P
& PPC_ALTIVEC
103 ? ChaCha20_ctr32_vmx(out
, inp
, len
, key
, counter
)
104 : ChaCha20_ctr32_int(out
, inp
, len
, key
, counter
);
108 #ifndef OPENSSL_NO_POLY1305
109 void poly1305_init_int(void *ctx
, const unsigned char key
[16]);
110 void poly1305_blocks(void *ctx
, const unsigned char *inp
, size_t len
,
111 unsigned int padbit
);
112 void poly1305_emit(void *ctx
, unsigned char mac
[16],
113 const unsigned int nonce
[4]);
114 void poly1305_init_fpu(void *ctx
, const unsigned char key
[16]);
115 void poly1305_blocks_fpu(void *ctx
, const unsigned char *inp
, size_t len
,
116 unsigned int padbit
);
117 void poly1305_emit_fpu(void *ctx
, unsigned char mac
[16],
118 const unsigned int nonce
[4]);
119 int poly1305_init(void *ctx
, const unsigned char key
[16], void *func
[2])
121 if (sizeof(size_t) == 4 && (OPENSSL_ppccap_P
& PPC_FPU
)) {
122 poly1305_init_fpu(ctx
, key
);
123 func
[0] = poly1305_blocks_fpu
;
124 func
[1] = poly1305_emit_fpu
;
126 poly1305_init_int(ctx
, key
);
127 func
[0] = poly1305_blocks
;
128 func
[1] = poly1305_emit
;
134 #ifdef ECP_NISTZ256_ASM
135 void ecp_nistz256_mul_mont(unsigned long res
[4], const unsigned long a
[4],
136 const unsigned long b
[4]);
138 void ecp_nistz256_to_mont(unsigned long res
[4], const unsigned long in
[4]);
139 void ecp_nistz256_to_mont(unsigned long res
[4], const unsigned long in
[4])
141 static const unsigned long RR
[] = { 0x0000000000000003U
,
144 0x00000004fffffffdU
};
146 ecp_nistz256_mul_mont(res
, in
, RR
);
149 void ecp_nistz256_from_mont(unsigned long res
[4], const unsigned long in
[4]);
150 void ecp_nistz256_from_mont(unsigned long res
[4], const unsigned long in
[4])
152 static const unsigned long one
[] = { 1, 0, 0, 0 };
154 ecp_nistz256_mul_mont(res
, in
, one
);
158 static sigjmp_buf ill_jmp
;
159 static void ill_handler(int sig
)
161 siglongjmp(ill_jmp
, sig
);
164 void OPENSSL_fpu_probe(void);
165 void OPENSSL_ppc64_probe(void);
166 void OPENSSL_altivec_probe(void);
167 void OPENSSL_crypto207_probe(void);
168 void OPENSSL_madd300_probe(void);
171 * Use a weak reference to getauxval() so we can use it if it is available
172 * but don't break the build if it is not. Note that this is *link-time*
173 * feature detection, not *run-time*. In other words if we link with
174 * symbol present, it's expected to be present even at run-time.
176 #if defined(__GNUC__) && __GNUC__>=2 && defined(__ELF__)
177 extern unsigned long getauxval(unsigned long type
) __attribute__ ((weak
));
179 static unsigned long (*getauxval
) (unsigned long) = NULL
;
182 /* I wish <sys/auxv.h> was universally available */
183 #define HWCAP 16 /* AT_HWCAP */
184 #define HWCAP_PPC64 (1U << 30)
185 #define HWCAP_ALTIVEC (1U << 28)
186 #define HWCAP_FPU (1U << 27)
187 #define HWCAP_POWER6_EXT (1U << 9)
188 #define HWCAP_VSX (1U << 7)
190 #define HWCAP2 26 /* AT_HWCAP2 */
191 #define HWCAP_VEC_CRYPTO (1U << 25)
192 #define HWCAP_ARCH_3_00 (1U << 23)
194 # if defined(__GNUC__) && __GNUC__>=2
195 __attribute__ ((constructor
))
197 void OPENSSL_cpuid_setup(void)
200 struct sigaction ill_oact
, ill_act
;
202 static int trigger
= 0;
208 if ((e
= getenv("OPENSSL_ppccap"))) {
209 OPENSSL_ppccap_P
= strtoul(e
, NULL
, 0);
213 OPENSSL_ppccap_P
= 0;
216 OPENSSL_ppccap_P
|= PPC_FPU
;
218 if (sizeof(size_t) == 4) {
220 # if defined(_SC_AIX_KERNEL_BITMODE)
221 if (sysconf(_SC_AIX_KERNEL_BITMODE
) != 64)
224 if (uname(&uts
) != 0 || atoi(uts
.version
) < 6)
228 # if defined(__power_set)
230 * Value used in __power_set is a single-bit 1<<n one denoting
231 * specific processor class. Incidentally 0xffffffff<<n can be
232 * used to denote specific processor and its successors.
234 if (sizeof(size_t) == 4) {
235 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
236 if (__power_set(0xffffffffU
<<13)) /* POWER5 and later */
237 OPENSSL_ppccap_P
|= PPC_FPU64
;
239 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
240 if (__power_set(0x1U
<<14)) /* POWER6 */
241 OPENSSL_ppccap_P
|= PPC_FPU64
;
244 if (__power_set(0xffffffffU
<<14)) /* POWER6 and later */
245 OPENSSL_ppccap_P
|= PPC_ALTIVEC
;
247 if (__power_set(0xffffffffU
<<16)) /* POWER8 and later */
248 OPENSSL_ppccap_P
|= PPC_CRYPTO207
;
250 if (__power_set(0xffffffffU
<<17)) /* POWER9 and later */
251 OPENSSL_ppccap_P
|= PPC_MADD300
;
257 if (getauxval
!= NULL
) {
258 unsigned long hwcap
= getauxval(HWCAP
);
260 if (hwcap
& HWCAP_FPU
) {
261 OPENSSL_ppccap_P
|= PPC_FPU
;
263 if (sizeof(size_t) == 4) {
264 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
265 if (hwcap
& HWCAP_PPC64
)
266 OPENSSL_ppccap_P
|= PPC_FPU64
;
268 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
269 if (hwcap
& HWCAP_POWER6_EXT
)
270 OPENSSL_ppccap_P
|= PPC_FPU64
;
274 if (hwcap
& HWCAP_ALTIVEC
) {
275 OPENSSL_ppccap_P
|= PPC_ALTIVEC
;
277 if ((hwcap
& HWCAP_VSX
) && (getauxval(HWCAP2
) & HWCAP_VEC_CRYPTO
))
278 OPENSSL_ppccap_P
|= PPC_CRYPTO207
;
281 if (hwcap
& HWCAP_ARCH_3_00
) {
282 OPENSSL_ppccap_P
|= PPC_MADD300
;
288 sigfillset(&all_masked
);
289 sigdelset(&all_masked
, SIGILL
);
290 sigdelset(&all_masked
, SIGTRAP
);
292 sigdelset(&all_masked
, SIGEMT
);
294 sigdelset(&all_masked
, SIGFPE
);
295 sigdelset(&all_masked
, SIGBUS
);
296 sigdelset(&all_masked
, SIGSEGV
);
298 memset(&ill_act
, 0, sizeof(ill_act
));
299 ill_act
.sa_handler
= ill_handler
;
300 ill_act
.sa_mask
= all_masked
;
302 sigprocmask(SIG_SETMASK
, &ill_act
.sa_mask
, &oset
);
303 sigaction(SIGILL
, &ill_act
, &ill_oact
);
305 if (sigsetjmp(ill_jmp
,1) == 0) {
307 OPENSSL_ppccap_P
|= PPC_FPU
;
309 if (sizeof(size_t) == 4) {
312 if (uname(&uts
) == 0 && strcmp(uts
.machine
, "ppc64") == 0)
314 if (sigsetjmp(ill_jmp
, 1) == 0) {
315 OPENSSL_ppc64_probe();
316 OPENSSL_ppccap_P
|= PPC_FPU64
;
320 * Wanted code detecting POWER6 CPU and setting PPC_FPU64
325 if (sigsetjmp(ill_jmp
, 1) == 0) {
326 OPENSSL_altivec_probe();
327 OPENSSL_ppccap_P
|= PPC_ALTIVEC
;
328 if (sigsetjmp(ill_jmp
, 1) == 0) {
329 OPENSSL_crypto207_probe();
330 OPENSSL_ppccap_P
|= PPC_CRYPTO207
;
334 if (sigsetjmp(ill_jmp
, 1) == 0) {
335 OPENSSL_madd300_probe();
336 OPENSSL_ppccap_P
|= PPC_MADD300
;
339 sigaction(SIGILL
, &ill_oact
, NULL
);
340 sigprocmask(SIG_SETMASK
, &oset
, NULL
);