drivers/block/ahci.c

   1 /*
   2  * Copyright (C) Freescale Semiconductor, Inc. 2006.
   3  * Author: Jason Jin<Jason.jin@freescale.com>
   4  *         Zhang Wei<wei.zhang@freescale.com>
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  *
  24  * with the reference on libata and ahci drvier in kernel
  25  *
  26  */
  27 #include <common.h>
  28
  29 #include <command.h>
  30 #include <pci.h>
  31 #include <asm/processor.h>
  32 #include <asm/errno.h>
  33 #include <asm/io.h>
  34 #include <malloc.h>
  35 #include <scsi.h>
  36 #include <ata.h>
  37 #include <linux/ctype.h>
  38 #include <ahci.h>
  39
  40 struct ahci_probe_ent *probe_ent = NULL;
  41 hd_driveid_t *ataid[AHCI_MAX_PORTS];
  42
  43 #define writel_with_flush(a,b)  do { writel(a,b); readl(b); } while (0)
  44
  45
  46 static inline u32 ahci_port_base(u32 base, u32 port)
  47 {
  48         return base + 0x100 + (port * 0x80);
  49 }
  50
  51
  52 static void ahci_setup_port(struct ahci_ioports *port, unsigned long base,
  53                             unsigned int port_idx)
  54 {
  55         base = ahci_port_base(base, port_idx);
  56
  57         port->cmd_addr = base;
  58         port->scr_addr = base + PORT_SCR;
  59 }
  60
  61
  62 #define msleep(a) udelay(a * 1000)
  63 #define ssleep(a) msleep(a * 1000)
  64
  65 static int waiting_for_cmd_completed(volatile u8 *offset,
  66                                      int timeout_msec,
  67                                      u32 sign)
  68 {
  69         int i;
  70         u32 status;
  71
  72         for (i = 0; ((status = readl(offset)) & sign) && i < timeout_msec; i++)
  73                 msleep(1);
  74
  75         return (i < timeout_msec) ? 0 : -1;
  76 }
  77
  78
  79 static int ahci_host_init(struct ahci_probe_ent *probe_ent)
  80 {
  81 #ifndef CONFIG_SCSI_AHCI_PLAT
  82         pci_dev_t pdev = probe_ent->dev;
  83         u16 tmp16;
  84         unsigned short vendor;
  85 #endif
  86         volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base;
  87         u32 tmp, cap_save;
  88         int i, j;
  89         volatile u8 *port_mmio;
  90
  91         cap_save = readl(mmio + HOST_CAP);
  92         cap_save &= ((1 << 28) | (1 << 17));
  93         cap_save |= (1 << 27);
  94
  95         /* global controller reset */
  96         tmp = readl(mmio + HOST_CTL);
  97         if ((tmp & HOST_RESET) == 0)
  98                 writel_with_flush(tmp | HOST_RESET, mmio + HOST_CTL);
  99
 100         /* reset must complete within 1 second, or
 101          * the hardware should be considered fried.
 102          */
 103         ssleep(1);
 104
 105         tmp = readl(mmio + HOST_CTL);
 106         if (tmp & HOST_RESET) {
 107                 debug("controller reset failed (0x%x)\n", tmp);
 108                 return -1;
 109         }
 110
 111         writel_with_flush(HOST_AHCI_EN, mmio + HOST_CTL);
 112         writel(cap_save, mmio + HOST_CAP);
 113         writel_with_flush(0xf, mmio + HOST_PORTS_IMPL);
 114
 115 #ifndef CONFIG_SCSI_AHCI_PLAT
 116         pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
 117
 118         if (vendor == PCI_VENDOR_ID_INTEL) {
 119                 u16 tmp16;
 120                 pci_read_config_word(pdev, 0x92, &tmp16);
 121                 tmp16 |= 0xf;
 122                 pci_write_config_word(pdev, 0x92, tmp16);
 123         }
 124 #endif
 125         probe_ent->cap = readl(mmio + HOST_CAP);
 126         probe_ent->port_map = readl(mmio + HOST_PORTS_IMPL);
 127         probe_ent->n_ports = (probe_ent->cap & 0x1f) + 1;
 128
 129         debug("cap 0x%x  port_map 0x%x  n_ports %d\n",
 130               probe_ent->cap, probe_ent->port_map, probe_ent->n_ports);
 131
 132         for (i = 0; i < probe_ent->n_ports; i++) {
 133                 probe_ent->port[i].port_mmio = ahci_port_base((u32) mmio, i);
 134                 port_mmio = (u8 *) probe_ent->port[i].port_mmio;
 135                 ahci_setup_port(&probe_ent->port[i], (unsigned long)mmio, i);
 136
 137                 /* make sure port is not active */
 138                 tmp = readl(port_mmio + PORT_CMD);
 139                 if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
 140                            PORT_CMD_FIS_RX | PORT_CMD_START)) {
 141                         tmp &= ~(PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
 142                                  PORT_CMD_FIS_RX | PORT_CMD_START);
 143                         writel_with_flush(tmp, port_mmio + PORT_CMD);
 144
 145                         /* spec says 500 msecs for each bit, so
 146                          * this is slightly incorrect.
 147                          */
 148                         msleep(500);
 149                 }
 150
 151                 writel(PORT_CMD_SPIN_UP, port_mmio + PORT_CMD);
 152
 153                 j = 0;
 154                 while (j < 100) {
 155                         msleep(10);
 156                         tmp = readl(port_mmio + PORT_SCR_STAT);
 157                         if ((tmp & 0xf) == 0x3)
 158                                 break;
 159                         j++;
 160                 }
 161
 162                 tmp = readl(port_mmio + PORT_SCR_ERR);
 163                 debug("PORT_SCR_ERR 0x%x\n", tmp);
 164                 writel(tmp, port_mmio + PORT_SCR_ERR);
 165
 166                 /* ack any pending irq events for this port */
 167                 tmp = readl(port_mmio + PORT_IRQ_STAT);
 168                 debug("PORT_IRQ_STAT 0x%x\n", tmp);
 169                 if (tmp)
 170                         writel(tmp, port_mmio + PORT_IRQ_STAT);
 171
 172                 writel(1 << i, mmio + HOST_IRQ_STAT);
 173
 174                 /* set irq mask (enables interrupts) */
 175                 writel(DEF_PORT_IRQ, port_mmio + PORT_IRQ_MASK);
 176
 177                 /*register linkup ports */
 178                 tmp = readl(port_mmio + PORT_SCR_STAT);
 179                 debug("Port %d status: 0x%x\n", i, tmp);
 180                 if ((tmp & 0xf) == 0x03)
 181                         probe_ent->link_port_map |= (0x01 << i);
 182         }
 183
 184         tmp = readl(mmio + HOST_CTL);
 185         debug("HOST_CTL 0x%x\n", tmp);
 186         writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
 187         tmp = readl(mmio + HOST_CTL);
 188         debug("HOST_CTL 0x%x\n", tmp);
 189 #ifndef CONFIG_SCSI_AHCI_PLAT
 190         pci_read_config_word(pdev, PCI_COMMAND, &tmp16);
 191         tmp |= PCI_COMMAND_MASTER;
 192         pci_write_config_word(pdev, PCI_COMMAND, tmp16);
 193 #endif
 194         return 0;
 195 }
 196
 197
 198 static void ahci_print_info(struct ahci_probe_ent *probe_ent)
 199 {
 200 #ifndef CONFIG_SCSI_AHCI_PLAT
 201         pci_dev_t pdev = probe_ent->dev;
 202         u16 cc;
 203 #endif
 204         volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base;
 205         u32 vers, cap, impl, speed;
 206         const char *speed_s;
 207         const char *scc_s;
 208
 209         vers = readl(mmio + HOST_VERSION);
 210         cap = probe_ent->cap;
 211         impl = probe_ent->port_map;
 212
 213         speed = (cap >> 20) & 0xf;
 214         if (speed == 1)
 215                 speed_s = "1.5";
 216         else if (speed == 2)
 217                 speed_s = "3";
 218         else
 219                 speed_s = "?";
 220
 221 #ifdef CONFIG_SCSI_AHCI_PLAT
 222         scc_s = "SATA";
 223 #else
 224         pci_read_config_word(pdev, 0x0a, &cc);
 225         if (cc == 0x0101)
 226                 scc_s = "IDE";
 227         else if (cc == 0x0106)
 228                 scc_s = "SATA";
 229         else if (cc == 0x0104)
 230                 scc_s = "RAID";
 231         else
 232                 scc_s = "unknown";
 233 #endif
 234         printf("AHCI %02x%02x.%02x%02x "
 235                "%u slots %u ports %s Gbps 0x%x impl %s mode\n",
 236                (vers >> 24) & 0xff,
 237                (vers >> 16) & 0xff,
 238                (vers >> 8) & 0xff,
 239                vers & 0xff,
 240                ((cap >> 8) & 0x1f) + 1, (cap & 0x1f) + 1, speed_s, impl, scc_s);
 241
 242         printf("flags: "
 243                "%s%s%s%s%s%s"
 244                "%s%s%s%s%s%s%s\n",
 245                cap & (1 << 31) ? "64bit " : "",
 246                cap & (1 << 30) ? "ncq " : "",
 247                cap & (1 << 28) ? "ilck " : "",
 248                cap & (1 << 27) ? "stag " : "",
 249                cap & (1 << 26) ? "pm " : "",
 250                cap & (1 << 25) ? "led " : "",
 251                cap & (1 << 24) ? "clo " : "",
 252                cap & (1 << 19) ? "nz " : "",
 253                cap & (1 << 18) ? "only " : "",
 254                cap & (1 << 17) ? "pmp " : "",
 255                cap & (1 << 15) ? "pio " : "",
 256                cap & (1 << 14) ? "slum " : "",
 257                cap & (1 << 13) ? "part " : "");
 258 }
 259
 260 #ifndef CONFIG_SCSI_AHCI_PLAT
 261 static int ahci_init_one(pci_dev_t pdev)
 262 {
 263         u16 vendor;
 264         int rc;
 265
 266         memset((void *)ataid, 0, sizeof(hd_driveid_t *) * AHCI_MAX_PORTS);
 267
 268         probe_ent = malloc(sizeof(struct ahci_probe_ent));
 269         memset(probe_ent, 0, sizeof(struct ahci_probe_ent));
 270         probe_ent->dev = pdev;
 271
 272         probe_ent->host_flags = ATA_FLAG_SATA
 273                                 | ATA_FLAG_NO_LEGACY
 274                                 | ATA_FLAG_MMIO
 275                                 | ATA_FLAG_PIO_DMA
 276                                 | ATA_FLAG_NO_ATAPI;
 277         probe_ent->pio_mask = 0x1f;
 278         probe_ent->udma_mask = 0x7f;    /*Fixme,assume to support UDMA6 */
 279
 280         probe_ent->mmio_base = (u32)pci_map_bar(pdev, AHCI_PCI_BAR,
 281                                                 PCI_REGION_MEM);
 282
 283         /* Take from kernel:
 284          * JMicron-specific fixup:
 285          * make sure we're in AHCI mode
 286          */
 287         pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
 288         if (vendor == 0x197b)
 289                 pci_write_config_byte(pdev, 0x41, 0xa1);
 290
 291         /* initialize adapter */
 292         rc = ahci_host_init(probe_ent);
 293         if (rc)
 294                 goto err_out;
 295
 296         ahci_print_info(probe_ent);
 297
 298         return 0;
 299
 300       err_out:
 301         return rc;
 302 }
 303 #endif
 304
 305 #define MAX_DATA_BYTE_COUNT  (4*1024*1024)
 306
 307 static int ahci_fill_sg(u8 port, unsigned char *buf, int buf_len)
 308 {
 309         struct ahci_ioports *pp = &(probe_ent->port[port]);
 310         struct ahci_sg *ahci_sg = pp->cmd_tbl_sg;
 311         u32 sg_count;
 312         int i;
 313
 314         sg_count = ((buf_len - 1) / MAX_DATA_BYTE_COUNT) + 1;
 315         if (sg_count > AHCI_MAX_SG) {
 316                 printf("Error:Too much sg!\n");
 317                 return -1;
 318         }
 319
 320         for (i = 0; i < sg_count; i++) {
 321                 ahci_sg->addr =
 322                     cpu_to_le32((u32) buf + i * MAX_DATA_BYTE_COUNT);
 323                 ahci_sg->addr_hi = 0;
 324                 ahci_sg->flags_size = cpu_to_le32(0x3fffff &
 325                                           (buf_len < MAX_DATA_BYTE_COUNT
 326                                            ? (buf_len - 1)
 327                                            : (MAX_DATA_BYTE_COUNT - 1)));
 328                 ahci_sg++;
 329                 buf_len -= MAX_DATA_BYTE_COUNT;
 330         }
 331
 332         return sg_count;
 333 }
 334
 335
 336 static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 opts)
 337 {
 338         pp->cmd_slot->opts = cpu_to_le32(opts);
 339         pp->cmd_slot->status = 0;
 340         pp->cmd_slot->tbl_addr = cpu_to_le32(pp->cmd_tbl & 0xffffffff);
 341         pp->cmd_slot->tbl_addr_hi = 0;
 342 }
 343
 344
 345 static void ahci_set_feature(u8 port)
 346 {
 347         struct ahci_ioports *pp = &(probe_ent->port[port]);
 348         volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
 349         u32 cmd_fis_len = 5;    /* five dwords */
 350         u8 fis[20];
 351
 352         /*set feature */
 353         memset(fis, 0, 20);
 354         fis[0] = 0x27;
 355         fis[1] = 1 << 7;
 356         fis[2] = ATA_CMD_SETF;
 357         fis[3] = SETFEATURES_XFER;
 358         fis[12] = __ilog2(probe_ent->udma_mask + 1) + 0x40 - 0x01;
 359
 360         memcpy((unsigned char *)pp->cmd_tbl, fis, 20);
 361         ahci_fill_cmd_slot(pp, cmd_fis_len);
 362         writel(1, port_mmio + PORT_CMD_ISSUE);
 363         readl(port_mmio + PORT_CMD_ISSUE);
 364
 365         if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
 366                 printf("set feature error!\n");
 367         }
 368 }
 369
 370
 371 static int ahci_port_start(u8 port)
 372 {
 373         struct ahci_ioports *pp = &(probe_ent->port[port]);
 374         volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
 375         u32 port_status;
 376         u32 mem;
 377
 378         debug("Enter start port: %d\n", port);
 379         port_status = readl(port_mmio + PORT_SCR_STAT);
 380         debug("Port %d status: %x\n", port, port_status);
 381         if ((port_status & 0xf) != 0x03) {
 382                 printf("No Link on this port!\n");
 383                 return -1;
 384         }
 385
 386         mem = (u32) malloc(AHCI_PORT_PRIV_DMA_SZ + 2048);
 387         if (!mem) {
 388                 free(pp);
 389                 printf("No mem for table!\n");
 390                 return -ENOMEM;
 391         }
 392
 393         mem = (mem + 0x800) & (~0x7ff); /* Aligned to 2048-bytes */
 394         memset((u8 *) mem, 0, AHCI_PORT_PRIV_DMA_SZ);
 395
 396         /*
 397          * First item in chunk of DMA memory: 32-slot command table,
 398          * 32 bytes each in size
 399          */
 400         pp->cmd_slot = (struct ahci_cmd_hdr *)mem;
 401         debug("cmd_slot = 0x%x\n", pp->cmd_slot);
 402         mem += (AHCI_CMD_SLOT_SZ + 224);
 403
 404         /*
 405          * Second item: Received-FIS area
 406          */
 407         pp->rx_fis = mem;
 408         mem += AHCI_RX_FIS_SZ;
 409
 410         /*
 411          * Third item: data area for storing a single command
 412          * and its scatter-gather table
 413          */
 414         pp->cmd_tbl = mem;
 415         debug("cmd_tbl_dma = 0x%x\n", pp->cmd_tbl);
 416
 417         mem += AHCI_CMD_TBL_HDR;
 418         pp->cmd_tbl_sg = (struct ahci_sg *)mem;
 419
 420         writel_with_flush((u32) pp->cmd_slot, port_mmio + PORT_LST_ADDR);
 421
 422         writel_with_flush(pp->rx_fis, port_mmio + PORT_FIS_ADDR);
 423
 424         writel_with_flush(PORT_CMD_ICC_ACTIVE | PORT_CMD_FIS_RX |
 425                           PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP |
 426                           PORT_CMD_START, port_mmio + PORT_CMD);
 427
 428         debug("Exit start port %d\n", port);
 429
 430         return 0;
 431 }
 432
 433
 434 static int get_ahci_device_data(u8 port, u8 *fis, int fis_len, u8 *buf,
 435                                 int buf_len)
 436 {
 437
 438         struct ahci_ioports *pp = &(probe_ent->port[port]);
 439         volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
 440         u32 opts;
 441         u32 port_status;
 442         int sg_count;
 443
 444         debug("Enter get_ahci_device_data: for port %d\n", port);
 445
 446         if (port > probe_ent->n_ports) {
 447                 printf("Invaild port number %d\n", port);
 448                 return -1;
 449         }
 450
 451         port_status = readl(port_mmio + PORT_SCR_STAT);
 452         if ((port_status & 0xf) != 0x03) {
 453                 debug("No Link on port %d!\n", port);
 454                 return -1;
 455         }
 456
 457         memcpy((unsigned char *)pp->cmd_tbl, fis, fis_len);
 458
 459         sg_count = ahci_fill_sg(port, buf, buf_len);
 460         opts = (fis_len >> 2) | (sg_count << 16);
 461         ahci_fill_cmd_slot(pp, opts);
 462
 463         writel_with_flush(1, port_mmio + PORT_CMD_ISSUE);
 464
 465         if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
 466                 printf("timeout exit!\n");
 467                 return -1;
 468         }
 469         debug("get_ahci_device_data: %d byte transferred.\n",
 470               pp->cmd_slot->status);
 471
 472         return 0;
 473 }
 474
 475
 476 static char *ata_id_strcpy(u16 *target, u16 *src, int len)
 477 {
 478         int i;
 479         for (i = 0; i < len / 2; i++)
 480                 target[i] = swab16(src[i]);
 481         return (char *)target;
 482 }
 483
 484
 485 static void dump_ataid(hd_driveid_t *ataid)
 486 {
 487         debug("(49)ataid->capability = 0x%x\n", ataid->capability);
 488         debug("(53)ataid->field_valid =0x%x\n", ataid->field_valid);
 489         debug("(63)ataid->dma_mword = 0x%x\n", ataid->dma_mword);
 490         debug("(64)ataid->eide_pio_modes = 0x%x\n", ataid->eide_pio_modes);
 491         debug("(75)ataid->queue_depth = 0x%x\n", ataid->queue_depth);
 492         debug("(80)ataid->major_rev_num = 0x%x\n", ataid->major_rev_num);
 493         debug("(81)ataid->minor_rev_num = 0x%x\n", ataid->minor_rev_num);
 494         debug("(82)ataid->command_set_1 = 0x%x\n", ataid->command_set_1);
 495         debug("(83)ataid->command_set_2 = 0x%x\n", ataid->command_set_2);
 496         debug("(84)ataid->cfsse = 0x%x\n", ataid->cfsse);
 497         debug("(85)ataid->cfs_enable_1 = 0x%x\n", ataid->cfs_enable_1);
 498         debug("(86)ataid->cfs_enable_2 = 0x%x\n", ataid->cfs_enable_2);
 499         debug("(87)ataid->csf_default = 0x%x\n", ataid->csf_default);
 500         debug("(88)ataid->dma_ultra = 0x%x\n", ataid->dma_ultra);
 501         debug("(93)ataid->hw_config = 0x%x\n", ataid->hw_config);
 502 }
 503
 504
 505 /*
 506  * SCSI INQUIRY command operation.
 507  */
 508 static int ata_scsiop_inquiry(ccb *pccb)
 509 {
 510         u8 hdr[] = {
 511                 0,
 512                 0,
 513                 0x5,            /* claim SPC-3 version compatibility */
 514                 2,
 515                 95 - 4,
 516         };
 517         u8 fis[20];
 518         u8 *tmpid;
 519         u8 port;
 520
 521         /* Clean ccb data buffer */
 522         memset(pccb->pdata, 0, pccb->datalen);
 523
 524         memcpy(pccb->pdata, hdr, sizeof(hdr));
 525
 526         if (pccb->datalen <= 35)
 527                 return 0;
 528
 529         memset(fis, 0, 20);
 530         /* Construct the FIS */
 531         fis[0] = 0x27;          /* Host to device FIS. */
 532         fis[1] = 1 << 7;        /* Command FIS. */
 533         fis[2] = ATA_CMD_IDENT; /* Command byte. */
 534
 535         /* Read id from sata */
 536         port = pccb->target;
 537         if (!(tmpid = malloc(sizeof(hd_driveid_t))))
 538                 return -ENOMEM;
 539
 540         if (get_ahci_device_data(port, (u8 *) & fis, 20,
 541                                  tmpid, sizeof(hd_driveid_t))) {
 542                 debug("scsi_ahci: SCSI inquiry command failure.\n");
 543                 return -EIO;
 544         }
 545
 546         if (ataid[port])
 547                 free(ataid[port]);
 548         ataid[port] = (hd_driveid_t *) tmpid;
 549
 550         memcpy(&pccb->pdata[8], "ATA     ", 8);
 551         ata_id_strcpy((u16 *) &pccb->pdata[16], (u16 *)ataid[port]->model, 16);
 552         ata_id_strcpy((u16 *) &pccb->pdata[32], (u16 *)ataid[port]->fw_rev, 4);
 553
 554         dump_ataid(ataid[port]);
 555         return 0;
 556 }
 557
 558
 559 /*
 560  * SCSI READ10 command operation.
 561  */
 562 static int ata_scsiop_read10(ccb * pccb)
 563 {
 564         u64 lba = 0;
 565         u32 len = 0;
 566         u8 fis[20];
 567
 568         lba = (((u64) pccb->cmd[2]) << 24) | (((u64) pccb->cmd[3]) << 16)
 569             | (((u64) pccb->cmd[4]) << 8) | ((u64) pccb->cmd[5]);
 570         len = (((u32) pccb->cmd[7]) << 8) | ((u32) pccb->cmd[8]);
 571
 572         /* For 10-byte and 16-byte SCSI R/W commands, transfer
 573          * length 0 means transfer 0 block of data.
 574          * However, for ATA R/W commands, sector count 0 means
 575          * 256 or 65536 sectors, not 0 sectors as in SCSI.
 576          *
 577          * WARNING: one or two older ATA drives treat 0 as 0...
 578          */
 579         if (!len)
 580                 return 0;
 581         memset(fis, 0, 20);
 582
 583         /* Construct the FIS */
 584         fis[0] = 0x27;          /* Host to device FIS. */
 585         fis[1] = 1 << 7;        /* Command FIS. */
 586         fis[2] = ATA_CMD_RD_DMA;        /* Command byte. */
 587
 588         /* LBA address, only support LBA28 in this driver */
 589         fis[4] = pccb->cmd[5];
 590         fis[5] = pccb->cmd[4];
 591         fis[6] = pccb->cmd[3];
 592         fis[7] = (pccb->cmd[2] & 0x0f) | 0xe0;
 593
 594         /* Sector Count */
 595         fis[12] = pccb->cmd[8];
 596         fis[13] = pccb->cmd[7];
 597
 598         /* Read from ahci */
 599         if (get_ahci_device_data(pccb->target, (u8 *) & fis, 20,
 600                                  pccb->pdata, pccb->datalen)) {
 601                 debug("scsi_ahci: SCSI READ10 command failure.\n");
 602                 return -EIO;
 603         }
 604
 605         return 0;
 606 }
 607
 608
 609 /*
 610  * SCSI READ CAPACITY10 command operation.
 611  */
 612 static int ata_scsiop_read_capacity10(ccb *pccb)
 613 {
 614         u32 cap;
 615
 616         if (!ataid[pccb->target]) {
 617                 printf("scsi_ahci: SCSI READ CAPACITY10 command failure. "
 618                        "\tNo ATA info!\n"
 619                        "\tPlease run SCSI commmand INQUIRY firstly!\n");
 620                 return -EPERM;
 621         }
 622
 623         cap = le32_to_cpu(ataid[pccb->target]->lba_capacity);
 624         memcpy(pccb->pdata, &cap, sizeof(cap));
 625
 626         pccb->pdata[4] = pccb->pdata[5] = 0;
 627         pccb->pdata[6] = 512 >> 8;
 628         pccb->pdata[7] = 512 & 0xff;
 629
 630         return 0;
 631 }
 632
 633
 634 /*
 635  * SCSI TEST UNIT READY command operation.
 636  */
 637 static int ata_scsiop_test_unit_ready(ccb *pccb)
 638 {
 639         return (ataid[pccb->target]) ? 0 : -EPERM;
 640 }
 641
 642
 643 int scsi_exec(ccb *pccb)
 644 {
 645         int ret;
 646
 647         switch (pccb->cmd[0]) {
 648         case SCSI_READ10:
 649                 ret = ata_scsiop_read10(pccb);
 650                 break;
 651         case SCSI_RD_CAPAC:
 652                 ret = ata_scsiop_read_capacity10(pccb);
 653                 break;
 654         case SCSI_TST_U_RDY:
 655                 ret = ata_scsiop_test_unit_ready(pccb);
 656                 break;
 657         case SCSI_INQUIRY:
 658                 ret = ata_scsiop_inquiry(pccb);
 659                 break;
 660         default:
 661                 printf("Unsupport SCSI command 0x%02x\n", pccb->cmd[0]);
 662                 return FALSE;
 663         }
 664
 665         if (ret) {
 666                 debug("SCSI command 0x%02x ret errno %d\n", pccb->cmd[0], ret);
 667                 return FALSE;
 668         }
 669         return TRUE;
 670
 671 }
 672
 673
 674 void scsi_low_level_init(int busdevfunc)
 675 {
 676         int i;
 677         u32 linkmap;
 678
 679 #ifndef CONFIG_SCSI_AHCI_PLAT
 680         ahci_init_one(busdevfunc);
 681 #endif
 682
 683         linkmap = probe_ent->link_port_map;
 684
 685         for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
 686                 if (((linkmap >> i) & 0x01)) {
 687                         if (ahci_port_start((u8) i)) {
 688                                 printf("Can not start port %d\n", i);
 689                                 continue;
 690                         }
 691                         ahci_set_feature((u8) i);
 692                 }
 693         }
 694 }
 695
 696 #ifdef CONFIG_SCSI_AHCI_PLAT
 697 int ahci_init(u32 base)
 698 {
 699         int i, rc = 0;
 700         u32 linkmap;
 701
 702         memset(ataid, 0, sizeof(ataid));
 703
 704         probe_ent = malloc(sizeof(struct ahci_probe_ent));
 705         memset(probe_ent, 0, sizeof(struct ahci_probe_ent));
 706
 707         probe_ent->host_flags = ATA_FLAG_SATA
 708                                 | ATA_FLAG_NO_LEGACY
 709                                 | ATA_FLAG_MMIO
 710                                 | ATA_FLAG_PIO_DMA
 711                                 | ATA_FLAG_NO_ATAPI;
 712         probe_ent->pio_mask = 0x1f;
 713         probe_ent->udma_mask = 0x7f;    /*Fixme,assume to support UDMA6 */
 714
 715         probe_ent->mmio_base = base;
 716
 717         /* initialize adapter */
 718         rc = ahci_host_init(probe_ent);
 719         if (rc)
 720                 goto err_out;
 721
 722         ahci_print_info(probe_ent);
 723
 724         linkmap = probe_ent->link_port_map;
 725
 726         for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
 727                 if (((linkmap >> i) & 0x01)) {
 728                         if (ahci_port_start((u8) i)) {
 729                                 printf("Can not start port %d\n", i);
 730                                 continue;
 731                         }
 732                         ahci_set_feature((u8) i);
 733                 }
 734         }
 735 err_out:
 736         return rc;
 737 }
 738 #endif
 739
 740 void scsi_bus_reset(void)
 741 {
 742         /*Not implement*/
 743 }
 744
 745
 746 void scsi_print_error(ccb * pccb)
 747 {
 748         /*The ahci error info can be read in the ahci driver*/
 749 }