2 * Driver for the i2c controller on the Marvell line of host bridges
3 * (e.g, gt642[46]0, mv643[46]0, mv644[46]0, Orion SoC family),
7 * Author: Mark A. Greer <mgreer@mvista.com>
8 * 2005 (c) MontaVista, Software, Inc.
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
28 * ported from Linux to u-boot
30 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
34 #include <asm/arch/kirkwood.h>
35 #include <asm/errno.h>
38 DECLARE_GLOBAL_DATA_PTR
;
40 static unsigned int i2c_bus_num
__attribute__ ((section (".data"))) = 0;
41 #if defined(CONFIG_I2C_MUX)
42 static unsigned int i2c_bus_num_mux
__attribute__ ((section ("data"))) = 0;
45 /* Register defines */
46 #define KW_I2C_REG_SLAVE_ADDR 0x00
47 #define KW_I2C_REG_DATA 0x04
48 #define KW_I2C_REG_CONTROL 0x08
49 #define KW_I2C_REG_STATUS 0x0c
50 #define KW_I2C_REG_BAUD 0x0c
51 #define KW_I2C_REG_EXT_SLAVE_ADDR 0x10
52 #define KW_I2C_REG_SOFT_RESET 0x1c
54 #define KW_I2C_REG_CONTROL_ACK 0x00000004
55 #define KW_I2C_REG_CONTROL_IFLG 0x00000008
56 #define KW_I2C_REG_CONTROL_STOP 0x00000010
57 #define KW_I2C_REG_CONTROL_START 0x00000020
58 #define KW_I2C_REG_CONTROL_TWSIEN 0x00000040
59 #define KW_I2C_REG_CONTROL_INTEN 0x00000080
61 /* Ctlr status values */
62 #define KW_I2C_STATUS_BUS_ERR 0x00
63 #define KW_I2C_STATUS_MAST_START 0x08
64 #define KW_I2C_STATUS_MAST_REPEAT_START 0x10
65 #define KW_I2C_STATUS_MAST_WR_ADDR_ACK 0x18
66 #define KW_I2C_STATUS_MAST_WR_ADDR_NO_ACK 0x20
67 #define KW_I2C_STATUS_MAST_WR_ACK 0x28
68 #define KW_I2C_STATUS_MAST_WR_NO_ACK 0x30
69 #define KW_I2C_STATUS_MAST_LOST_ARB 0x38
70 #define KW_I2C_STATUS_MAST_RD_ADDR_ACK 0x40
71 #define KW_I2C_STATUS_MAST_RD_ADDR_NO_ACK 0x48
72 #define KW_I2C_STATUS_MAST_RD_DATA_ACK 0x50
73 #define KW_I2C_STATUS_MAST_RD_DATA_NO_ACK 0x58
74 #define KW_I2C_STATUS_MAST_WR_ADDR_2_ACK 0xd0
75 #define KW_I2C_STATUS_MAST_WR_ADDR_2_NO_ACK 0xd8
76 #define KW_I2C_STATUS_MAST_RD_ADDR_2_ACK 0xe0
77 #define KW_I2C_STATUS_MAST_RD_ADDR_2_NO_ACK 0xe8
78 #define KW_I2C_STATUS_NO_STATUS 0xf8
84 KW_I2C_STATE_WAITING_FOR_START_COND
,
85 KW_I2C_STATE_WAITING_FOR_ADDR_1_ACK
,
86 KW_I2C_STATE_WAITING_FOR_ADDR_2_ACK
,
87 KW_I2C_STATE_WAITING_FOR_SLAVE_ACK
,
88 KW_I2C_STATE_WAITING_FOR_SLAVE_DATA
,
93 KW_I2C_ACTION_INVALID
,
94 KW_I2C_ACTION_CONTINUE
,
95 KW_I2C_ACTION_SEND_START
,
96 KW_I2C_ACTION_SEND_ADDR_1
,
97 KW_I2C_ACTION_SEND_ADDR_2
,
98 KW_I2C_ACTION_SEND_DATA
,
99 KW_I2C_ACTION_RCV_DATA
,
100 KW_I2C_ACTION_RCV_DATA_STOP
,
101 KW_I2C_ACTION_SEND_STOP
,
104 /* defines to get compatible with Linux driver */
106 #define IRQ_HANDLED 0x01
108 #define I2C_M_TEN 0x01
109 #define I2C_M_RD 0x02
110 #define I2C_M_REV_DIR_ADDR 0x04;
119 struct kirkwood_i2c_data
{
139 static struct kirkwood_i2c_data __drv_data
__attribute__ ((section (".data")));
140 static struct kirkwood_i2c_data
*drv_data
= &__drv_data
;
141 static struct i2c_msg __i2c_msg
__attribute__ ((section (".data")));
142 static struct i2c_msg
*kirkwood_i2c_msg
= &__i2c_msg
;
145 *****************************************************************************
147 * Finite State Machine & Interrupt Routines
149 *****************************************************************************
152 static inline int abs(int n
)
160 static void kirkwood_calculate_speed(int speed
)
164 int best_diff
= CONFIG_SYS_TCLK
;
167 int tmp
[8] = {2, 4, 8, 16, 32, 64, 128, 256};
169 for (n
= 0; n
< 8; n
++) {
170 for (m
= 0; m
< 16; m
++) {
171 calcspeed
= CONFIG_SYS_TCLK
/ (10 * (m
+ 1) * tmp
[n
]);
172 diff
= abs((speed
- calcspeed
));
173 if ( diff
< best_diff
) {
175 best_speed
= calcspeed
;
176 drv_data
->freq_m
= m
;
177 drv_data
->freq_n
= n
;
183 /* Reset hardware and initialize FSM */
185 kirkwood_i2c_hw_init(int speed
, int slaveadd
)
187 drv_data
->state
= KW_I2C_STATE_IDLE
;
189 kirkwood_calculate_speed(speed
);
190 writel(0, CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_SOFT_RESET
);
191 writel((((drv_data
->freq_m
& 0xf) << 3) | (drv_data
->freq_n
& 0x7)),
192 CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_BAUD
);
193 writel(slaveadd
, CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_SLAVE_ADDR
);
194 writel(0, CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_EXT_SLAVE_ADDR
);
195 writel(KW_I2C_REG_CONTROL_TWSIEN
| KW_I2C_REG_CONTROL_STOP
,
196 CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_CONTROL
);
200 kirkwood_i2c_fsm(u32 status
)
203 * If state is idle, then this is likely the remnants of an old
204 * operation that driver has given up on or the user has killed.
205 * If so, issue the stop condition and go to idle.
207 if (drv_data
->state
== KW_I2C_STATE_IDLE
) {
208 drv_data
->action
= KW_I2C_ACTION_SEND_STOP
;
212 /* The status from the ctlr [mostly] tells us what to do next */
214 /* Start condition interrupt */
215 case KW_I2C_STATUS_MAST_START
: /* 0x08 */
216 case KW_I2C_STATUS_MAST_REPEAT_START
: /* 0x10 */
217 drv_data
->action
= KW_I2C_ACTION_SEND_ADDR_1
;
218 drv_data
->state
= KW_I2C_STATE_WAITING_FOR_ADDR_1_ACK
;
221 /* Performing a write */
222 case KW_I2C_STATUS_MAST_WR_ADDR_ACK
: /* 0x18 */
223 if (drv_data
->msg
->flags
& I2C_M_TEN
) {
224 drv_data
->action
= KW_I2C_ACTION_SEND_ADDR_2
;
226 KW_I2C_STATE_WAITING_FOR_ADDR_2_ACK
;
230 case KW_I2C_STATUS_MAST_WR_ADDR_2_ACK
: /* 0xd0 */
231 case KW_I2C_STATUS_MAST_WR_ACK
: /* 0x28 */
232 if ((drv_data
->bytes_left
== 0)
233 || (drv_data
->aborting
234 && (drv_data
->byte_posn
!= 0))) {
235 drv_data
->action
= KW_I2C_ACTION_SEND_STOP
;
236 drv_data
->state
= KW_I2C_STATE_IDLE
;
238 drv_data
->action
= KW_I2C_ACTION_SEND_DATA
;
240 KW_I2C_STATE_WAITING_FOR_SLAVE_ACK
;
241 drv_data
->bytes_left
--;
245 /* Performing a read */
246 case KW_I2C_STATUS_MAST_RD_ADDR_ACK
: /* 40 */
247 if (drv_data
->msg
->flags
& I2C_M_TEN
) {
248 drv_data
->action
= KW_I2C_ACTION_SEND_ADDR_2
;
250 KW_I2C_STATE_WAITING_FOR_ADDR_2_ACK
;
254 case KW_I2C_STATUS_MAST_RD_ADDR_2_ACK
: /* 0xe0 */
255 if (drv_data
->bytes_left
== 0) {
256 drv_data
->action
= KW_I2C_ACTION_SEND_STOP
;
257 drv_data
->state
= KW_I2C_STATE_IDLE
;
261 case KW_I2C_STATUS_MAST_RD_DATA_ACK
: /* 0x50 */
262 if (status
!= KW_I2C_STATUS_MAST_RD_DATA_ACK
)
263 drv_data
->action
= KW_I2C_ACTION_CONTINUE
;
265 drv_data
->action
= KW_I2C_ACTION_RCV_DATA
;
266 drv_data
->bytes_left
--;
268 drv_data
->state
= KW_I2C_STATE_WAITING_FOR_SLAVE_DATA
;
270 if ((drv_data
->bytes_left
== 1) || drv_data
->aborting
)
271 drv_data
->cntl_bits
&= ~KW_I2C_REG_CONTROL_ACK
;
274 case KW_I2C_STATUS_MAST_RD_DATA_NO_ACK
: /* 0x58 */
275 drv_data
->action
= KW_I2C_ACTION_RCV_DATA_STOP
;
276 drv_data
->state
= KW_I2C_STATE_IDLE
;
279 case KW_I2C_STATUS_MAST_WR_ADDR_NO_ACK
: /* 0x20 */
280 case KW_I2C_STATUS_MAST_WR_NO_ACK
: /* 30 */
281 case KW_I2C_STATUS_MAST_RD_ADDR_NO_ACK
: /* 48 */
282 /* Doesn't seem to be a device at other end */
283 drv_data
->action
= KW_I2C_ACTION_SEND_STOP
;
284 drv_data
->state
= KW_I2C_STATE_IDLE
;
285 drv_data
->rc
= -ENODEV
;
289 printf("kirkwood_i2c_fsm: Ctlr Error -- state: 0x%x, "
290 "status: 0x%x, addr: 0x%x, flags: 0x%x\n",
291 drv_data
->state
, status
, drv_data
->msg
->addr
,
292 drv_data
->msg
->flags
);
293 drv_data
->action
= KW_I2C_ACTION_SEND_STOP
;
294 kirkwood_i2c_hw_init(CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
);
300 kirkwood_i2c_do_action(void)
302 switch(drv_data
->action
) {
303 case KW_I2C_ACTION_CONTINUE
:
304 writel(drv_data
->cntl_bits
,
305 CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_CONTROL
);
308 case KW_I2C_ACTION_SEND_START
:
309 writel(drv_data
->cntl_bits
| KW_I2C_REG_CONTROL_START
,
310 CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_CONTROL
);
313 case KW_I2C_ACTION_SEND_ADDR_1
:
314 writel(drv_data
->addr1
,
315 CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_DATA
);
316 writel(drv_data
->cntl_bits
,
317 CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_CONTROL
);
320 case KW_I2C_ACTION_SEND_ADDR_2
:
321 writel(drv_data
->addr2
,
322 CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_DATA
);
323 writel(drv_data
->cntl_bits
,
324 CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_CONTROL
);
327 case KW_I2C_ACTION_SEND_DATA
:
328 writel(drv_data
->msg
->buf
[drv_data
->byte_posn
++],
329 CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_DATA
);
330 writel(drv_data
->cntl_bits
,
331 CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_CONTROL
);
334 case KW_I2C_ACTION_RCV_DATA
:
335 drv_data
->msg
->buf
[drv_data
->byte_posn
++] =
336 readl(CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_DATA
);
337 writel(drv_data
->cntl_bits
,
338 CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_CONTROL
);
341 case KW_I2C_ACTION_RCV_DATA_STOP
:
342 drv_data
->msg
->buf
[drv_data
->byte_posn
++] =
343 readl(CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_DATA
);
344 drv_data
->cntl_bits
&= ~KW_I2C_REG_CONTROL_INTEN
;
345 writel(drv_data
->cntl_bits
| KW_I2C_REG_CONTROL_STOP
,
346 CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_CONTROL
);
350 case KW_I2C_ACTION_INVALID
:
352 printf("kirkwood_i2c_do_action: Invalid action: %d\n",
356 case KW_I2C_ACTION_SEND_STOP
:
357 drv_data
->cntl_bits
&= ~KW_I2C_REG_CONTROL_INTEN
;
358 writel(drv_data
->cntl_bits
| KW_I2C_REG_CONTROL_STOP
,
359 CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_CONTROL
);
366 kirkwood_i2c_intr(void)
372 ctrl
= readl(CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_CONTROL
);
373 while ((ctrl
& KW_I2C_REG_CONTROL_IFLG
) &&
374 (drv_data
->rc
== 0)) {
375 status
= readl(CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_STATUS
);
376 kirkwood_i2c_fsm(status
);
377 kirkwood_i2c_do_action();
379 ctrl
= readl(CONFIG_I2C_KW_REG_BASE
+ KW_I2C_REG_CONTROL
);
386 kirkwood_i2c_doio(struct i2c_msg
*msg
)
390 while ((drv_data
->rc
== 0) && (drv_data
->state
!= KW_I2C_STATE_IDLE
)) {
391 /* poll Status register */
392 ret
= kirkwood_i2c_intr();
399 kirkwood_i2c_prepare_for_io(struct i2c_msg
*msg
)
404 drv_data
->byte_posn
= 0;
405 drv_data
->bytes_left
= msg
->len
;
406 drv_data
->aborting
= 0;
408 /* in u-boot we use no IRQs */
409 drv_data
->cntl_bits
= KW_I2C_REG_CONTROL_ACK
| KW_I2C_REG_CONTROL_TWSIEN
;
411 if (msg
->flags
& I2C_M_RD
)
413 if (msg
->flags
& I2C_M_TEN
) {
414 drv_data
->addr1
= 0xf0 | (((u32
)msg
->addr
& 0x300) >> 7) | dir
;
415 drv_data
->addr2
= (u32
)msg
->addr
& 0xff;
417 drv_data
->addr1
= ((u32
)msg
->addr
& 0x7f) << 1 | dir
;
420 /* OK, no start it (from kirkwood_i2c_execute_msg())*/
421 drv_data
->action
= KW_I2C_ACTION_SEND_START
;
422 drv_data
->state
= KW_I2C_STATE_WAITING_FOR_START_COND
;
424 kirkwood_i2c_do_action();
428 i2c_init(int speed
, int slaveadd
)
430 kirkwood_i2c_hw_init(speed
, slaveadd
);
434 i2c_read(u8 dev
, uint addr
, int alen
, u8
*data
, int length
)
436 kirkwood_i2c_msg
->buf
= data
;
437 kirkwood_i2c_msg
->len
= length
;
438 kirkwood_i2c_msg
->addr
= dev
;
439 kirkwood_i2c_msg
->flags
= I2C_M_RD
;
441 kirkwood_i2c_prepare_for_io(kirkwood_i2c_msg
);
442 kirkwood_i2c_doio(kirkwood_i2c_msg
);
447 i2c_write(u8 dev
, uint addr
, int alen
, u8
*data
, int length
)
449 kirkwood_i2c_msg
->buf
= data
;
450 kirkwood_i2c_msg
->len
= length
;
451 kirkwood_i2c_msg
->addr
= dev
;
452 kirkwood_i2c_msg
->flags
= 0;
454 kirkwood_i2c_prepare_for_io(kirkwood_i2c_msg
);
455 kirkwood_i2c_doio(kirkwood_i2c_msg
);
460 i2c_probe(uchar chip
)
462 return i2c_read(chip
, 0, 0, NULL
, 0);
465 int i2c_set_bus_num(unsigned int bus
)
467 #if defined(CONFIG_I2C_MUX)
468 if (bus
< CONFIG_SYS_MAX_I2C_BUS
) {
473 ret
= i2x_mux_select_mux(bus
);
478 i2c_bus_num_mux
= bus
;
489 unsigned int i2c_get_bus_num(void)
491 #if defined(CONFIG_I2C_MUX)
492 return i2c_bus_num_mux
;