2 * Driver for the TWSI (i2c) controller found on the Marvell
3 * orion5x and kirkwood SoC families.
5 * Author: Albert Aribaud <albert.u.boot@aribaud.net>
6 * Copyright (c) 2010 Albert Aribaud.
8 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/errno.h>
15 #include <linux/compat.h>
20 DECLARE_GLOBAL_DATA_PTR
;
23 * Include a file that will provide CONFIG_I2C_MVTWSI_BASE*, and possibly other
28 #if defined(CONFIG_ORION5X)
29 #include <asm/arch/orion5x.h>
30 #elif (defined(CONFIG_KIRKWOOD) || defined(CONFIG_ARCH_MVEBU))
31 #include <asm/arch/soc.h>
32 #elif defined(CONFIG_SUNXI)
33 #include <asm/arch/i2c.h>
35 #error Driver mvtwsi not supported by SoC or board
37 #endif /* CONFIG_DM_I2C */
40 * TWSI register structure
45 struct mvtwsi_registers
{
57 struct mvtwsi_registers
{
62 u32 status
; /* When reading */
63 u32 baudrate
; /* When writing */
73 struct mvtwsi_i2c_dev
{
74 /* TWSI Register base for the device */
75 struct mvtwsi_registers
*base
;
76 /* Number of the device (determined from cell-index property) */
78 /* The I2C slave address for the device */
80 /* The configured I2C speed in Hz */
82 /* The current length of a clock period (depending on speed) */
85 #endif /* CONFIG_DM_I2C */
88 * enum mvtwsi_ctrl_register_fields - Bit masks for flags in the control
91 enum mvtwsi_ctrl_register_fields
{
93 MVTWSI_CONTROL_ACK
= 0x00000004,
95 MVTWSI_CONTROL_IFLG
= 0x00000008,
97 MVTWSI_CONTROL_STOP
= 0x00000010,
99 MVTWSI_CONTROL_START
= 0x00000020,
101 MVTWSI_CONTROL_TWSIEN
= 0x00000040,
102 /* Interrupt enable */
103 MVTWSI_CONTROL_INTEN
= 0x00000080,
107 * On sun6i and newer, IFLG is a write-clear bit, which is cleared by writing 1;
108 * on other platforms, it is a normal r/w bit, which is cleared by writing 0.
111 #ifdef CONFIG_SUNXI_GEN_SUN6I
112 #define MVTWSI_CONTROL_CLEAR_IFLG 0x00000008
114 #define MVTWSI_CONTROL_CLEAR_IFLG 0x00000000
118 * enum mvstwsi_status_values - Possible values of I2C controller's status
121 * Only those statuses expected in normal master operation on
122 * non-10-bit-address devices are specified.
124 * Every status that's unexpected during normal operation (bus errors,
125 * arbitration losses, missing ACKs...) is passed back to the caller as an error
128 enum mvstwsi_status_values
{
129 /* START condition transmitted */
130 MVTWSI_STATUS_START
= 0x08,
131 /* Repeated START condition transmitted */
132 MVTWSI_STATUS_REPEATED_START
= 0x10,
133 /* Address + write bit transmitted, ACK received */
134 MVTWSI_STATUS_ADDR_W_ACK
= 0x18,
135 /* Data transmitted, ACK received */
136 MVTWSI_STATUS_DATA_W_ACK
= 0x28,
137 /* Address + read bit transmitted, ACK received */
138 MVTWSI_STATUS_ADDR_R_ACK
= 0x40,
139 /* Address + read bit transmitted, ACK not received */
140 MVTWSI_STATUS_ADDR_R_NAK
= 0x48,
141 /* Data received, ACK transmitted */
142 MVTWSI_STATUS_DATA_R_ACK
= 0x50,
143 /* Data received, ACK not transmitted */
144 MVTWSI_STATUS_DATA_R_NAK
= 0x58,
145 /* No relevant status */
146 MVTWSI_STATUS_IDLE
= 0xF8,
150 * enum mvstwsi_ack_flags - Determine whether a read byte should be
151 * acknowledged or not.
153 enum mvtwsi_ack_flags
{
154 /* Send NAK after received byte */
156 /* Send ACK after received byte */
161 * calc_tick() - Calculate the duration of a clock cycle from the I2C speed
163 * @speed: The speed in Hz to calculate the clock cycle duration for.
164 * @return The duration of a clock cycle in ns.
166 inline uint
calc_tick(uint speed
)
168 /* One tick = the duration of a period at the specified speed in ns (we
169 * add 100 ns to be on the safe side) */
170 return (1000000000u / speed
) + 100;
173 #ifndef CONFIG_DM_I2C
176 * twsi_get_base() - Get controller register base for specified adapter
178 * @adap: Adapter to get the register base for.
179 * @return Register base for the specified adapter.
181 static struct mvtwsi_registers
*twsi_get_base(struct i2c_adapter
*adap
)
183 switch (adap
->hwadapnr
) {
184 #ifdef CONFIG_I2C_MVTWSI_BASE0
186 return (struct mvtwsi_registers
*)CONFIG_I2C_MVTWSI_BASE0
;
188 #ifdef CONFIG_I2C_MVTWSI_BASE1
190 return (struct mvtwsi_registers
*)CONFIG_I2C_MVTWSI_BASE1
;
192 #ifdef CONFIG_I2C_MVTWSI_BASE2
194 return (struct mvtwsi_registers
*)CONFIG_I2C_MVTWSI_BASE2
;
196 #ifdef CONFIG_I2C_MVTWSI_BASE3
198 return (struct mvtwsi_registers
*)CONFIG_I2C_MVTWSI_BASE3
;
200 #ifdef CONFIG_I2C_MVTWSI_BASE4
202 return (struct mvtwsi_registers
*)CONFIG_I2C_MVTWSI_BASE4
;
204 #ifdef CONFIG_I2C_MVTWSI_BASE5
206 return (struct mvtwsi_registers
*)CONFIG_I2C_MVTWSI_BASE5
;
209 printf("Missing mvtwsi controller %d base\n", adap
->hwadapnr
);
218 * enum mvtwsi_error_class - types of I2C errors
220 enum mvtwsi_error_class
{
221 /* The controller returned a different status than expected */
222 MVTWSI_ERROR_WRONG_STATUS
= 0x01,
223 /* The controller timed out */
224 MVTWSI_ERROR_TIMEOUT
= 0x02,
228 * mvtwsi_error() - Build I2C return code from error information
230 * For debugging purposes, this function packs some information of an occurred
231 * error into a return code. These error codes are returned from I2C API
232 * functions (i2c_{read,write}, dm_i2c_{read,write}, etc.).
234 * @ec: The error class of the error (enum mvtwsi_error_class).
235 * @lc: The last value of the control register.
236 * @ls: The last value of the status register.
237 * @es: The expected value of the status register.
238 * @return The generated error code.
240 inline uint
mvtwsi_error(uint ec
, uint lc
, uint ls
, uint es
)
242 return ((ec
<< 24) & 0xFF000000)
243 | ((lc
<< 16) & 0x00FF0000)
244 | ((ls
<< 8) & 0x0000FF00)
249 * twsi_wait() - Wait for I2C bus interrupt flag and check status, or time out.
251 * @return Zero if status is as expected, or a non-zero code if either a time
252 * out occurred, or the status was not the expected one.
254 static int twsi_wait(struct mvtwsi_registers
*twsi
, int expected_status
,
261 control
= readl(&twsi
->control
);
262 if (control
& MVTWSI_CONTROL_IFLG
) {
263 status
= readl(&twsi
->status
);
264 if (status
== expected_status
)
268 MVTWSI_ERROR_WRONG_STATUS
,
269 control
, status
, expected_status
);
271 ndelay(tick
); /* One clock cycle */
273 status
= readl(&twsi
->status
);
274 return mvtwsi_error(MVTWSI_ERROR_TIMEOUT
, control
, status
,
279 * twsi_start() - Assert a START condition on the bus.
281 * This function is used in both single I2C transactions and inside
282 * back-to-back transactions (repeated starts).
284 * @twsi: The MVTWSI register structure to use.
285 * @expected_status: The I2C bus status expected to be asserted after the
286 * operation completion.
287 * @tick: The duration of a clock cycle at the current I2C speed.
288 * @return Zero if status is as expected, or a non-zero code if either a time
289 * out occurred or the status was not the expected one.
291 static int twsi_start(struct mvtwsi_registers
*twsi
, int expected_status
,
295 writel(MVTWSI_CONTROL_TWSIEN
| MVTWSI_CONTROL_START
|
296 MVTWSI_CONTROL_CLEAR_IFLG
, &twsi
->control
);
297 /* Wait for controller to process START */
298 return twsi_wait(twsi
, expected_status
, tick
);
302 * twsi_send() - Send a byte on the I2C bus.
304 * The byte may be part of an address byte or data.
306 * @twsi: The MVTWSI register structure to use.
307 * @byte: The byte to send.
308 * @expected_status: The I2C bus status expected to be asserted after the
309 * operation completion.
310 * @tick: The duration of a clock cycle at the current I2C speed.
311 * @return Zero if status is as expected, or a non-zero code if either a time
312 * out occurred or the status was not the expected one.
314 static int twsi_send(struct mvtwsi_registers
*twsi
, u8 byte
,
315 int expected_status
, uint tick
)
317 /* Write byte to data register for sending */
318 writel(byte
, &twsi
->data
);
319 /* Clear any pending interrupt -- that will cause sending */
320 writel(MVTWSI_CONTROL_TWSIEN
| MVTWSI_CONTROL_CLEAR_IFLG
,
322 /* Wait for controller to receive byte, and check ACK */
323 return twsi_wait(twsi
, expected_status
, tick
);
327 * twsi_recv() - Receive a byte on the I2C bus.
329 * The static variable mvtwsi_control_flags controls whether we ack or nak.
331 * @twsi: The MVTWSI register structure to use.
332 * @byte: The byte to send.
333 * @ack_flag: Flag that determines whether the received byte should
334 * be acknowledged by the controller or not (sent ACK/NAK).
335 * @tick: The duration of a clock cycle at the current I2C speed.
336 * @return Zero if status is as expected, or a non-zero code if either a time
337 * out occurred or the status was not the expected one.
339 static int twsi_recv(struct mvtwsi_registers
*twsi
, u8
*byte
, int ack_flag
,
342 int expected_status
, status
, control
;
344 /* Compute expected status based on passed ACK flag */
345 expected_status
= ack_flag
? MVTWSI_STATUS_DATA_R_ACK
:
346 MVTWSI_STATUS_DATA_R_NAK
;
347 /* Acknowledge *previous state*, and launch receive */
348 control
= MVTWSI_CONTROL_TWSIEN
;
349 control
|= ack_flag
== MVTWSI_READ_ACK
? MVTWSI_CONTROL_ACK
: 0;
350 writel(control
| MVTWSI_CONTROL_CLEAR_IFLG
, &twsi
->control
);
351 /* Wait for controller to receive byte, and assert ACK or NAK */
352 status
= twsi_wait(twsi
, expected_status
, tick
);
353 /* If we did receive the expected byte, store it */
355 *byte
= readl(&twsi
->data
);
360 * twsi_stop() - Assert a STOP condition on the bus.
362 * This function is also used to force the bus back to idle state (SDA =
365 * @twsi: The MVTWSI register structure to use.
366 * @tick: The duration of a clock cycle at the current I2C speed.
367 * @return Zero if the operation succeeded, or a non-zero code if a time out
370 static int twsi_stop(struct mvtwsi_registers
*twsi
, uint tick
)
372 int control
, stop_status
;
377 control
= MVTWSI_CONTROL_TWSIEN
| MVTWSI_CONTROL_STOP
;
378 writel(control
| MVTWSI_CONTROL_CLEAR_IFLG
, &twsi
->control
);
379 /* Wait for IDLE; IFLG won't rise, so we can't use twsi_wait() */
381 stop_status
= readl(&twsi
->status
);
382 if (stop_status
== MVTWSI_STATUS_IDLE
)
384 ndelay(tick
); /* One clock cycle */
386 control
= readl(&twsi
->control
);
387 if (stop_status
!= MVTWSI_STATUS_IDLE
)
388 status
= mvtwsi_error(MVTWSI_ERROR_TIMEOUT
,
389 control
, status
, MVTWSI_STATUS_IDLE
);
394 * twsi_calc_freq() - Compute I2C frequency depending on m and n parameters.
396 * @n: Parameter 'n' for the frequency calculation algorithm.
397 * @m: Parameter 'm' for the frequency calculation algorithm.
398 * @return The I2C frequency corresponding to the passed m and n parameters.
400 static uint
twsi_calc_freq(const int n
, const int m
)
403 return CONFIG_SYS_TCLK
/ (10 * (m
+ 1) * (1 << n
));
405 return CONFIG_SYS_TCLK
/ (10 * (m
+ 1) * (2 << n
));
410 * twsi_reset() - Reset the I2C controller.
412 * Resetting the controller also resets the baud rate and slave address, hence
413 * they must be re-established after the reset.
415 * @twsi: The MVTWSI register structure to use.
417 static void twsi_reset(struct mvtwsi_registers
*twsi
)
419 /* Reset controller */
420 writel(0, &twsi
->soft_reset
);
421 /* Wait 2 ms -- this is what the Marvell LSP does */
426 * __twsi_i2c_set_bus_speed() - Set the speed of the I2C controller.
428 * This function sets baud rate to the highest possible value that does not
429 * exceed the requested rate.
431 * @twsi: The MVTWSI register structure to use.
432 * @requested_speed: The desired frequency the controller should run at
434 * @return The actual frequency the controller was configured to.
436 static uint
__twsi_i2c_set_bus_speed(struct mvtwsi_registers
*twsi
,
437 uint requested_speed
)
439 uint tmp_speed
, highest_speed
, n
, m
;
440 uint baud
= 0x44; /* Baud rate after controller reset */
443 /* Successively try m, n combinations, and use the combination
444 * resulting in the largest speed that's not above the requested
446 for (n
= 0; n
< 8; n
++) {
447 for (m
= 0; m
< 16; m
++) {
448 tmp_speed
= twsi_calc_freq(n
, m
);
449 if ((tmp_speed
<= requested_speed
) &&
450 (tmp_speed
> highest_speed
)) {
451 highest_speed
= tmp_speed
;
456 writel(baud
, &twsi
->baudrate
);
458 /* Wait for controller for one tick */
460 ndelay(calc_tick(highest_speed
));
464 return highest_speed
;
468 * __twsi_i2c_init() - Initialize the I2C controller.
470 * @twsi: The MVTWSI register structure to use.
471 * @speed: The initial frequency the controller should run at
473 * @slaveadd: The I2C address to be set for the I2C master.
474 * @actual_speed: A output parameter that receives the actual frequency
475 * in Hz the controller was set to by the function.
476 * @return Zero if the operation succeeded, or a non-zero code if a time out
479 static void __twsi_i2c_init(struct mvtwsi_registers
*twsi
, int speed
,
480 int slaveadd
, uint
*actual_speed
)
482 /* Reset controller */
485 *actual_speed
= __twsi_i2c_set_bus_speed(twsi
, speed
);
486 /* Set slave address; even though we don't use it */
487 writel(slaveadd
, &twsi
->slave_address
);
488 writel(0, &twsi
->xtnd_slave_addr
);
489 /* Assert STOP, but don't care for the result */
491 (void) twsi_stop(twsi
, calc_tick(*actual_speed
));
493 (void) twsi_stop(twsi
, 10000);
498 * i2c_begin() - Start a I2C transaction.
500 * Begin a I2C transaction with a given expected start status and chip address.
501 * A START is asserted, and the address byte is sent to the I2C controller. The
502 * expected address status will be derived from the direction bit (bit 0) of
505 * @twsi: The MVTWSI register structure to use.
506 * @expected_start_status: The I2C status the controller is expected to
507 * assert after the address byte was sent.
508 * @addr: The address byte to be sent.
509 * @tick: The duration of a clock cycle at the current
511 * @return Zero if the operation succeeded, or a non-zero code if a time out or
512 * unexpected I2C status occurred.
514 static int i2c_begin(struct mvtwsi_registers
*twsi
, int expected_start_status
,
517 int status
, expected_addr_status
;
519 /* Compute the expected address status from the direction bit in
520 * the address byte */
521 if (addr
& 1) /* Reading */
522 expected_addr_status
= MVTWSI_STATUS_ADDR_R_ACK
;
524 expected_addr_status
= MVTWSI_STATUS_ADDR_W_ACK
;
526 status
= twsi_start(twsi
, expected_start_status
, tick
);
527 /* Send out the address if the start went well */
529 status
= twsi_send(twsi
, addr
, expected_addr_status
, tick
);
530 /* Return 0, or the status of the first failure */
535 * __twsi_i2c_probe_chip() - Probe the given I2C chip address.
537 * This function begins a I2C read transaction, does a dummy read and NAKs; if
538 * the procedure succeeds, the chip is considered to be present.
540 * @twsi: The MVTWSI register structure to use.
541 * @chip: The chip address to probe.
542 * @tick: The duration of a clock cycle at the current I2C speed.
543 * @return Zero if the operation succeeded, or a non-zero code if a time out or
544 * unexpected I2C status occurred.
546 static int __twsi_i2c_probe_chip(struct mvtwsi_registers
*twsi
, uchar chip
,
553 status
= i2c_begin(twsi
, MVTWSI_STATUS_START
, (chip
<< 1) | 1, tick
);
554 /* Dummy read was accepted: receive byte, but NAK it. */
556 status
= twsi_recv(twsi
, &dummy_byte
, MVTWSI_READ_NAK
, tick
);
557 /* Stop transaction */
558 twsi_stop(twsi
, tick
);
559 /* Return 0, or the status of the first failure */
564 * __twsi_i2c_read() - Read data from a I2C chip.
566 * This function begins a I2C write transaction, and transmits the address
567 * bytes; then begins a I2C read transaction, and receives the data bytes.
569 * NOTE: Some devices want a stop right before the second start, while some
570 * will choke if it is there. Since deciding this is not yet supported in
571 * higher level APIs, we need to make a decision here, and for the moment that
572 * will be a repeated start without a preceding stop.
574 * @twsi: The MVTWSI register structure to use.
575 * @chip: The chip address to read from.
576 * @addr: The address bytes to send.
577 * @alen: The length of the address bytes in bytes.
578 * @data: The buffer to receive the data read from the chip (has to have
579 * a size of at least 'length' bytes).
580 * @length: The amount of data to be read from the chip in bytes.
581 * @tick: The duration of a clock cycle at the current I2C speed.
582 * @return Zero if the operation succeeded, or a non-zero code if a time out or
583 * unexpected I2C status occurred.
585 static int __twsi_i2c_read(struct mvtwsi_registers
*twsi
, uchar chip
,
586 u8
*addr
, int alen
, uchar
*data
, int length
,
591 int expected_start
= MVTWSI_STATUS_START
;
594 /* Begin i2c write to send the address bytes */
595 status
= i2c_begin(twsi
, expected_start
, (chip
<< 1), tick
);
596 /* Send address bytes */
597 while ((status
== 0) && alen
--)
598 status
= twsi_send(twsi
, *(addr
++),
599 MVTWSI_STATUS_DATA_W_ACK
, tick
);
600 /* Send repeated STARTs after the initial START */
601 expected_start
= MVTWSI_STATUS_REPEATED_START
;
603 /* Begin i2c read to receive data bytes */
605 status
= i2c_begin(twsi
, expected_start
, (chip
<< 1) | 1, tick
);
606 /* Receive actual data bytes; set NAK if we if we have nothing more to
608 while ((status
== 0) && length
--)
609 status
= twsi_recv(twsi
, data
++,
611 MVTWSI_READ_ACK
: MVTWSI_READ_NAK
, tick
);
612 /* Stop transaction */
613 stop_status
= twsi_stop(twsi
, tick
);
614 /* Return 0, or the status of the first failure */
615 return status
!= 0 ? status
: stop_status
;
619 * __twsi_i2c_write() - Send data to a I2C chip.
621 * This function begins a I2C write transaction, and transmits the address
622 * bytes; then begins a new I2C write transaction, and sends the data bytes.
624 * @twsi: The MVTWSI register structure to use.
625 * @chip: The chip address to read from.
626 * @addr: The address bytes to send.
627 * @alen: The length of the address bytes in bytes.
628 * @data: The buffer containing the data to be sent to the chip.
629 * @length: The length of data to be sent to the chip in bytes.
630 * @tick: The duration of a clock cycle at the current I2C speed.
631 * @return Zero if the operation succeeded, or a non-zero code if a time out or
632 * unexpected I2C status occurred.
634 static int __twsi_i2c_write(struct mvtwsi_registers
*twsi
, uchar chip
,
635 u8
*addr
, int alen
, uchar
*data
, int length
,
638 int status
, stop_status
;
640 /* Begin i2c write to send first the address bytes, then the
642 status
= i2c_begin(twsi
, MVTWSI_STATUS_START
, (chip
<< 1), tick
);
643 /* Send address bytes */
644 while ((status
== 0) && (alen
-- > 0))
645 status
= twsi_send(twsi
, *(addr
++), MVTWSI_STATUS_DATA_W_ACK
,
647 /* Send data bytes */
648 while ((status
== 0) && (length
-- > 0))
649 status
= twsi_send(twsi
, *(data
++), MVTWSI_STATUS_DATA_W_ACK
,
651 /* Stop transaction */
652 stop_status
= twsi_stop(twsi
, tick
);
653 /* Return 0, or the status of the first failure */
654 return status
!= 0 ? status
: stop_status
;
657 #ifndef CONFIG_DM_I2C
658 static void twsi_i2c_init(struct i2c_adapter
*adap
, int speed
,
661 struct mvtwsi_registers
*twsi
= twsi_get_base(adap
);
662 __twsi_i2c_init(twsi
, speed
, slaveadd
, NULL
);
665 static uint
twsi_i2c_set_bus_speed(struct i2c_adapter
*adap
,
666 uint requested_speed
)
668 struct mvtwsi_registers
*twsi
= twsi_get_base(adap
);
669 __twsi_i2c_set_bus_speed(twsi
, requested_speed
);
673 static int twsi_i2c_probe(struct i2c_adapter
*adap
, uchar chip
)
675 struct mvtwsi_registers
*twsi
= twsi_get_base(adap
);
676 return __twsi_i2c_probe_chip(twsi
, chip
, 10000);
679 static int twsi_i2c_read(struct i2c_adapter
*adap
, uchar chip
, uint addr
,
680 int alen
, uchar
*data
, int length
)
682 struct mvtwsi_registers
*twsi
= twsi_get_base(adap
);
685 addr_bytes
[0] = (addr
>> 0) & 0xFF;
686 addr_bytes
[1] = (addr
>> 8) & 0xFF;
687 addr_bytes
[2] = (addr
>> 16) & 0xFF;
688 addr_bytes
[3] = (addr
>> 24) & 0xFF;
690 return __twsi_i2c_read(twsi
, chip
, addr_bytes
, alen
, data
, length
,
694 static int twsi_i2c_write(struct i2c_adapter
*adap
, uchar chip
, uint addr
,
695 int alen
, uchar
*data
, int length
)
697 struct mvtwsi_registers
*twsi
= twsi_get_base(adap
);
700 addr_bytes
[0] = (addr
>> 0) & 0xFF;
701 addr_bytes
[1] = (addr
>> 8) & 0xFF;
702 addr_bytes
[2] = (addr
>> 16) & 0xFF;
703 addr_bytes
[3] = (addr
>> 24) & 0xFF;
705 return __twsi_i2c_write(twsi
, chip
, addr_bytes
, alen
, data
, length
,
709 #ifdef CONFIG_I2C_MVTWSI_BASE0
710 U_BOOT_I2C_ADAP_COMPLETE(twsi0
, twsi_i2c_init
, twsi_i2c_probe
,
711 twsi_i2c_read
, twsi_i2c_write
,
712 twsi_i2c_set_bus_speed
,
713 CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
, 0)
715 #ifdef CONFIG_I2C_MVTWSI_BASE1
716 U_BOOT_I2C_ADAP_COMPLETE(twsi1
, twsi_i2c_init
, twsi_i2c_probe
,
717 twsi_i2c_read
, twsi_i2c_write
,
718 twsi_i2c_set_bus_speed
,
719 CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
, 1)
722 #ifdef CONFIG_I2C_MVTWSI_BASE2
723 U_BOOT_I2C_ADAP_COMPLETE(twsi2
, twsi_i2c_init
, twsi_i2c_probe
,
724 twsi_i2c_read
, twsi_i2c_write
,
725 twsi_i2c_set_bus_speed
,
726 CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
, 2)
729 #ifdef CONFIG_I2C_MVTWSI_BASE3
730 U_BOOT_I2C_ADAP_COMPLETE(twsi3
, twsi_i2c_init
, twsi_i2c_probe
,
731 twsi_i2c_read
, twsi_i2c_write
,
732 twsi_i2c_set_bus_speed
,
733 CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
, 3)
736 #ifdef CONFIG_I2C_MVTWSI_BASE4
737 U_BOOT_I2C_ADAP_COMPLETE(twsi4
, twsi_i2c_init
, twsi_i2c_probe
,
738 twsi_i2c_read
, twsi_i2c_write
,
739 twsi_i2c_set_bus_speed
,
740 CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
, 4)
743 #ifdef CONFIG_I2C_MVTWSI_BASE5
744 U_BOOT_I2C_ADAP_COMPLETE(twsi5
, twsi_i2c_init
, twsi_i2c_probe
,
745 twsi_i2c_read
, twsi_i2c_write
,
746 twsi_i2c_set_bus_speed
,
747 CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
, 5)
750 #else /* CONFIG_DM_I2C */
752 static int mvtwsi_i2c_probe_chip(struct udevice
*bus
, u32 chip_addr
,
755 struct mvtwsi_i2c_dev
*dev
= dev_get_priv(bus
);
756 return __twsi_i2c_probe_chip(dev
->base
, chip_addr
, dev
->tick
);
759 static int mvtwsi_i2c_set_bus_speed(struct udevice
*bus
, uint speed
)
761 struct mvtwsi_i2c_dev
*dev
= dev_get_priv(bus
);
763 dev
->speed
= __twsi_i2c_set_bus_speed(dev
->base
, speed
);
764 dev
->tick
= calc_tick(dev
->speed
);
769 static int mvtwsi_i2c_ofdata_to_platdata(struct udevice
*bus
)
771 struct mvtwsi_i2c_dev
*dev
= dev_get_priv(bus
);
773 dev
->base
= dev_get_addr_ptr(bus
);
778 dev
->index
= fdtdec_get_int(gd
->fdt_blob
, bus
->of_offset
,
780 dev
->slaveadd
= fdtdec_get_int(gd
->fdt_blob
, bus
->of_offset
,
781 "u-boot,i2c-slave-addr", 0x0);
782 dev
->speed
= fdtdec_get_int(gd
->fdt_blob
, bus
->of_offset
,
783 "clock-frequency", 100000);
787 static int mvtwsi_i2c_probe(struct udevice
*bus
)
789 struct mvtwsi_i2c_dev
*dev
= dev_get_priv(bus
);
792 __twsi_i2c_init(dev
->base
, dev
->speed
, dev
->slaveadd
, &actual_speed
);
793 dev
->speed
= actual_speed
;
794 dev
->tick
= calc_tick(dev
->speed
);
798 static int mvtwsi_i2c_xfer(struct udevice
*bus
, struct i2c_msg
*msg
, int nmsgs
)
800 struct mvtwsi_i2c_dev
*dev
= dev_get_priv(bus
);
801 struct i2c_msg
*dmsg
, *omsg
, dummy
;
803 memset(&dummy
, 0, sizeof(struct i2c_msg
));
805 /* We expect either two messages (one with an offset and one with the
806 * actual data) or one message (just data or offset/data combined) */
807 if (nmsgs
> 2 || nmsgs
== 0) {
808 debug("%s: Only one or two messages are supported.", __func__
);
812 omsg
= nmsgs
== 1 ? &dummy
: msg
;
813 dmsg
= nmsgs
== 1 ? msg
: msg
+ 1;
815 if (dmsg
->flags
& I2C_M_RD
)
816 return __twsi_i2c_read(dev
->base
, dmsg
->addr
, omsg
->buf
,
817 omsg
->len
, dmsg
->buf
, dmsg
->len
,
820 return __twsi_i2c_write(dev
->base
, dmsg
->addr
, omsg
->buf
,
821 omsg
->len
, dmsg
->buf
, dmsg
->len
,
825 static const struct dm_i2c_ops mvtwsi_i2c_ops
= {
826 .xfer
= mvtwsi_i2c_xfer
,
827 .probe_chip
= mvtwsi_i2c_probe_chip
,
828 .set_bus_speed
= mvtwsi_i2c_set_bus_speed
,
831 static const struct udevice_id mvtwsi_i2c_ids
[] = {
832 { .compatible
= "marvell,mv64xxx-i2c", },
836 U_BOOT_DRIVER(i2c_mvtwsi
) = {
837 .name
= "i2c_mvtwsi",
839 .of_match
= mvtwsi_i2c_ids
,
840 .probe
= mvtwsi_i2c_probe
,
841 .ofdata_to_platdata
= mvtwsi_i2c_ofdata_to_platdata
,
842 .priv_auto_alloc_size
= sizeof(struct mvtwsi_i2c_dev
),
843 .ops
= &mvtwsi_i2c_ops
,
845 #endif /* CONFIG_DM_I2C */