2 * Driver for the TWSI (i2c) controller found on the Marvell
3 * orion5x and kirkwood SoC families.
5 * Author: Albert Aribaud <albert.u.boot@aribaud.net>
6 * Copyright (c) 2010 Albert Aribaud.
8 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/errno.h>
17 * include a file that will provide CONFIG_I2C_MVTWSI_BASE*
18 * and possibly other settings
21 #if defined(CONFIG_ORION5X)
22 #include <asm/arch/orion5x.h>
23 #elif (defined(CONFIG_KIRKWOOD) || defined(CONFIG_ARMADA_XP))
24 #include <asm/arch/soc.h>
25 #elif defined(CONFIG_SUNXI)
26 #include <asm/arch/i2c.h>
28 #error Driver mvtwsi not supported by SoC or board
32 * TWSI register structure
37 struct mvtwsi_registers
{
49 struct mvtwsi_registers
{
54 u32 status
; /* when reading */
55 u32 baudrate
; /* when writing */
65 * Control register fields
68 #define MVTWSI_CONTROL_ACK 0x00000004
69 #define MVTWSI_CONTROL_IFLG 0x00000008
70 #define MVTWSI_CONTROL_STOP 0x00000010
71 #define MVTWSI_CONTROL_START 0x00000020
72 #define MVTWSI_CONTROL_TWSIEN 0x00000040
73 #define MVTWSI_CONTROL_INTEN 0x00000080
76 * Status register values -- only those expected in normal master
77 * operation on non-10-bit-address devices; whatever status we don't
78 * expect in nominal conditions (bus errors, arbitration losses,
79 * missing ACKs...) we just pass back to the caller as an error
83 #define MVTWSI_STATUS_START 0x08
84 #define MVTWSI_STATUS_REPEATED_START 0x10
85 #define MVTWSI_STATUS_ADDR_W_ACK 0x18
86 #define MVTWSI_STATUS_DATA_W_ACK 0x28
87 #define MVTWSI_STATUS_ADDR_R_ACK 0x40
88 #define MVTWSI_STATUS_ADDR_R_NAK 0x48
89 #define MVTWSI_STATUS_DATA_R_ACK 0x50
90 #define MVTWSI_STATUS_DATA_R_NAK 0x58
91 #define MVTWSI_STATUS_IDLE 0xF8
94 * MVTWSI controller base
97 static struct mvtwsi_registers
*twsi_get_base(struct i2c_adapter
*adap
)
99 switch (adap
->hwadapnr
) {
100 #ifdef CONFIG_I2C_MVTWSI_BASE0
102 return (struct mvtwsi_registers
*) CONFIG_I2C_MVTWSI_BASE0
;
104 #ifdef CONFIG_I2C_MVTWSI_BASE1
106 return (struct mvtwsi_registers
*) CONFIG_I2C_MVTWSI_BASE1
;
108 #ifdef CONFIG_I2C_MVTWSI_BASE2
110 return (struct mvtwsi_registers
*) CONFIG_I2C_MVTWSI_BASE2
;
112 #ifdef CONFIG_I2C_MVTWSI_BASE3
114 return (struct mvtwsi_registers
*) CONFIG_I2C_MVTWSI_BASE3
;
116 #ifdef CONFIG_I2C_MVTWSI_BASE4
118 return (struct mvtwsi_registers
*) CONFIG_I2C_MVTWSI_BASE4
;
121 printf("Missing mvtwsi controller %d base\n", adap
->hwadapnr
);
129 * Returned statuses are 0 for success and nonzero otherwise.
130 * Currently, cmd_i2c and cmd_eeprom do not interpret an error status.
131 * Thus to ease debugging, the return status contains some debug info:
132 * - bits 31..24 are error class: 1 is timeout, 2 is 'status mismatch'.
133 * - bits 23..16 are the last value of the control register.
134 * - bits 15..8 are the last value of the status register.
135 * - bits 7..0 are the expected value of the status register.
138 #define MVTWSI_ERROR_WRONG_STATUS 0x01
139 #define MVTWSI_ERROR_TIMEOUT 0x02
141 #define MVTWSI_ERROR(ec, lc, ls, es) (((ec << 24) & 0xFF000000) | \
142 ((lc << 16) & 0x00FF0000) | ((ls<<8) & 0x0000FF00) | (es & 0xFF))
145 * Wait for IFLG to raise, or return 'timeout'; then if status is as expected,
146 * return 0 (ok) or return 'wrong status'.
148 static int twsi_wait(struct i2c_adapter
*adap
, int expected_status
)
150 struct mvtwsi_registers
*twsi
= twsi_get_base(adap
);
155 control
= readl(&twsi
->control
);
156 if (control
& MVTWSI_CONTROL_IFLG
) {
157 status
= readl(&twsi
->status
);
158 if (status
== expected_status
)
162 MVTWSI_ERROR_WRONG_STATUS
,
163 control
, status
, expected_status
);
165 udelay(10); /* one clock cycle at 100 kHz */
167 status
= readl(&twsi
->status
);
169 MVTWSI_ERROR_TIMEOUT
, control
, status
, expected_status
);
173 * These flags are ORed to any write to the control register
174 * They allow global setting of TWSIEN and ACK.
175 * By default none are set.
176 * twsi_start() sets TWSIEN (in case the controller was disabled)
177 * twsi_recv() sets ACK or resets it depending on expected status.
179 static u8 twsi_control_flags
= MVTWSI_CONTROL_TWSIEN
;
182 * Assert the START condition, either in a single I2C transaction
183 * or inside back-to-back ones (repeated starts).
185 static int twsi_start(struct i2c_adapter
*adap
, int expected_status
)
187 struct mvtwsi_registers
*twsi
= twsi_get_base(adap
);
189 /* globally set TWSIEN in case it was not */
190 twsi_control_flags
|= MVTWSI_CONTROL_TWSIEN
;
192 writel(twsi_control_flags
| MVTWSI_CONTROL_START
, &twsi
->control
);
193 /* wait for controller to process START */
194 return twsi_wait(adap
, expected_status
);
198 * Send a byte (i2c address or data).
200 static int twsi_send(struct i2c_adapter
*adap
, u8 byte
, int expected_status
)
202 struct mvtwsi_registers
*twsi
= twsi_get_base(adap
);
204 /* put byte in data register for sending */
205 writel(byte
, &twsi
->data
);
206 /* clear any pending interrupt -- that'll cause sending */
207 writel(twsi_control_flags
, &twsi
->control
);
208 /* wait for controller to receive byte and check ACK */
209 return twsi_wait(adap
, expected_status
);
214 * Global mvtwsi_control_flags variable says if we should ack or nak.
216 static int twsi_recv(struct i2c_adapter
*adap
, u8
*byte
)
218 struct mvtwsi_registers
*twsi
= twsi_get_base(adap
);
219 int expected_status
, status
;
221 /* compute expected status based on ACK bit in global control flags */
222 if (twsi_control_flags
& MVTWSI_CONTROL_ACK
)
223 expected_status
= MVTWSI_STATUS_DATA_R_ACK
;
225 expected_status
= MVTWSI_STATUS_DATA_R_NAK
;
226 /* acknowledge *previous state* and launch receive */
227 writel(twsi_control_flags
, &twsi
->control
);
228 /* wait for controller to receive byte and assert ACK or NAK */
229 status
= twsi_wait(adap
, expected_status
);
230 /* if we did receive expected byte then store it */
232 *byte
= readl(&twsi
->data
);
238 * Assert the STOP condition.
239 * This is also used to force the bus back in idle (SDA=SCL=1).
241 static int twsi_stop(struct i2c_adapter
*adap
, int status
)
243 struct mvtwsi_registers
*twsi
= twsi_get_base(adap
);
244 int control
, stop_status
;
248 control
= MVTWSI_CONTROL_TWSIEN
| MVTWSI_CONTROL_STOP
;
249 writel(control
, &twsi
->control
);
250 /* wait for IDLE; IFLG won't rise so twsi_wait() is no use. */
252 stop_status
= readl(&twsi
->status
);
253 if (stop_status
== MVTWSI_STATUS_IDLE
)
255 udelay(10); /* one clock cycle at 100 kHz */
257 control
= readl(&twsi
->control
);
258 if (stop_status
!= MVTWSI_STATUS_IDLE
)
260 status
= MVTWSI_ERROR(
261 MVTWSI_ERROR_TIMEOUT
,
262 control
, status
, MVTWSI_STATUS_IDLE
);
266 static unsigned int twsi_calc_freq(const int n
, const int m
)
269 return CONFIG_SYS_TCLK
/ (10 * (m
+ 1) * (1 << n
));
271 return CONFIG_SYS_TCLK
/ (10 * (m
+ 1) * (2 << n
));
277 * Controller reset also resets the baud rate and slave address, so
278 * they must be re-established afterwards.
280 static void twsi_reset(struct i2c_adapter
*adap
)
282 struct mvtwsi_registers
*twsi
= twsi_get_base(adap
);
283 /* ensure controller will be enabled by any twsi*() function */
284 twsi_control_flags
= MVTWSI_CONTROL_TWSIEN
;
285 /* reset controller */
286 writel(0, &twsi
->soft_reset
);
287 /* wait 2 ms -- this is what the Marvell LSP does */
292 * I2C init called by cmd_i2c when doing 'i2c reset'.
293 * Sets baud to the highest possible value not exceeding requested one.
295 static unsigned int twsi_i2c_set_bus_speed(struct i2c_adapter
*adap
,
296 unsigned int requested_speed
)
298 struct mvtwsi_registers
*twsi
= twsi_get_base(adap
);
299 unsigned int tmp_speed
, highest_speed
, n
, m
;
300 unsigned int baud
= 0x44; /* baudrate at controller reset */
302 /* use actual speed to collect progressively higher values */
304 /* compute m, n setting for highest speed not above requested speed */
305 for (n
= 0; n
< 8; n
++) {
306 for (m
= 0; m
< 16; m
++) {
307 tmp_speed
= twsi_calc_freq(n
, m
);
308 if ((tmp_speed
<= requested_speed
)
309 && (tmp_speed
> highest_speed
)) {
310 highest_speed
= tmp_speed
;
315 writel(baud
, &twsi
->baudrate
);
319 static void twsi_i2c_init(struct i2c_adapter
*adap
, int speed
, int slaveadd
)
321 struct mvtwsi_registers
*twsi
= twsi_get_base(adap
);
323 /* reset controller */
326 twsi_i2c_set_bus_speed(adap
, speed
);
327 /* set slave address even though we don't use it */
328 writel(slaveadd
, &twsi
->slave_address
);
329 writel(0, &twsi
->xtnd_slave_addr
);
330 /* assert STOP but don't care for the result */
331 (void) twsi_stop(adap
, 0);
335 * Begin I2C transaction with expected start status, at given address.
336 * Common to i2c_probe, i2c_read and i2c_write.
337 * Expected address status will derive from direction bit (bit 0) in addr.
339 static int i2c_begin(struct i2c_adapter
*adap
, int expected_start_status
,
342 int status
, expected_addr_status
;
344 /* compute expected address status from direction bit in addr */
345 if (addr
& 1) /* reading */
346 expected_addr_status
= MVTWSI_STATUS_ADDR_R_ACK
;
348 expected_addr_status
= MVTWSI_STATUS_ADDR_W_ACK
;
350 status
= twsi_start(adap
, expected_start_status
);
351 /* send out the address if the start went well */
353 status
= twsi_send(adap
, addr
, expected_addr_status
);
354 /* return ok or status of first failure to caller */
359 * I2C probe called by cmd_i2c when doing 'i2c probe'.
360 * Begin read, nak data byte, end.
362 static int twsi_i2c_probe(struct i2c_adapter
*adap
, uchar chip
)
368 status
= i2c_begin(adap
, MVTWSI_STATUS_START
, (chip
<< 1) | 1);
369 /* dummy read was accepted: receive byte but NAK it. */
371 status
= twsi_recv(adap
, &dummy_byte
);
372 /* Stop transaction */
374 /* return 0 or status of first failure */
379 * I2C read called by cmd_i2c when doing 'i2c read' and by cmd_eeprom.c
380 * Begin write, send address byte(s), begin read, receive data bytes, end.
382 * NOTE: some EEPROMS want a stop right before the second start, while
383 * some will choke if it is there. Deciding which we should do is eeprom
384 * stuff, not i2c, but at the moment the APIs won't let us put it in
385 * cmd_eeprom, so we have to choose here, and for the moment that'll be
386 * a repeated start without a preceding stop.
388 static int twsi_i2c_read(struct i2c_adapter
*adap
, uchar chip
, uint addr
,
389 int alen
, uchar
*data
, int length
)
393 /* begin i2c write to send the address bytes */
394 status
= i2c_begin(adap
, MVTWSI_STATUS_START
, (chip
<< 1));
395 /* send addr bytes */
396 while ((status
== 0) && alen
--)
397 status
= twsi_send(adap
, addr
>> (8*alen
),
398 MVTWSI_STATUS_DATA_W_ACK
);
399 /* begin i2c read to receive eeprom data bytes */
401 status
= i2c_begin(adap
, MVTWSI_STATUS_REPEATED_START
,
403 /* prepare ACK if at least one byte must be received */
405 twsi_control_flags
|= MVTWSI_CONTROL_ACK
;
406 /* now receive actual bytes */
407 while ((status
== 0) && length
--) {
408 /* reset NAK if we if no more to read now */
410 twsi_control_flags
&= ~MVTWSI_CONTROL_ACK
;
411 /* read current byte */
412 status
= twsi_recv(adap
, data
++);
414 /* Stop transaction */
415 status
= twsi_stop(adap
, status
);
416 /* return 0 or status of first failure */
421 * I2C write called by cmd_i2c when doing 'i2c write' and by cmd_eeprom.c
422 * Begin write, send address byte(s), send data bytes, end.
424 static int twsi_i2c_write(struct i2c_adapter
*adap
, uchar chip
, uint addr
,
425 int alen
, uchar
*data
, int length
)
429 /* begin i2c write to send the eeprom adress bytes then data bytes */
430 status
= i2c_begin(adap
, MVTWSI_STATUS_START
, (chip
<< 1));
431 /* send addr bytes */
432 while ((status
== 0) && alen
--)
433 status
= twsi_send(adap
, addr
>> (8*alen
),
434 MVTWSI_STATUS_DATA_W_ACK
);
435 /* send data bytes */
436 while ((status
== 0) && (length
-- > 0))
437 status
= twsi_send(adap
, *(data
++), MVTWSI_STATUS_DATA_W_ACK
);
438 /* Stop transaction */
439 status
= twsi_stop(adap
, status
);
440 /* return 0 or status of first failure */
444 #ifdef CONFIG_I2C_MVTWSI_BASE0
445 U_BOOT_I2C_ADAP_COMPLETE(twsi0
, twsi_i2c_init
, twsi_i2c_probe
,
446 twsi_i2c_read
, twsi_i2c_write
,
447 twsi_i2c_set_bus_speed
,
448 CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
, 0)
450 #ifdef CONFIG_I2C_MVTWSI_BASE1
451 U_BOOT_I2C_ADAP_COMPLETE(twsi1
, twsi_i2c_init
, twsi_i2c_probe
,
452 twsi_i2c_read
, twsi_i2c_write
,
453 twsi_i2c_set_bus_speed
,
454 CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
, 1)
457 #ifdef CONFIG_I2C_MVTWSI_BASE2
458 U_BOOT_I2C_ADAP_COMPLETE(twsi2
, twsi_i2c_init
, twsi_i2c_probe
,
459 twsi_i2c_read
, twsi_i2c_write
,
460 twsi_i2c_set_bus_speed
,
461 CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
, 2)
464 #ifdef CONFIG_I2C_MVTWSI_BASE3
465 U_BOOT_I2C_ADAP_COMPLETE(twsi3
, twsi_i2c_init
, twsi_i2c_probe
,
466 twsi_i2c_read
, twsi_i2c_write
,
467 twsi_i2c_set_bus_speed
,
468 CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
, 3)
471 #ifdef CONFIG_I2C_MVTWSI_BASE4
472 U_BOOT_I2C_ADAP_COMPLETE(twsi4
, twsi_i2c_init
, twsi_i2c_probe
,
473 twsi_i2c_read
, twsi_i2c_write
,
474 twsi_i2c_set_bus_speed
,
475 CONFIG_SYS_I2C_SPEED
, CONFIG_SYS_I2C_SLAVE
, 4)