drivers/i2c/mvtwsi.c

   1 /*
   2  * Driver for the TWSI (i2c) controller found on the Marvell
   3  * orion5x and kirkwood SoC families.
   4  *
   5  * Author: Albert Aribaud <albert.u.boot@aribaud.net>
   6  * Copyright (c) 2010 Albert Aribaud.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <i2c.h>
  13 #include <asm/errno.h>
  14 #include <asm/io.h>
  15
  16 /*
  17  * include a file that will provide CONFIG_I2C_MVTWSI_BASE*
  18  * and possibly other settings
  19  */
  20
  21 #if defined(CONFIG_ORION5X)
  22 #include <asm/arch/orion5x.h>
  23 #elif (defined(CONFIG_KIRKWOOD) || defined(CONFIG_ARCH_MVEBU))
  24 #include <asm/arch/soc.h>
  25 #elif defined(CONFIG_SUNXI)
  26 #include <asm/arch/i2c.h>
  27 #else
  28 #error Driver mvtwsi not supported by SoC or board
  29 #endif
  30
  31 /*
  32  * TWSI register structure
  33  */
  34
  35 #ifdef CONFIG_SUNXI
  36
  37 struct  mvtwsi_registers {
  38         u32 slave_address;
  39         u32 xtnd_slave_addr;
  40         u32 data;
  41         u32 control;
  42         u32 status;
  43         u32 baudrate;
  44         u32 soft_reset;
  45 };
  46
  47 #else
  48
  49 struct  mvtwsi_registers {
  50         u32 slave_address;
  51         u32 data;
  52         u32 control;
  53         union {
  54                 u32 status;     /* when reading */
  55                 u32 baudrate;   /* when writing */
  56         };
  57         u32 xtnd_slave_addr;
  58         u32 reserved[2];
  59         u32 soft_reset;
  60 };
  61
  62 #endif
  63
  64 /*
  65  * enum mvtwsi_ctrl_register_fields - Bit masks for flags in the control
  66  * register
  67  */
  68 enum mvtwsi_ctrl_register_fields {
  69         /* Acknowledge bit */
  70         MVTWSI_CONTROL_ACK      = 0x00000004,
  71         /* Interrupt flag */
  72         MVTWSI_CONTROL_IFLG     = 0x00000008,
  73         /* Stop bit */
  74         MVTWSI_CONTROL_STOP     = 0x00000010,
  75         /* Start bit */
  76         MVTWSI_CONTROL_START    = 0x00000020,
  77         /* I2C enable */
  78         MVTWSI_CONTROL_TWSIEN   = 0x00000040,
  79         /* Interrupt enable */
  80         MVTWSI_CONTROL_INTEN    = 0x00000080,
  81 };
  82
  83 /*
  84  * On sun6i and newer IFLG is a write-clear bit which is cleared by writing 1,
  85  * on other platforms it is a normal r/w bit which is cleared by writing 0.
  86  */
  87
  88 #ifdef CONFIG_SUNXI_GEN_SUN6I
  89 #define MVTWSI_CONTROL_CLEAR_IFLG       0x00000008
  90 #else
  91 #define MVTWSI_CONTROL_CLEAR_IFLG       0x00000000
  92 #endif
  93
  94 /*
  95  * enum mvstwsi_status_values - Possible values of I2C controller's status
  96  * register
  97  *
  98  * Only those statuses expected in normal master operation on
  99  * non-10-bit-address devices are specified.
 100  *
 101  * Every status that's unexpected during normal operation (bus errors,
 102  * arbitration losses, missing ACKs...) is passed back to the caller as an error
 103  * code.
 104  */
 105 enum mvstwsi_status_values {
 106         /* START condition transmitted */
 107         MVTWSI_STATUS_START             = 0x08,
 108         /* Repeated START condition transmitted */
 109         MVTWSI_STATUS_REPEATED_START    = 0x10,
 110         /* Address + write bit transmitted, ACK received */
 111         MVTWSI_STATUS_ADDR_W_ACK        = 0x18,
 112         /* Data transmitted, ACK received */
 113         MVTWSI_STATUS_DATA_W_ACK        = 0x28,
 114         /* Address + read bit transmitted, ACK received */
 115         MVTWSI_STATUS_ADDR_R_ACK        = 0x40,
 116         /* Address + read bit transmitted, ACK not received */
 117         MVTWSI_STATUS_ADDR_R_NAK        = 0x48,
 118         /* Data received, ACK transmitted */
 119         MVTWSI_STATUS_DATA_R_ACK        = 0x50,
 120         /* Data received, ACK not transmitted */
 121         MVTWSI_STATUS_DATA_R_NAK        = 0x58,
 122         /* No relevant status */
 123         MVTWSI_STATUS_IDLE              = 0xF8,
 124 };
 125
 126 /*
 127  * MVTWSI controller base
 128  */
 129
 130 static struct mvtwsi_registers *twsi_get_base(struct i2c_adapter *adap)
 131 {
 132         switch (adap->hwadapnr) {
 133 #ifdef CONFIG_I2C_MVTWSI_BASE0
 134         case 0:
 135                 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE0;
 136 #endif
 137 #ifdef CONFIG_I2C_MVTWSI_BASE1
 138         case 1:
 139                 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE1;
 140 #endif
 141 #ifdef CONFIG_I2C_MVTWSI_BASE2
 142         case 2:
 143                 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE2;
 144 #endif
 145 #ifdef CONFIG_I2C_MVTWSI_BASE3
 146         case 3:
 147                 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE3;
 148 #endif
 149 #ifdef CONFIG_I2C_MVTWSI_BASE4
 150         case 4:
 151                 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE4;
 152 #endif
 153 #ifdef CONFIG_I2C_MVTWSI_BASE5
 154         case 5:
 155                 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE5;
 156 #endif
 157         default:
 158                 printf("Missing mvtwsi controller %d base\n", adap->hwadapnr);
 159                 break;
 160         }
 161
 162         return NULL;
 163 }
 164
 165 /*
 166  * enum mvtwsi_error_class - types of I2C errors
 167  */
 168 enum mvtwsi_error_class {
 169         /* The controller returned a different status than expected */
 170         MVTWSI_ERROR_WRONG_STATUS       = 0x01,
 171         /* The controller timed out */
 172         MVTWSI_ERROR_TIMEOUT            = 0x02,
 173 };
 174
 175 /*
 176  * mvtwsi_error() - Build I2C return code from error information
 177  *
 178  * For debugging purposes, this function packs some information of an occurred
 179  * error into a return code. These error codes are returned from I2C API
 180  * functions (i2c_{read,write}, dm_i2c_{read,write}, etc.).
 181  *
 182  * @ec:         The error class of the error (enum mvtwsi_error_class).
 183  * @lc:         The last value of the control register.
 184  * @ls:         The last value of the status register.
 185  * @es:         The expected value of the status register.
 186  * @return The generated error code.
 187  */
 188 inline uint mvtwsi_error(uint ec, uint lc, uint ls, uint es)
 189 {
 190         return ((ec << 24) & 0xFF000000)
 191                | ((lc << 16) & 0x00FF0000)
 192                | ((ls << 8) & 0x0000FF00)
 193                | (es & 0xFF);
 194 }
 195
 196 /*
 197  * Wait for IFLG to raise, or return 'timeout'; then if status is as expected,
 198  * return 0 (ok) or return 'wrong status'.
 199  */
 200 static int twsi_wait(struct i2c_adapter *adap, int expected_status)
 201 {
 202         struct mvtwsi_registers *twsi = twsi_get_base(adap);
 203         int control, status;
 204         int timeout = 1000;
 205
 206         do {
 207                 control = readl(&twsi->control);
 208                 if (control & MVTWSI_CONTROL_IFLG) {
 209                         status = readl(&twsi->status);
 210                         if (status == expected_status)
 211                                 return 0;
 212                         else
 213                                 return mvtwsi_error(
 214                                         MVTWSI_ERROR_WRONG_STATUS,
 215                                         control, status, expected_status);
 216                 }
 217                 udelay(10); /* one clock cycle at 100 kHz */
 218         } while (timeout--);
 219         status = readl(&twsi->status);
 220         return mvtwsi_error(MVTWSI_ERROR_TIMEOUT, control, status,
 221                             expected_status);
 222 }
 223
 224 /*
 225  * Assert the START condition, either in a single I2C transaction
 226  * or inside back-to-back ones (repeated starts).
 227  */
 228 static int twsi_start(struct i2c_adapter *adap, int expected_status, u8 *flags)
 229 {
 230         struct mvtwsi_registers *twsi = twsi_get_base(adap);
 231
 232         /* globally set TWSIEN in case it was not */
 233         *flags |= MVTWSI_CONTROL_TWSIEN;
 234         /* assert START */
 235         writel(*flags | MVTWSI_CONTROL_START |
 236                                     MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
 237         /* wait for controller to process START */
 238         return twsi_wait(adap, expected_status);
 239 }
 240
 241 /*
 242  * Send a byte (i2c address or data).
 243  */
 244 static int twsi_send(struct i2c_adapter *adap, u8 byte, int expected_status,
 245                      u8 *flags)
 246 {
 247         struct mvtwsi_registers *twsi = twsi_get_base(adap);
 248
 249         /* put byte in data register for sending */
 250         writel(byte, &twsi->data);
 251         /* clear any pending interrupt -- that'll cause sending */
 252         writel(*flags | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
 253         /* wait for controller to receive byte and check ACK */
 254         return twsi_wait(adap, expected_status);
 255 }
 256
 257 /*
 258  * Receive a byte.
 259  * Global mvtwsi_control_flags variable says if we should ack or nak.
 260  */
 261 static int twsi_recv(struct i2c_adapter *adap, u8 *byte, u8 *flags)
 262 {
 263         struct mvtwsi_registers *twsi = twsi_get_base(adap);
 264         int expected_status, status;
 265
 266         /* compute expected status based on ACK bit in global control flags */
 267         if (*flags & MVTWSI_CONTROL_ACK)
 268                 expected_status = MVTWSI_STATUS_DATA_R_ACK;
 269         else
 270                 expected_status = MVTWSI_STATUS_DATA_R_NAK;
 271         /* acknowledge *previous state* and launch receive */
 272         writel(*flags | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
 273         /* wait for controller to receive byte and assert ACK or NAK */
 274         status = twsi_wait(adap, expected_status);
 275         /* if we did receive expected byte then store it */
 276         if (status == 0)
 277                 *byte = readl(&twsi->data);
 278         /* return status */
 279         return status;
 280 }
 281
 282 /*
 283  * Assert the STOP condition.
 284  * This is also used to force the bus back in idle (SDA=SCL=1).
 285  */
 286 static int twsi_stop(struct i2c_adapter *adap, int status)
 287 {
 288         struct mvtwsi_registers *twsi = twsi_get_base(adap);
 289         int control, stop_status;
 290         int timeout = 1000;
 291
 292         /* assert STOP */
 293         control = MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_STOP;
 294         writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
 295         /* wait for IDLE; IFLG won't rise so twsi_wait() is no use. */
 296         do {
 297                 stop_status = readl(&twsi->status);
 298                 if (stop_status == MVTWSI_STATUS_IDLE)
 299                         break;
 300                 udelay(10); /* one clock cycle at 100 kHz */
 301         } while (timeout--);
 302         control = readl(&twsi->control);
 303         if (stop_status != MVTWSI_STATUS_IDLE)
 304                 if (status == 0)
 305                         status = mvtwsi_error(
 306                                 MVTWSI_ERROR_TIMEOUT,
 307                                 control, status, MVTWSI_STATUS_IDLE);
 308         return status;
 309 }
 310
 311 static unsigned int twsi_calc_freq(const int n, const int m)
 312 {
 313 #ifdef CONFIG_SUNXI
 314         return CONFIG_SYS_TCLK / (10 * (m + 1) * (1 << n));
 315 #else
 316         return CONFIG_SYS_TCLK / (10 * (m + 1) * (2 << n));
 317 #endif
 318 }
 319
 320 /*
 321  * Reset controller.
 322  * Controller reset also resets the baud rate and slave address, so
 323  * they must be re-established afterwards.
 324  */
 325 static void twsi_reset(struct i2c_adapter *adap)
 326 {
 327         struct mvtwsi_registers *twsi = twsi_get_base(adap);
 328
 329         /* reset controller */
 330         writel(0, &twsi->soft_reset);
 331         /* wait 2 ms -- this is what the Marvell LSP does */
 332         udelay(20000);
 333 }
 334
 335 /*
 336  * I2C init called by cmd_i2c when doing 'i2c reset'.
 337  * Sets baud to the highest possible value not exceeding requested one.
 338  */
 339 static unsigned int twsi_i2c_set_bus_speed(struct i2c_adapter *adap,
 340                                            unsigned int requested_speed)
 341 {
 342         struct mvtwsi_registers *twsi = twsi_get_base(adap);
 343         unsigned int tmp_speed, highest_speed, n, m;
 344         unsigned int baud = 0x44; /* baudrate at controller reset */
 345
 346         /* use actual speed to collect progressively higher values */
 347         highest_speed = 0;
 348         /* compute m, n setting for highest speed not above requested speed */
 349         for (n = 0; n < 8; n++) {
 350                 for (m = 0; m < 16; m++) {
 351                         tmp_speed = twsi_calc_freq(n, m);
 352                         if ((tmp_speed <= requested_speed) &&
 353                             (tmp_speed > highest_speed)) {
 354                                 highest_speed = tmp_speed;
 355                                 baud = (m << 3) | n;
 356                         }
 357                 }
 358         }
 359         writel(baud, &twsi->baudrate);
 360         return 0;
 361 }
 362
 363 static void twsi_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
 364 {
 365         struct mvtwsi_registers *twsi = twsi_get_base(adap);
 366
 367         /* reset controller */
 368         twsi_reset(adap);
 369         /* set speed */
 370         twsi_i2c_set_bus_speed(adap, speed);
 371         /* set slave address even though we don't use it */
 372         writel(slaveadd, &twsi->slave_address);
 373         writel(0, &twsi->xtnd_slave_addr);
 374         /* assert STOP but don't care for the result */
 375         (void) twsi_stop(adap, 0);
 376 }
 377
 378 /*
 379  * Begin I2C transaction with expected start status, at given address.
 380  * Common to i2c_probe, i2c_read and i2c_write.
 381  * Expected address status will derive from direction bit (bit 0) in addr.
 382  */
 383 static int i2c_begin(struct i2c_adapter *adap, int expected_start_status,
 384                      u8 addr, u8 *flags)
 385 {
 386         int status, expected_addr_status;
 387
 388         /* compute expected address status from direction bit in addr */
 389         if (addr & 1) /* reading */
 390                 expected_addr_status = MVTWSI_STATUS_ADDR_R_ACK;
 391         else /* writing */
 392                 expected_addr_status = MVTWSI_STATUS_ADDR_W_ACK;
 393         /* assert START */
 394         status = twsi_start(adap, expected_start_status, flags);
 395         /* send out the address if the start went well */
 396         if (status == 0)
 397                 status = twsi_send(adap, addr, expected_addr_status,
 398                                    flags);
 399         /* return ok or status of first failure to caller */
 400         return status;
 401 }
 402
 403 /*
 404  * I2C probe called by cmd_i2c when doing 'i2c probe'.
 405  * Begin read, nak data byte, end.
 406  */
 407 static int twsi_i2c_probe(struct i2c_adapter *adap, uchar chip)
 408 {
 409         u8 dummy_byte;
 410         u8 flags = 0;
 411         int status;
 412
 413         /* begin i2c read */
 414         status = i2c_begin(adap, MVTWSI_STATUS_START, (chip << 1) | 1, &flags);
 415         /* dummy read was accepted: receive byte but NAK it. */
 416         if (status == 0)
 417                 status = twsi_recv(adap, &dummy_byte, &flags);
 418         /* Stop transaction */
 419         twsi_stop(adap, 0);
 420         /* return 0 or status of first failure */
 421         return status;
 422 }
 423
 424 /*
 425  * I2C read called by cmd_i2c when doing 'i2c read' and by cmd_eeprom.c
 426  * Begin write, send address byte(s), begin read, receive data bytes, end.
 427  *
 428  * NOTE: some EEPROMS want a stop right before the second start, while
 429  * some will choke if it is there. Deciding which we should do is eeprom
 430  * stuff, not i2c, but at the moment the APIs won't let us put it in
 431  * cmd_eeprom, so we have to choose here, and for the moment that'll be
 432  * a repeated start without a preceding stop.
 433  */
 434 static int twsi_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
 435                         int alen, uchar *data, int length)
 436 {
 437         int status;
 438         u8 flags = 0;
 439
 440         /* begin i2c write to send the address bytes */
 441         status = i2c_begin(adap, MVTWSI_STATUS_START, (chip << 1), &flags);
 442         /* send addr bytes */
 443         while ((status == 0) && alen--)
 444                 status = twsi_send(adap, addr >> (8*alen),
 445                         MVTWSI_STATUS_DATA_W_ACK, &flags);
 446         /* begin i2c read to receive eeprom data bytes */
 447         if (status == 0)
 448                 status = i2c_begin(adap, MVTWSI_STATUS_REPEATED_START,
 449                                    (chip << 1) | 1, &flags);
 450         /* prepare ACK if at least one byte must be received */
 451         if (length > 0)
 452                 flags |= MVTWSI_CONTROL_ACK;
 453         /* now receive actual bytes */
 454         while ((status == 0) && length--) {
 455                 /* reset NAK if we if no more to read now */
 456                 if (length == 0)
 457                         flags &= ~MVTWSI_CONTROL_ACK;
 458                 /* read current byte */
 459                 status = twsi_recv(adap, data++, &flags);
 460         }
 461         /* Stop transaction */
 462         status = twsi_stop(adap, status);
 463         /* return 0 or status of first failure */
 464         return status;
 465 }
 466
 467 /*
 468  * I2C write called by cmd_i2c when doing 'i2c write' and by cmd_eeprom.c
 469  * Begin write, send address byte(s), send data bytes, end.
 470  */
 471 static int twsi_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
 472                         int alen, uchar *data, int length)
 473 {
 474         int status;
 475         u8 flags = 0;
 476
 477         /* begin i2c write to send the eeprom adress bytes then data bytes */
 478         status = i2c_begin(adap, MVTWSI_STATUS_START, (chip << 1), &flags);
 479         /* send addr bytes */
 480         while ((status == 0) && alen--)
 481                 status = twsi_send(adap, addr >> (8*alen),
 482                         MVTWSI_STATUS_DATA_W_ACK, &flags);
 483         /* send data bytes */
 484         while ((status == 0) && (length-- > 0))
 485                 status = twsi_send(adap, *(data++), MVTWSI_STATUS_DATA_W_ACK,
 486                                    &flags);
 487         /* Stop transaction */
 488         status = twsi_stop(adap, status);
 489         /* return 0 or status of first failure */
 490         return status;
 491 }
 492
 493 #ifdef CONFIG_I2C_MVTWSI_BASE0
 494 U_BOOT_I2C_ADAP_COMPLETE(twsi0, twsi_i2c_init, twsi_i2c_probe,
 495                          twsi_i2c_read, twsi_i2c_write,
 496                          twsi_i2c_set_bus_speed,
 497                          CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0)
 498 #endif
 499 #ifdef CONFIG_I2C_MVTWSI_BASE1
 500 U_BOOT_I2C_ADAP_COMPLETE(twsi1, twsi_i2c_init, twsi_i2c_probe,
 501                          twsi_i2c_read, twsi_i2c_write,
 502                          twsi_i2c_set_bus_speed,
 503                          CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 1)
 504
 505 #endif
 506 #ifdef CONFIG_I2C_MVTWSI_BASE2
 507 U_BOOT_I2C_ADAP_COMPLETE(twsi2, twsi_i2c_init, twsi_i2c_probe,
 508                          twsi_i2c_read, twsi_i2c_write,
 509                          twsi_i2c_set_bus_speed,
 510                          CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 2)
 511
 512 #endif
 513 #ifdef CONFIG_I2C_MVTWSI_BASE3
 514 U_BOOT_I2C_ADAP_COMPLETE(twsi3, twsi_i2c_init, twsi_i2c_probe,
 515                          twsi_i2c_read, twsi_i2c_write,
 516                          twsi_i2c_set_bus_speed,
 517                          CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 3)
 518
 519 #endif
 520 #ifdef CONFIG_I2C_MVTWSI_BASE4
 521 U_BOOT_I2C_ADAP_COMPLETE(twsi4, twsi_i2c_init, twsi_i2c_probe,
 522                          twsi_i2c_read, twsi_i2c_write,
 523                          twsi_i2c_set_bus_speed,
 524                          CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 4)
 525
 526 #endif
 527 #ifdef CONFIG_I2C_MVTWSI_BASE5
 528 U_BOOT_I2C_ADAP_COMPLETE(twsi5, twsi_i2c_init, twsi_i2c_probe,
 529                          twsi_i2c_read, twsi_i2c_write,
 530                          twsi_i2c_set_bus_speed,
 531                          CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 5)
 532
 533 #endif