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[people/ms/u-boot.git] / drivers / mmc / rockchip_dw_mmc.c
1 /*
2 * Copyright (c) 2013 Google, Inc
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #include <common.h>
8 #include <clk.h>
9 #include <dm.h>
10 #include <dt-structs.h>
11 #include <dwmmc.h>
12 #include <errno.h>
13 #include <mapmem.h>
14 #include <pwrseq.h>
15 #include <syscon.h>
16 #include <asm/gpio.h>
17 #include <asm/arch/clock.h>
18 #include <asm/arch/periph.h>
19 #include <linux/err.h>
20
21 DECLARE_GLOBAL_DATA_PTR;
22
23 struct rockchip_mmc_plat {
24 #if CONFIG_IS_ENABLED(OF_PLATDATA)
25 struct dtd_rockchip_rk3288_dw_mshc dtplat;
26 #endif
27 struct mmc_config cfg;
28 struct mmc mmc;
29 };
30
31 struct rockchip_dwmmc_priv {
32 struct clk clk;
33 struct dwmci_host host;
34 int fifo_depth;
35 bool fifo_mode;
36 u32 minmax[2];
37 };
38
39 static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
40 {
41 struct udevice *dev = host->priv;
42 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
43 int ret;
44
45 ret = clk_set_rate(&priv->clk, freq);
46 if (ret < 0) {
47 debug("%s: err=%d\n", __func__, ret);
48 return ret;
49 }
50
51 return freq;
52 }
53
54 static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
55 {
56 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
57 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
58 struct dwmci_host *host = &priv->host;
59
60 host->name = dev->name;
61 host->ioaddr = (void *)dev_get_addr(dev);
62 host->buswidth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
63 "bus-width", 4);
64 host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
65 host->priv = dev;
66
67 /* use non-removeable as sdcard and emmc as judgement */
68 if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "non-removable"))
69 host->dev_index = 0;
70 else
71 host->dev_index = 1;
72
73 priv->fifo_depth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
74 "fifo-depth", 0);
75 if (priv->fifo_depth < 0)
76 return -EINVAL;
77 priv->fifo_mode = fdtdec_get_bool(gd->fdt_blob, dev->of_offset,
78 "fifo-mode");
79 if (fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
80 "clock-freq-min-max", priv->minmax, 2))
81 return -EINVAL;
82 #endif
83 return 0;
84 }
85
86 static int rockchip_dwmmc_probe(struct udevice *dev)
87 {
88 struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
89 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
90 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
91 struct dwmci_host *host = &priv->host;
92 struct udevice *pwr_dev __maybe_unused;
93 int ret;
94
95 #if CONFIG_IS_ENABLED(OF_PLATDATA)
96 struct dtd_rockchip_rk3288_dw_mshc *dtplat = &plat->dtplat;
97
98 host->name = dev->name;
99 host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
100 host->buswidth = dtplat->bus_width;
101 host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
102 host->priv = dev;
103 host->dev_index = 0;
104 priv->fifo_depth = dtplat->fifo_depth;
105 priv->fifo_mode = 0;
106 memcpy(priv->minmax, dtplat->clock_freq_min_max, sizeof(priv->minmax));
107
108 ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->clk);
109 if (ret < 0)
110 return ret;
111 #else
112 ret = clk_get_by_index(dev, 0, &priv->clk);
113 if (ret < 0)
114 return ret;
115 #endif
116 host->fifoth_val = MSIZE(0x2) |
117 RX_WMARK(priv->fifo_depth / 2 - 1) |
118 TX_WMARK(priv->fifo_depth / 2);
119
120 host->fifo_mode = priv->fifo_mode;
121
122 #ifdef CONFIG_PWRSEQ
123 /* Enable power if needed */
124 ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq",
125 &pwr_dev);
126 if (!ret) {
127 ret = pwrseq_set_power(pwr_dev, true);
128 if (ret)
129 return ret;
130 }
131 #endif
132 dwmci_setup_cfg(&plat->cfg, dev->name, host->buswidth, host->caps,
133 priv->minmax[1], priv->minmax[0]);
134 host->mmc = &plat->mmc;
135 host->mmc->priv = &priv->host;
136 host->mmc->dev = dev;
137 upriv->mmc = host->mmc;
138
139 return dwmci_probe(dev);
140 }
141
142 static int rockchip_dwmmc_bind(struct udevice *dev)
143 {
144 struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
145 int ret;
146
147 ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
148 if (ret)
149 return ret;
150
151 return 0;
152 }
153
154 static const struct udevice_id rockchip_dwmmc_ids[] = {
155 { .compatible = "rockchip,rk3288-dw-mshc" },
156 { }
157 };
158
159 U_BOOT_DRIVER(rockchip_dwmmc_drv) = {
160 .name = "rockchip_rk3288_dw_mshc",
161 .id = UCLASS_MMC,
162 .of_match = rockchip_dwmmc_ids,
163 .ofdata_to_platdata = rockchip_dwmmc_ofdata_to_platdata,
164 .ops = &dm_dwmci_ops,
165 .bind = rockchip_dwmmc_bind,
166 .probe = rockchip_dwmmc_probe,
167 .priv_auto_alloc_size = sizeof(struct rockchip_dwmmc_priv),
168 .platdata_auto_alloc_size = sizeof(struct rockchip_mmc_plat),
169 };
170
171 #ifdef CONFIG_PWRSEQ
172 static int rockchip_dwmmc_pwrseq_set_power(struct udevice *dev, bool enable)
173 {
174 struct gpio_desc reset;
175 int ret;
176
177 ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT);
178 if (ret)
179 return ret;
180 dm_gpio_set_value(&reset, 1);
181 udelay(1);
182 dm_gpio_set_value(&reset, 0);
183 udelay(200);
184
185 return 0;
186 }
187
188 static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops = {
189 .set_power = rockchip_dwmmc_pwrseq_set_power,
190 };
191
192 static const struct udevice_id rockchip_dwmmc_pwrseq_ids[] = {
193 { .compatible = "mmc-pwrseq-emmc" },
194 { }
195 };
196
197 U_BOOT_DRIVER(rockchip_dwmmc_pwrseq_drv) = {
198 .name = "mmc_pwrseq_emmc",
199 .id = UCLASS_PWRSEQ,
200 .of_match = rockchip_dwmmc_pwrseq_ids,
201 .ops = &rockchip_dwmmc_pwrseq_ops,
202 };
203 #endif