]> git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/mtd/cfi_flash.c
projects / people / ms / u-boot.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
imx: Get fec mac address from fuse
[people/ms/u-boot.git] / drivers / mtd / cfi_flash.c
1 /*
2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
7 *
8 * Copyright (C) 2004
9 * Ed Okerson
10 *
11 * Copyright (C) 2006
12 * Tolunay Orkun <listmember@orkun.us>
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
32 */
33
34 /* The DEBUG define must be before common to enable debugging */
35 /* #define DEBUG */
36
37 #include <common.h>
38 #include <asm/processor.h>
39 #include <asm/io.h>
40 #include <asm/byteorder.h>
41 #include <environment.h>
42 #include <mtd/cfi_flash.h>
43
44 /*
45 * This file implements a Common Flash Interface (CFI) driver for
46 * U-Boot.
47 *
48 * The width of the port and the width of the chips are determined at
49 * initialization. These widths are used to calculate the address for
50 * access CFI data structures.
51 *
52 * References
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
57 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
60 *
61 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
62 * reading and writing ... (yes there is such a Hardware).
63 */
64
65 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
66 static uint flash_verbose = 1;
67
68 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
69
70 /*
71 * Check if chip width is defined. If not, start detecting with 8bit.
72 */
73 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
74 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
75 #endif
76
77 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
78 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
79 #endif
80
81 static phys_addr_t __cfi_flash_bank_addr(int i)
82 {
83 return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
84 }
85 phys_addr_t cfi_flash_bank_addr(int i)
86 __attribute__((weak, alias("__cfi_flash_bank_addr")));
87
88 static unsigned long __cfi_flash_bank_size(int i)
89 {
90 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
91 return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
92 #else
93 return 0;
94 #endif
95 }
96 unsigned long cfi_flash_bank_size(int i)
97 __attribute__((weak, alias("__cfi_flash_bank_size")));
98
99 static void __flash_write8(u8 value, void *addr)
100 {
101 __raw_writeb(value, addr);
102 }
103
104 static void __flash_write16(u16 value, void *addr)
105 {
106 __raw_writew(value, addr);
107 }
108
109 static void __flash_write32(u32 value, void *addr)
110 {
111 __raw_writel(value, addr);
112 }
113
114 static void __flash_write64(u64 value, void *addr)
115 {
116 /* No architectures currently implement __raw_writeq() */
117 *(volatile u64 *)addr = value;
118 }
119
120 static u8 __flash_read8(void *addr)
121 {
122 return __raw_readb(addr);
123 }
124
125 static u16 __flash_read16(void *addr)
126 {
127 return __raw_readw(addr);
128 }
129
130 static u32 __flash_read32(void *addr)
131 {
132 return __raw_readl(addr);
133 }
134
135 static u64 __flash_read64(void *addr)
136 {
137 /* No architectures currently implement __raw_readq() */
138 return *(volatile u64 *)addr;
139 }
140
141 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
142 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
143 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
144 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
145 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
146 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
147 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
148 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
149 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
150 #else
151 #define flash_write8 __flash_write8
152 #define flash_write16 __flash_write16
153 #define flash_write32 __flash_write32
154 #define flash_write64 __flash_write64
155 #define flash_read8 __flash_read8
156 #define flash_read16 __flash_read16
157 #define flash_read32 __flash_read32
158 #define flash_read64 __flash_read64
159 #endif
160
161 /*-----------------------------------------------------------------------
162 */
163 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
164 flash_info_t *flash_get_info(ulong base)
165 {
166 int i;
167 flash_info_t *info = NULL;
168
169 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
170 info = & flash_info[i];
171 if (info->size && info->start[0] <= base &&
172 base <= info->start[0] + info->size - 1)
173 break;
174 }
175
176 return info;
177 }
178 #endif
179
180 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
181 {
182 if (sect != (info->sector_count - 1))
183 return info->start[sect + 1] - info->start[sect];
184 else
185 return info->start[0] + info->size - info->start[sect];
186 }
187
188 /*-----------------------------------------------------------------------
189 * create an address based on the offset and the port width
190 */
191 static inline void *
192 flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
193 {
194 unsigned int byte_offset = offset * info->portwidth;
195
196 return (void *)(info->start[sect] + byte_offset);
197 }
198
199 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
200 unsigned int offset, void *addr)
201 {
202 }
203
204 /*-----------------------------------------------------------------------
205 * make a proper sized command based on the port and chip widths
206 */
207 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
208 {
209 int i;
210 int cword_offset;
211 int cp_offset;
212 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
213 u32 cmd_le = cpu_to_le32(cmd);
214 #endif
215 uchar val;
216 uchar *cp = (uchar *) cmdbuf;
217
218 for (i = info->portwidth; i > 0; i--){
219 cword_offset = (info->portwidth-i)%info->chipwidth;
220 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
221 cp_offset = info->portwidth - i;
222 val = *((uchar*)&cmd_le + cword_offset);
223 #else
224 cp_offset = i - 1;
225 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
226 #endif
227 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
228 }
229 }
230
231 #ifdef DEBUG
232 /*-----------------------------------------------------------------------
233 * Debug support
234 */
235 static void print_longlong (char *str, unsigned long long data)
236 {
237 int i;
238 char *cp;
239
240 cp = (char *) &data;
241 for (i = 0; i < 8; i++)
242 sprintf (&str[i * 2], "%2.2x", *cp++);
243 }
244
245 static void flash_printqry (struct cfi_qry *qry)
246 {
247 u8 *p = (u8 *)qry;
248 int x, y;
249
250 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
251 debug("%02x : ", x);
252 for (y = 0; y < 16; y++)
253 debug("%2.2x ", p[x + y]);
254 debug(" ");
255 for (y = 0; y < 16; y++) {
256 unsigned char c = p[x + y];
257 if (c >= 0x20 && c <= 0x7e)
258 debug("%c", c);
259 else
260 debug(".");
261 }
262 debug("\n");
263 }
264 }
265 #endif
266
267
268 /*-----------------------------------------------------------------------
269 * read a character at a port width address
270 */
271 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
272 {
273 uchar *cp;
274 uchar retval;
275
276 cp = flash_map (info, 0, offset);
277 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
278 retval = flash_read8(cp);
279 #else
280 retval = flash_read8(cp + info->portwidth - 1);
281 #endif
282 flash_unmap (info, 0, offset, cp);
283 return retval;
284 }
285
286 /*-----------------------------------------------------------------------
287 * read a word at a port width address, assume 16bit bus
288 */
289 static inline ushort flash_read_word (flash_info_t * info, uint offset)
290 {
291 ushort *addr, retval;
292
293 addr = flash_map (info, 0, offset);
294 retval = flash_read16 (addr);
295 flash_unmap (info, 0, offset, addr);
296 return retval;
297 }
298
299
300 /*-----------------------------------------------------------------------
301 * read a long word by picking the least significant byte of each maximum
302 * port size word. Swap for ppc format.
303 */
304 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
305 uint offset)
306 {
307 uchar *addr;
308 ulong retval;
309
310 #ifdef DEBUG
311 int x;
312 #endif
313 addr = flash_map (info, sect, offset);
314
315 #ifdef DEBUG
316 debug ("long addr is at %p info->portwidth = %d\n", addr,
317 info->portwidth);
318 for (x = 0; x < 4 * info->portwidth; x++) {
319 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
320 }
321 #endif
322 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
323 retval = ((flash_read8(addr) << 16) |
324 (flash_read8(addr + info->portwidth) << 24) |
325 (flash_read8(addr + 2 * info->portwidth)) |
326 (flash_read8(addr + 3 * info->portwidth) << 8));
327 #else
328 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
329 (flash_read8(addr + info->portwidth - 1) << 16) |
330 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
331 (flash_read8(addr + 3 * info->portwidth - 1)));
332 #endif
333 flash_unmap(info, sect, offset, addr);
334
335 return retval;
336 }
337
338 /*
339 * Write a proper sized command to the correct address
340 */
341 void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
342 uint offset, u32 cmd)
343 {
344
345 void *addr;
346 cfiword_t cword;
347
348 addr = flash_map (info, sect, offset);
349 flash_make_cmd (info, cmd, &cword);
350 switch (info->portwidth) {
351 case FLASH_CFI_8BIT:
352 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
353 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
354 flash_write8(cword.c, addr);
355 break;
356 case FLASH_CFI_16BIT:
357 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
358 cmd, cword.w,
359 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
360 flash_write16(cword.w, addr);
361 break;
362 case FLASH_CFI_32BIT:
363 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
364 cmd, cword.l,
365 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
366 flash_write32(cword.l, addr);
367 break;
368 case FLASH_CFI_64BIT:
369 #ifdef DEBUG
370 {
371 char str[20];
372
373 print_longlong (str, cword.ll);
374
375 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
376 addr, cmd, str,
377 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
378 }
379 #endif
380 flash_write64(cword.ll, addr);
381 break;
382 }
383
384 /* Ensure all the instructions are fully finished */
385 sync();
386
387 flash_unmap(info, sect, offset, addr);
388 }
389
390 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
391 {
392 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
393 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
394 }
395
396 /*-----------------------------------------------------------------------
397 */
398 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
399 uint offset, uchar cmd)
400 {
401 void *addr;
402 cfiword_t cword;
403 int retval;
404
405 addr = flash_map (info, sect, offset);
406 flash_make_cmd (info, cmd, &cword);
407
408 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
409 switch (info->portwidth) {
410 case FLASH_CFI_8BIT:
411 debug ("is= %x %x\n", flash_read8(addr), cword.c);
412 retval = (flash_read8(addr) == cword.c);
413 break;
414 case FLASH_CFI_16BIT:
415 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
416 retval = (flash_read16(addr) == cword.w);
417 break;
418 case FLASH_CFI_32BIT:
419 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
420 retval = (flash_read32(addr) == cword.l);
421 break;
422 case FLASH_CFI_64BIT:
423 #ifdef DEBUG
424 {
425 char str1[20];
426 char str2[20];
427
428 print_longlong (str1, flash_read64(addr));
429 print_longlong (str2, cword.ll);
430 debug ("is= %s %s\n", str1, str2);
431 }
432 #endif
433 retval = (flash_read64(addr) == cword.ll);
434 break;
435 default:
436 retval = 0;
437 break;
438 }
439 flash_unmap(info, sect, offset, addr);
440
441 return retval;
442 }
443
444 /*-----------------------------------------------------------------------
445 */
446 static int flash_isset (flash_info_t * info, flash_sect_t sect,
447 uint offset, uchar cmd)
448 {
449 void *addr;
450 cfiword_t cword;
451 int retval;
452
453 addr = flash_map (info, sect, offset);
454 flash_make_cmd (info, cmd, &cword);
455 switch (info->portwidth) {
456 case FLASH_CFI_8BIT:
457 retval = ((flash_read8(addr) & cword.c) == cword.c);
458 break;
459 case FLASH_CFI_16BIT:
460 retval = ((flash_read16(addr) & cword.w) == cword.w);
461 break;
462 case FLASH_CFI_32BIT:
463 retval = ((flash_read32(addr) & cword.l) == cword.l);
464 break;
465 case FLASH_CFI_64BIT:
466 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
467 break;
468 default:
469 retval = 0;
470 break;
471 }
472 flash_unmap(info, sect, offset, addr);
473
474 return retval;
475 }
476
477 /*-----------------------------------------------------------------------
478 */
479 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
480 uint offset, uchar cmd)
481 {
482 void *addr;
483 cfiword_t cword;
484 int retval;
485
486 addr = flash_map (info, sect, offset);
487 flash_make_cmd (info, cmd, &cword);
488 switch (info->portwidth) {
489 case FLASH_CFI_8BIT:
490 retval = flash_read8(addr) != flash_read8(addr);
491 break;
492 case FLASH_CFI_16BIT:
493 retval = flash_read16(addr) != flash_read16(addr);
494 break;
495 case FLASH_CFI_32BIT:
496 retval = flash_read32(addr) != flash_read32(addr);
497 break;
498 case FLASH_CFI_64BIT:
499 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
500 (flash_read32(addr+4) != flash_read32(addr+4)) );
501 break;
502 default:
503 retval = 0;
504 break;
505 }
506 flash_unmap(info, sect, offset, addr);
507
508 return retval;
509 }
510
511 /*
512 * flash_is_busy - check to see if the flash is busy
513 *
514 * This routine checks the status of the chip and returns true if the
515 * chip is busy.
516 */
517 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
518 {
519 int retval;
520
521 switch (info->vendor) {
522 case CFI_CMDSET_INTEL_PROG_REGIONS:
523 case CFI_CMDSET_INTEL_STANDARD:
524 case CFI_CMDSET_INTEL_EXTENDED:
525 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
526 break;
527 case CFI_CMDSET_AMD_STANDARD:
528 case CFI_CMDSET_AMD_EXTENDED:
529 #ifdef CONFIG_FLASH_CFI_LEGACY
530 case CFI_CMDSET_AMD_LEGACY:
531 #endif
532 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
533 break;
534 default:
535 retval = 0;
536 }
537 debug ("flash_is_busy: %d\n", retval);
538 return retval;
539 }
540
541 /*-----------------------------------------------------------------------
542 * wait for XSR.7 to be set. Time out with an error if it does not.
543 * This routine does not set the flash to read-array mode.
544 */
545 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
546 ulong tout, char *prompt)
547 {
548 ulong start;
549
550 #if CONFIG_SYS_HZ != 1000
551 if ((ulong)CONFIG_SYS_HZ > 100000)
552 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
553 else
554 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
555 #endif
556
557 /* Wait for command completion */
558 reset_timer();
559 start = get_timer (0);
560 while (flash_is_busy (info, sector)) {
561 if (get_timer (start) > tout) {
562 printf ("Flash %s timeout at address %lx data %lx\n",
563 prompt, info->start[sector],
564 flash_read_long (info, sector, 0));
565 flash_write_cmd (info, sector, 0, info->cmd_reset);
566 return ERR_TIMOUT;
567 }
568 udelay (1); /* also triggers watchdog */
569 }
570 return ERR_OK;
571 }
572
573 /*-----------------------------------------------------------------------
574 * Wait for XSR.7 to be set, if it times out print an error, otherwise
575 * do a full status check.
576 *
577 * This routine sets the flash to read-array mode.
578 */
579 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
580 ulong tout, char *prompt)
581 {
582 int retcode;
583
584 retcode = flash_status_check (info, sector, tout, prompt);
585 switch (info->vendor) {
586 case CFI_CMDSET_INTEL_PROG_REGIONS:
587 case CFI_CMDSET_INTEL_EXTENDED:
588 case CFI_CMDSET_INTEL_STANDARD:
589 if ((retcode != ERR_OK)
590 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
591 retcode = ERR_INVAL;
592 printf ("Flash %s error at address %lx\n", prompt,
593 info->start[sector]);
594 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
595 FLASH_STATUS_PSLBS)) {
596 puts ("Command Sequence Error.\n");
597 } else if (flash_isset (info, sector, 0,
598 FLASH_STATUS_ECLBS)) {
599 puts ("Block Erase Error.\n");
600 retcode = ERR_NOT_ERASED;
601 } else if (flash_isset (info, sector, 0,
602 FLASH_STATUS_PSLBS)) {
603 puts ("Locking Error\n");
604 }
605 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
606 puts ("Block locked.\n");
607 retcode = ERR_PROTECTED;
608 }
609 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
610 puts ("Vpp Low Error.\n");
611 }
612 flash_write_cmd (info, sector, 0, info->cmd_reset);
613 break;
614 default:
615 break;
616 }
617 return retcode;
618 }
619
620 static int use_flash_status_poll(flash_info_t *info)
621 {
622 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
623 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
624 info->vendor == CFI_CMDSET_AMD_STANDARD)
625 return 1;
626 #endif
627 return 0;
628 }
629
630 static int flash_status_poll(flash_info_t *info, void *src, void *dst,
631 ulong tout, char *prompt)
632 {
633 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
634 ulong start;
635 int ready;
636
637 #if CONFIG_SYS_HZ != 1000
638 if ((ulong)CONFIG_SYS_HZ > 100000)
639 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
640 else
641 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
642 #endif
643
644 /* Wait for command completion */
645 reset_timer();
646 start = get_timer(0);
647 while (1) {
648 switch (info->portwidth) {
649 case FLASH_CFI_8BIT:
650 ready = flash_read8(dst) == flash_read8(src);
651 break;
652 case FLASH_CFI_16BIT:
653 ready = flash_read16(dst) == flash_read16(src);
654 break;
655 case FLASH_CFI_32BIT:
656 ready = flash_read32(dst) == flash_read32(src);
657 break;
658 case FLASH_CFI_64BIT:
659 ready = flash_read64(dst) == flash_read64(src);
660 break;
661 default:
662 ready = 0;
663 break;
664 }
665 if (ready)
666 break;
667 if (get_timer(start) > tout) {
668 printf("Flash %s timeout at address %lx data %lx\n",
669 prompt, (ulong)dst, (ulong)flash_read8(dst));
670 return ERR_TIMOUT;
671 }
672 udelay(1); /* also triggers watchdog */
673 }
674 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
675 return ERR_OK;
676 }
677
678 /*-----------------------------------------------------------------------
679 */
680 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
681 {
682 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
683 unsigned short w;
684 unsigned int l;
685 unsigned long long ll;
686 #endif
687
688 switch (info->portwidth) {
689 case FLASH_CFI_8BIT:
690 cword->c = c;
691 break;
692 case FLASH_CFI_16BIT:
693 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
694 w = c;
695 w <<= 8;
696 cword->w = (cword->w >> 8) | w;
697 #else
698 cword->w = (cword->w << 8) | c;
699 #endif
700 break;
701 case FLASH_CFI_32BIT:
702 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
703 l = c;
704 l <<= 24;
705 cword->l = (cword->l >> 8) | l;
706 #else
707 cword->l = (cword->l << 8) | c;
708 #endif
709 break;
710 case FLASH_CFI_64BIT:
711 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
712 ll = c;
713 ll <<= 56;
714 cword->ll = (cword->ll >> 8) | ll;
715 #else
716 cword->ll = (cword->ll << 8) | c;
717 #endif
718 break;
719 }
720 }
721
722 /*
723 * Loop through the sector table starting from the previously found sector.
724 * Searches forwards or backwards, dependent on the passed address.
725 */
726 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
727 {
728 static flash_sect_t saved_sector = 0; /* previously found sector */
729 flash_sect_t sector = saved_sector;
730
731 while ((info->start[sector] < addr)
732 && (sector < info->sector_count - 1))
733 sector++;
734 while ((info->start[sector] > addr) && (sector > 0))
735 /*
736 * also decrements the sector in case of an overshot
737 * in the first loop
738 */
739 sector--;
740
741 saved_sector = sector;
742 return sector;
743 }
744
745 /*-----------------------------------------------------------------------
746 */
747 static int flash_write_cfiword (flash_info_t * info, ulong dest,
748 cfiword_t cword)
749 {
750 void *dstaddr = (void *)dest;
751 int flag;
752 flash_sect_t sect = 0;
753 char sect_found = 0;
754
755 /* Check if Flash is (sufficiently) erased */
756 switch (info->portwidth) {
757 case FLASH_CFI_8BIT:
758 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
759 break;
760 case FLASH_CFI_16BIT:
761 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
762 break;
763 case FLASH_CFI_32BIT:
764 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
765 break;
766 case FLASH_CFI_64BIT:
767 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
768 break;
769 default:
770 flag = 0;
771 break;
772 }
773 if (!flag)
774 return ERR_NOT_ERASED;
775
776 /* Disable interrupts which might cause a timeout here */
777 flag = disable_interrupts ();
778
779 switch (info->vendor) {
780 case CFI_CMDSET_INTEL_PROG_REGIONS:
781 case CFI_CMDSET_INTEL_EXTENDED:
782 case CFI_CMDSET_INTEL_STANDARD:
783 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
784 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
785 break;
786 case CFI_CMDSET_AMD_EXTENDED:
787 case CFI_CMDSET_AMD_STANDARD:
788 sect = find_sector(info, dest);
789 flash_unlock_seq (info, sect);
790 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
791 sect_found = 1;
792 break;
793 #ifdef CONFIG_FLASH_CFI_LEGACY
794 case CFI_CMDSET_AMD_LEGACY:
795 sect = find_sector(info, dest);
796 flash_unlock_seq (info, 0);
797 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
798 sect_found = 1;
799 break;
800 #endif
801 }
802
803 switch (info->portwidth) {
804 case FLASH_CFI_8BIT:
805 flash_write8(cword.c, dstaddr);
806 break;
807 case FLASH_CFI_16BIT:
808 flash_write16(cword.w, dstaddr);
809 break;
810 case FLASH_CFI_32BIT:
811 flash_write32(cword.l, dstaddr);
812 break;
813 case FLASH_CFI_64BIT:
814 flash_write64(cword.ll, dstaddr);
815 break;
816 }
817
818 /* re-enable interrupts if necessary */
819 if (flag)
820 enable_interrupts ();
821
822 if (!sect_found)
823 sect = find_sector (info, dest);
824
825 if (use_flash_status_poll(info))
826 return flash_status_poll(info, &cword, dstaddr,
827 info->write_tout, "write");
828 else
829 return flash_full_status_check(info, sect,
830 info->write_tout, "write");
831 }
832
833 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
834
835 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
836 int len)
837 {
838 flash_sect_t sector;
839 int cnt;
840 int retcode;
841 void *src = cp;
842 void *dst = (void *)dest;
843 void *dst2 = dst;
844 int flag = 0;
845 uint offset = 0;
846 unsigned int shift;
847 uchar write_cmd;
848
849 switch (info->portwidth) {
850 case FLASH_CFI_8BIT:
851 shift = 0;
852 break;
853 case FLASH_CFI_16BIT:
854 shift = 1;
855 break;
856 case FLASH_CFI_32BIT:
857 shift = 2;
858 break;
859 case FLASH_CFI_64BIT:
860 shift = 3;
861 break;
862 default:
863 retcode = ERR_INVAL;
864 goto out_unmap;
865 }
866
867 cnt = len >> shift;
868
869 while ((cnt-- > 0) && (flag == 0)) {
870 switch (info->portwidth) {
871 case FLASH_CFI_8BIT:
872 flag = ((flash_read8(dst2) & flash_read8(src)) ==
873 flash_read8(src));
874 src += 1, dst2 += 1;
875 break;
876 case FLASH_CFI_16BIT:
877 flag = ((flash_read16(dst2) & flash_read16(src)) ==
878 flash_read16(src));
879 src += 2, dst2 += 2;
880 break;
881 case FLASH_CFI_32BIT:
882 flag = ((flash_read32(dst2) & flash_read32(src)) ==
883 flash_read32(src));
884 src += 4, dst2 += 4;
885 break;
886 case FLASH_CFI_64BIT:
887 flag = ((flash_read64(dst2) & flash_read64(src)) ==
888 flash_read64(src));
889 src += 8, dst2 += 8;
890 break;
891 }
892 }
893 if (!flag) {
894 retcode = ERR_NOT_ERASED;
895 goto out_unmap;
896 }
897
898 src = cp;
899 sector = find_sector (info, dest);
900
901 switch (info->vendor) {
902 case CFI_CMDSET_INTEL_PROG_REGIONS:
903 case CFI_CMDSET_INTEL_STANDARD:
904 case CFI_CMDSET_INTEL_EXTENDED:
905 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
906 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
907 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
908 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
909 flash_write_cmd (info, sector, 0, write_cmd);
910 retcode = flash_status_check (info, sector,
911 info->buffer_write_tout,
912 "write to buffer");
913 if (retcode == ERR_OK) {
914 /* reduce the number of loops by the width of
915 * the port */
916 cnt = len >> shift;
917 flash_write_cmd (info, sector, 0, cnt - 1);
918 while (cnt-- > 0) {
919 switch (info->portwidth) {
920 case FLASH_CFI_8BIT:
921 flash_write8(flash_read8(src), dst);
922 src += 1, dst += 1;
923 break;
924 case FLASH_CFI_16BIT:
925 flash_write16(flash_read16(src), dst);
926 src += 2, dst += 2;
927 break;
928 case FLASH_CFI_32BIT:
929 flash_write32(flash_read32(src), dst);
930 src += 4, dst += 4;
931 break;
932 case FLASH_CFI_64BIT:
933 flash_write64(flash_read64(src), dst);
934 src += 8, dst += 8;
935 break;
936 default:
937 retcode = ERR_INVAL;
938 goto out_unmap;
939 }
940 }
941 flash_write_cmd (info, sector, 0,
942 FLASH_CMD_WRITE_BUFFER_CONFIRM);
943 retcode = flash_full_status_check (
944 info, sector, info->buffer_write_tout,
945 "buffer write");
946 }
947
948 break;
949
950 case CFI_CMDSET_AMD_STANDARD:
951 case CFI_CMDSET_AMD_EXTENDED:
952 flash_unlock_seq(info,0);
953
954 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
955 offset = ((unsigned long)dst - info->start[sector]) >> shift;
956 #endif
957 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
958 cnt = len >> shift;
959 flash_write_cmd(info, sector, offset, cnt - 1);
960
961 switch (info->portwidth) {
962 case FLASH_CFI_8BIT:
963 while (cnt-- > 0) {
964 flash_write8(flash_read8(src), dst);
965 src += 1, dst += 1;
966 }
967 break;
968 case FLASH_CFI_16BIT:
969 while (cnt-- > 0) {
970 flash_write16(flash_read16(src), dst);
971 src += 2, dst += 2;
972 }
973 break;
974 case FLASH_CFI_32BIT:
975 while (cnt-- > 0) {
976 flash_write32(flash_read32(src), dst);
977 src += 4, dst += 4;
978 }
979 break;
980 case FLASH_CFI_64BIT:
981 while (cnt-- > 0) {
982 flash_write64(flash_read64(src), dst);
983 src += 8, dst += 8;
984 }
985 break;
986 default:
987 retcode = ERR_INVAL;
988 goto out_unmap;
989 }
990
991 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
992 if (use_flash_status_poll(info))
993 retcode = flash_status_poll(info, src - (1 << shift),
994 dst - (1 << shift),
995 info->buffer_write_tout,
996 "buffer write");
997 else
998 retcode = flash_full_status_check(info, sector,
999 info->buffer_write_tout,
1000 "buffer write");
1001 break;
1002
1003 default:
1004 debug ("Unknown Command Set\n");
1005 retcode = ERR_INVAL;
1006 break;
1007 }
1008
1009 out_unmap:
1010 return retcode;
1011 }
1012 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1013
1014
1015 /*-----------------------------------------------------------------------
1016 */
1017 int flash_erase (flash_info_t * info, int s_first, int s_last)
1018 {
1019 int rcode = 0;
1020 int prot;
1021 flash_sect_t sect;
1022 int st;
1023
1024 if (info->flash_id != FLASH_MAN_CFI) {
1025 puts ("Can't erase unknown flash type - aborted\n");
1026 return 1;
1027 }
1028 if ((s_first < 0) || (s_first > s_last)) {
1029 puts ("- no sectors to erase\n");
1030 return 1;
1031 }
1032
1033 prot = 0;
1034 for (sect = s_first; sect <= s_last; ++sect) {
1035 if (info->protect[sect]) {
1036 prot++;
1037 }
1038 }
1039 if (prot) {
1040 printf ("- Warning: %d protected sectors will not be erased!\n",
1041 prot);
1042 } else if (flash_verbose) {
1043 putc ('\n');
1044 }
1045
1046
1047 for (sect = s_first; sect <= s_last; sect++) {
1048 if (info->protect[sect] == 0) { /* not protected */
1049 switch (info->vendor) {
1050 case CFI_CMDSET_INTEL_PROG_REGIONS:
1051 case CFI_CMDSET_INTEL_STANDARD:
1052 case CFI_CMDSET_INTEL_EXTENDED:
1053 flash_write_cmd (info, sect, 0,
1054 FLASH_CMD_CLEAR_STATUS);
1055 flash_write_cmd (info, sect, 0,
1056 FLASH_CMD_BLOCK_ERASE);
1057 flash_write_cmd (info, sect, 0,
1058 FLASH_CMD_ERASE_CONFIRM);
1059 break;
1060 case CFI_CMDSET_AMD_STANDARD:
1061 case CFI_CMDSET_AMD_EXTENDED:
1062 flash_unlock_seq (info, sect);
1063 flash_write_cmd (info, sect,
1064 info->addr_unlock1,
1065 AMD_CMD_ERASE_START);
1066 flash_unlock_seq (info, sect);
1067 flash_write_cmd (info, sect, 0,
1068 AMD_CMD_ERASE_SECTOR);
1069 break;
1070 #ifdef CONFIG_FLASH_CFI_LEGACY
1071 case CFI_CMDSET_AMD_LEGACY:
1072 flash_unlock_seq (info, 0);
1073 flash_write_cmd (info, 0, info->addr_unlock1,
1074 AMD_CMD_ERASE_START);
1075 flash_unlock_seq (info, 0);
1076 flash_write_cmd (info, sect, 0,
1077 AMD_CMD_ERASE_SECTOR);
1078 break;
1079 #endif
1080 default:
1081 debug ("Unkown flash vendor %d\n",
1082 info->vendor);
1083 break;
1084 }
1085
1086 if (use_flash_status_poll(info)) {
1087 cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
1088 void *dest;
1089 dest = flash_map(info, sect, 0);
1090 st = flash_status_poll(info, &cword, dest,
1091 info->erase_blk_tout, "erase");
1092 flash_unmap(info, sect, 0, dest);
1093 } else
1094 st = flash_full_status_check(info, sect,
1095 info->erase_blk_tout,
1096 "erase");
1097 if (st)
1098 rcode = 1;
1099 else if (flash_verbose)
1100 putc ('.');
1101 }
1102 }
1103
1104 if (flash_verbose)
1105 puts (" done\n");
1106
1107 return rcode;
1108 }
1109
1110 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1111 static int sector_erased(flash_info_t *info, int i)
1112 {
1113 int k;
1114 int size;
1115 volatile unsigned long *flash;
1116
1117 /*
1118 * Check if whole sector is erased
1119 */
1120 size = flash_sector_size(info, i);
1121 flash = (volatile unsigned long *) info->start[i];
1122 /* divide by 4 for longword access */
1123 size = size >> 2;
1124
1125 for (k = 0; k < size; k++) {
1126 if (*flash++ != 0xffffffff)
1127 return 0; /* not erased */
1128 }
1129
1130 return 1; /* erased */
1131 }
1132 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1133
1134 void flash_print_info (flash_info_t * info)
1135 {
1136 int i;
1137
1138 if (info->flash_id != FLASH_MAN_CFI) {
1139 puts ("missing or unknown FLASH type\n");
1140 return;
1141 }
1142
1143 printf ("%s FLASH (%d x %d)",
1144 info->name,
1145 (info->portwidth << 3), (info->chipwidth << 3));
1146 if (info->size < 1024*1024)
1147 printf (" Size: %ld kB in %d Sectors\n",
1148 info->size >> 10, info->sector_count);
1149 else
1150 printf (" Size: %ld MB in %d Sectors\n",
1151 info->size >> 20, info->sector_count);
1152 printf (" ");
1153 switch (info->vendor) {
1154 case CFI_CMDSET_INTEL_PROG_REGIONS:
1155 printf ("Intel Prog Regions");
1156 break;
1157 case CFI_CMDSET_INTEL_STANDARD:
1158 printf ("Intel Standard");
1159 break;
1160 case CFI_CMDSET_INTEL_EXTENDED:
1161 printf ("Intel Extended");
1162 break;
1163 case CFI_CMDSET_AMD_STANDARD:
1164 printf ("AMD Standard");
1165 break;
1166 case CFI_CMDSET_AMD_EXTENDED:
1167 printf ("AMD Extended");
1168 break;
1169 #ifdef CONFIG_FLASH_CFI_LEGACY
1170 case CFI_CMDSET_AMD_LEGACY:
1171 printf ("AMD Legacy");
1172 break;
1173 #endif
1174 default:
1175 printf ("Unknown (%d)", info->vendor);
1176 break;
1177 }
1178 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1179 info->manufacturer_id);
1180 printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1181 info->device_id);
1182 if (info->device_id == 0x7E) {
1183 printf("%04X", info->device_id2);
1184 }
1185 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1186 info->erase_blk_tout,
1187 info->write_tout);
1188 if (info->buffer_size > 1) {
1189 printf (" Buffer write timeout: %ld ms, "
1190 "buffer size: %d bytes\n",
1191 info->buffer_write_tout,
1192 info->buffer_size);
1193 }
1194
1195 puts ("\n Sector Start Addresses:");
1196 for (i = 0; i < info->sector_count; ++i) {
1197 if (ctrlc())
1198 break;
1199 if ((i % 5) == 0)
1200 putc('\n');
1201 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1202 /* print empty and read-only info */
1203 printf (" %08lX %c %s ",
1204 info->start[i],
1205 sector_erased(info, i) ? 'E' : ' ',
1206 info->protect[i] ? "RO" : " ");
1207 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1208 printf (" %08lX %s ",
1209 info->start[i],
1210 info->protect[i] ? "RO" : " ");
1211 #endif
1212 }
1213 putc ('\n');
1214 return;
1215 }
1216
1217 /*-----------------------------------------------------------------------
1218 * This is used in a few places in write_buf() to show programming
1219 * progress. Making it a function is nasty because it needs to do side
1220 * effect updates to digit and dots. Repeated code is nasty too, so
1221 * we define it once here.
1222 */
1223 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1224 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1225 if (flash_verbose) { \
1226 dots -= dots_sub; \
1227 if ((scale > 0) && (dots <= 0)) { \
1228 if ((digit % 5) == 0) \
1229 printf ("%d", digit / 5); \
1230 else \
1231 putc ('.'); \
1232 digit--; \
1233 dots += scale; \
1234 } \
1235 }
1236 #else
1237 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1238 #endif
1239
1240 /*-----------------------------------------------------------------------
1241 * Copy memory to flash, returns:
1242 * 0 - OK
1243 * 1 - write timeout
1244 * 2 - Flash not erased
1245 */
1246 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1247 {
1248 ulong wp;
1249 uchar *p;
1250 int aln;
1251 cfiword_t cword;
1252 int i, rc;
1253 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1254 int buffered_size;
1255 #endif
1256 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1257 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1258 int scale = 0;
1259 int dots = 0;
1260
1261 /*
1262 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1263 */
1264 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1265 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1266 CONFIG_FLASH_SHOW_PROGRESS);
1267 }
1268 #endif
1269
1270 /* get lower aligned address */
1271 wp = (addr & ~(info->portwidth - 1));
1272
1273 /* handle unaligned start */
1274 if ((aln = addr - wp) != 0) {
1275 cword.l = 0;
1276 p = (uchar *)wp;
1277 for (i = 0; i < aln; ++i)
1278 flash_add_byte (info, &cword, flash_read8(p + i));
1279
1280 for (; (i < info->portwidth) && (cnt > 0); i++) {
1281 flash_add_byte (info, &cword, *src++);
1282 cnt--;
1283 }
1284 for (; (cnt == 0) && (i < info->portwidth); ++i)
1285 flash_add_byte (info, &cword, flash_read8(p + i));
1286
1287 rc = flash_write_cfiword (info, wp, cword);
1288 if (rc != 0)
1289 return rc;
1290
1291 wp += i;
1292 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1293 }
1294
1295 /* handle the aligned part */
1296 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1297 buffered_size = (info->portwidth / info->chipwidth);
1298 buffered_size *= info->buffer_size;
1299 while (cnt >= info->portwidth) {
1300 /* prohibit buffer write when buffer_size is 1 */
1301 if (info->buffer_size == 1) {
1302 cword.l = 0;
1303 for (i = 0; i < info->portwidth; i++)
1304 flash_add_byte (info, &cword, *src++);
1305 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1306 return rc;
1307 wp += info->portwidth;
1308 cnt -= info->portwidth;
1309 continue;
1310 }
1311
1312 /* write buffer until next buffered_size aligned boundary */
1313 i = buffered_size - (wp % buffered_size);
1314 if (i > cnt)
1315 i = cnt;
1316 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1317 return rc;
1318 i -= i & (info->portwidth - 1);
1319 wp += i;
1320 src += i;
1321 cnt -= i;
1322 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1323 }
1324 #else
1325 while (cnt >= info->portwidth) {
1326 cword.l = 0;
1327 for (i = 0; i < info->portwidth; i++) {
1328 flash_add_byte (info, &cword, *src++);
1329 }
1330 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1331 return rc;
1332 wp += info->portwidth;
1333 cnt -= info->portwidth;
1334 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1335 }
1336 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1337
1338 if (cnt == 0) {
1339 return (0);
1340 }
1341
1342 /*
1343 * handle unaligned tail bytes
1344 */
1345 cword.l = 0;
1346 p = (uchar *)wp;
1347 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1348 flash_add_byte (info, &cword, *src++);
1349 --cnt;
1350 }
1351 for (; i < info->portwidth; ++i)
1352 flash_add_byte (info, &cword, flash_read8(p + i));
1353
1354 return flash_write_cfiword (info, wp, cword);
1355 }
1356
1357 /*-----------------------------------------------------------------------
1358 */
1359 #ifdef CONFIG_SYS_FLASH_PROTECTION
1360
1361 int flash_real_protect (flash_info_t * info, long sector, int prot)
1362 {
1363 int retcode = 0;
1364
1365 switch (info->vendor) {
1366 case CFI_CMDSET_INTEL_PROG_REGIONS:
1367 case CFI_CMDSET_INTEL_STANDARD:
1368 case CFI_CMDSET_INTEL_EXTENDED:
1369 /*
1370 * see errata called
1371 * "Numonyx Axcell P33/P30 Specification Update" :)
1372 */
1373 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID);
1374 if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT,
1375 prot)) {
1376 /*
1377 * cmd must come before FLASH_CMD_PROTECT + 20us
1378 * Disable interrupts which might cause a timeout here.
1379 */
1380 int flag = disable_interrupts ();
1381 unsigned short cmd;
1382
1383 if (prot)
1384 cmd = FLASH_CMD_PROTECT_SET;
1385 else
1386 cmd = FLASH_CMD_PROTECT_CLEAR;
1387
1388 flash_write_cmd (info, sector, 0,
1389 FLASH_CMD_PROTECT);
1390 flash_write_cmd (info, sector, 0, cmd);
1391 /* re-enable interrupts if necessary */
1392 if (flag)
1393 enable_interrupts ();
1394 }
1395 break;
1396 case CFI_CMDSET_AMD_EXTENDED:
1397 case CFI_CMDSET_AMD_STANDARD:
1398 /* U-Boot only checks the first byte */
1399 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1400 if (prot) {
1401 flash_unlock_seq (info, 0);
1402 flash_write_cmd (info, 0,
1403 info->addr_unlock1,
1404 ATM_CMD_SOFTLOCK_START);
1405 flash_unlock_seq (info, 0);
1406 flash_write_cmd (info, sector, 0,
1407 ATM_CMD_LOCK_SECT);
1408 } else {
1409 flash_write_cmd (info, 0,
1410 info->addr_unlock1,
1411 AMD_CMD_UNLOCK_START);
1412 if (info->device_id == ATM_ID_BV6416)
1413 flash_write_cmd (info, sector,
1414 0, ATM_CMD_UNLOCK_SECT);
1415 }
1416 }
1417 break;
1418 #ifdef CONFIG_FLASH_CFI_LEGACY
1419 case CFI_CMDSET_AMD_LEGACY:
1420 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1421 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1422 if (prot)
1423 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1424 else
1425 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1426 #endif
1427 };
1428
1429 if ((retcode =
1430 flash_full_status_check (info, sector, info->erase_blk_tout,
1431 prot ? "protect" : "unprotect")) == 0) {
1432
1433 info->protect[sector] = prot;
1434
1435 /*
1436 * On some of Intel's flash chips (marked via legacy_unlock)
1437 * unprotect unprotects all locking.
1438 */
1439 if ((prot == 0) && (info->legacy_unlock)) {
1440 flash_sect_t i;
1441
1442 for (i = 0; i < info->sector_count; i++) {
1443 if (info->protect[i])
1444 flash_real_protect (info, i, 1);
1445 }
1446 }
1447 }
1448 return retcode;
1449 }
1450
1451 /*-----------------------------------------------------------------------
1452 * flash_read_user_serial - read the OneTimeProgramming cells
1453 */
1454 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1455 int len)
1456 {
1457 uchar *src;
1458 uchar *dst;
1459
1460 dst = buffer;
1461 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1462 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1463 memcpy (dst, src + offset, len);
1464 flash_write_cmd (info, 0, 0, info->cmd_reset);
1465 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1466 }
1467
1468 /*
1469 * flash_read_factory_serial - read the device Id from the protection area
1470 */
1471 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1472 int len)
1473 {
1474 uchar *src;
1475
1476 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1477 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1478 memcpy (buffer, src + offset, len);
1479 flash_write_cmd (info, 0, 0, info->cmd_reset);
1480 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1481 }
1482
1483 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1484
1485 /*-----------------------------------------------------------------------
1486 * Reverse the order of the erase regions in the CFI QRY structure.
1487 * This is needed for chips that are either a) correctly detected as
1488 * top-boot, or b) buggy.
1489 */
1490 static void cfi_reverse_geometry(struct cfi_qry *qry)
1491 {
1492 unsigned int i, j;
1493 u32 tmp;
1494
1495 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1496 tmp = qry->erase_region_info[i];
1497 qry->erase_region_info[i] = qry->erase_region_info[j];
1498 qry->erase_region_info[j] = tmp;
1499 }
1500 }
1501
1502 /*-----------------------------------------------------------------------
1503 * read jedec ids from device and set corresponding fields in info struct
1504 *
1505 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1506 *
1507 */
1508 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1509 {
1510 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1511 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1512 udelay(1000); /* some flash are slow to respond */
1513 info->manufacturer_id = flash_read_uchar (info,
1514 FLASH_OFFSET_MANUFACTURER_ID);
1515 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1516 flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
1517 flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
1518 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1519 }
1520
1521 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1522 {
1523 info->cmd_reset = FLASH_CMD_RESET;
1524
1525 cmdset_intel_read_jedec_ids(info);
1526 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1527
1528 #ifdef CONFIG_SYS_FLASH_PROTECTION
1529 /* read legacy lock/unlock bit from intel flash */
1530 if (info->ext_addr) {
1531 info->legacy_unlock = flash_read_uchar (info,
1532 info->ext_addr + 5) & 0x08;
1533 }
1534 #endif
1535
1536 return 0;
1537 }
1538
1539 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1540 {
1541 ushort bankId = 0;
1542 uchar manuId;
1543
1544 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1545 flash_unlock_seq(info, 0);
1546 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1547 udelay(1000); /* some flash are slow to respond */
1548
1549 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
1550 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1551 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1552 bankId += 0x100;
1553 manuId = flash_read_uchar (info,
1554 bankId | FLASH_OFFSET_MANUFACTURER_ID);
1555 }
1556 info->manufacturer_id = manuId;
1557
1558 switch (info->chipwidth){
1559 case FLASH_CFI_8BIT:
1560 info->device_id = flash_read_uchar (info,
1561 FLASH_OFFSET_DEVICE_ID);
1562 if (info->device_id == 0x7E) {
1563 /* AMD 3-byte (expanded) device ids */
1564 info->device_id2 = flash_read_uchar (info,
1565 FLASH_OFFSET_DEVICE_ID2);
1566 info->device_id2 <<= 8;
1567 info->device_id2 |= flash_read_uchar (info,
1568 FLASH_OFFSET_DEVICE_ID3);
1569 }
1570 break;
1571 case FLASH_CFI_16BIT:
1572 info->device_id = flash_read_word (info,
1573 FLASH_OFFSET_DEVICE_ID);
1574 break;
1575 default:
1576 break;
1577 }
1578 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1579 }
1580
1581 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1582 {
1583 info->cmd_reset = AMD_CMD_RESET;
1584
1585 cmdset_amd_read_jedec_ids(info);
1586 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1587
1588 return 0;
1589 }
1590
1591 #ifdef CONFIG_FLASH_CFI_LEGACY
1592 static void flash_read_jedec_ids (flash_info_t * info)
1593 {
1594 info->manufacturer_id = 0;
1595 info->device_id = 0;
1596 info->device_id2 = 0;
1597
1598 switch (info->vendor) {
1599 case CFI_CMDSET_INTEL_PROG_REGIONS:
1600 case CFI_CMDSET_INTEL_STANDARD:
1601 case CFI_CMDSET_INTEL_EXTENDED:
1602 cmdset_intel_read_jedec_ids(info);
1603 break;
1604 case CFI_CMDSET_AMD_STANDARD:
1605 case CFI_CMDSET_AMD_EXTENDED:
1606 cmdset_amd_read_jedec_ids(info);
1607 break;
1608 default:
1609 break;
1610 }
1611 }
1612
1613 /*-----------------------------------------------------------------------
1614 * Call board code to request info about non-CFI flash.
1615 * board_flash_get_legacy needs to fill in at least:
1616 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1617 */
1618 static int flash_detect_legacy(phys_addr_t base, int banknum)
1619 {
1620 flash_info_t *info = &flash_info[banknum];
1621
1622 if (board_flash_get_legacy(base, banknum, info)) {
1623 /* board code may have filled info completely. If not, we
1624 use JEDEC ID probing. */
1625 if (!info->vendor) {
1626 int modes[] = {
1627 CFI_CMDSET_AMD_STANDARD,
1628 CFI_CMDSET_INTEL_STANDARD
1629 };
1630 int i;
1631
1632 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1633 info->vendor = modes[i];
1634 info->start[0] =
1635 (ulong)map_physmem(base,
1636 info->portwidth,
1637 MAP_NOCACHE);
1638 if (info->portwidth == FLASH_CFI_8BIT
1639 && info->interface == FLASH_CFI_X8X16) {
1640 info->addr_unlock1 = 0x2AAA;
1641 info->addr_unlock2 = 0x5555;
1642 } else {
1643 info->addr_unlock1 = 0x5555;
1644 info->addr_unlock2 = 0x2AAA;
1645 }
1646 flash_read_jedec_ids(info);
1647 debug("JEDEC PROBE: ID %x %x %x\n",
1648 info->manufacturer_id,
1649 info->device_id,
1650 info->device_id2);
1651 if (jedec_flash_match(info, info->start[0]))
1652 break;
1653 else
1654 unmap_physmem((void *)info->start[0],
1655 MAP_NOCACHE);
1656 }
1657 }
1658
1659 switch(info->vendor) {
1660 case CFI_CMDSET_INTEL_PROG_REGIONS:
1661 case CFI_CMDSET_INTEL_STANDARD:
1662 case CFI_CMDSET_INTEL_EXTENDED:
1663 info->cmd_reset = FLASH_CMD_RESET;
1664 break;
1665 case CFI_CMDSET_AMD_STANDARD:
1666 case CFI_CMDSET_AMD_EXTENDED:
1667 case CFI_CMDSET_AMD_LEGACY:
1668 info->cmd_reset = AMD_CMD_RESET;
1669 break;
1670 }
1671 info->flash_id = FLASH_MAN_CFI;
1672 return 1;
1673 }
1674 return 0; /* use CFI */
1675 }
1676 #else
1677 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1678 {
1679 return 0; /* use CFI */
1680 }
1681 #endif
1682
1683 /*-----------------------------------------------------------------------
1684 * detect if flash is compatible with the Common Flash Interface (CFI)
1685 * http://www.jedec.org/download/search/jesd68.pdf
1686 */
1687 static void flash_read_cfi (flash_info_t *info, void *buf,
1688 unsigned int start, size_t len)
1689 {
1690 u8 *p = buf;
1691 unsigned int i;
1692
1693 for (i = 0; i < len; i++)
1694 p[i] = flash_read_uchar(info, start + i);
1695 }
1696
1697 void __flash_cmd_reset(flash_info_t *info)
1698 {
1699 /*
1700 * We do not yet know what kind of commandset to use, so we issue
1701 * the reset command in both Intel and AMD variants, in the hope
1702 * that AMD flash roms ignore the Intel command.
1703 */
1704 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1705 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1706 }
1707 void flash_cmd_reset(flash_info_t *info)
1708 __attribute__((weak,alias("__flash_cmd_reset")));
1709
1710 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1711 {
1712 int cfi_offset;
1713
1714 /* Issue FLASH reset command */
1715 flash_cmd_reset(info);
1716
1717 for (cfi_offset=0;
1718 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1719 cfi_offset++) {
1720 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1721 FLASH_CMD_CFI);
1722 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1723 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1724 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1725 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1726 sizeof(struct cfi_qry));
1727 info->interface = le16_to_cpu(qry->interface_desc);
1728
1729 info->cfi_offset = flash_offset_cfi[cfi_offset];
1730 debug ("device interface is %d\n",
1731 info->interface);
1732 debug ("found port %d chip %d ",
1733 info->portwidth, info->chipwidth);
1734 debug ("port %d bits chip %d bits\n",
1735 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1736 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1737
1738 /* calculate command offsets as in the Linux driver */
1739 info->addr_unlock1 = 0x555;
1740 info->addr_unlock2 = 0x2aa;
1741
1742 /*
1743 * modify the unlock address if we are
1744 * in compatibility mode
1745 */
1746 if ( /* x8/x16 in x8 mode */
1747 ((info->chipwidth == FLASH_CFI_BY8) &&
1748 (info->interface == FLASH_CFI_X8X16)) ||
1749 /* x16/x32 in x16 mode */
1750 ((info->chipwidth == FLASH_CFI_BY16) &&
1751 (info->interface == FLASH_CFI_X16X32)))
1752 {
1753 info->addr_unlock1 = 0xaaa;
1754 info->addr_unlock2 = 0x555;
1755 }
1756
1757 info->name = "CFI conformant";
1758 return 1;
1759 }
1760 }
1761
1762 return 0;
1763 }
1764
1765 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1766 {
1767 debug ("flash detect cfi\n");
1768
1769 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1770 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1771 for (info->chipwidth = FLASH_CFI_BY8;
1772 info->chipwidth <= info->portwidth;
1773 info->chipwidth <<= 1)
1774 if (__flash_detect_cfi(info, qry))
1775 return 1;
1776 }
1777 debug ("not found\n");
1778 return 0;
1779 }
1780
1781 /*
1782 * Manufacturer-specific quirks. Add workarounds for geometry
1783 * reversal, etc. here.
1784 */
1785 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1786 {
1787 /* check if flash geometry needs reversal */
1788 if (qry->num_erase_regions > 1) {
1789 /* reverse geometry if top boot part */
1790 if (info->cfi_version < 0x3131) {
1791 /* CFI < 1.1, try to guess from device id */
1792 if ((info->device_id & 0x80) != 0)
1793 cfi_reverse_geometry(qry);
1794 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1795 /* CFI >= 1.1, deduct from top/bottom flag */
1796 /* note: ext_addr is valid since cfi_version > 0 */
1797 cfi_reverse_geometry(qry);
1798 }
1799 }
1800 }
1801
1802 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1803 {
1804 int reverse_geometry = 0;
1805
1806 /* Check the "top boot" bit in the PRI */
1807 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1808 reverse_geometry = 1;
1809
1810 /* AT49BV6416(T) list the erase regions in the wrong order.
1811 * However, the device ID is identical with the non-broken
1812 * AT49BV642D they differ in the high byte.
1813 */
1814 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1815 reverse_geometry = !reverse_geometry;
1816
1817 if (reverse_geometry)
1818 cfi_reverse_geometry(qry);
1819 }
1820
1821 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1822 {
1823 /* check if flash geometry needs reversal */
1824 if (qry->num_erase_regions > 1) {
1825 /* reverse geometry if top boot part */
1826 if (info->cfi_version < 0x3131) {
1827 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
1828 if (info->device_id == 0x22CA ||
1829 info->device_id == 0x2256) {
1830 cfi_reverse_geometry(qry);
1831 }
1832 }
1833 }
1834 }
1835
1836 /*
1837 * The following code cannot be run from FLASH!
1838 *
1839 */
1840 ulong flash_get_size (phys_addr_t base, int banknum, unsigned long max_size)
1841 {
1842 flash_info_t *info = &flash_info[banknum];
1843 int i, j;
1844 flash_sect_t sect_cnt;
1845 phys_addr_t sector;
1846 unsigned long tmp;
1847 int size_ratio;
1848 uchar num_erase_regions;
1849 int erase_region_size;
1850 int erase_region_count;
1851 struct cfi_qry qry;
1852
1853 memset(&qry, 0, sizeof(qry));
1854
1855 info->ext_addr = 0;
1856 info->cfi_version = 0;
1857 #ifdef CONFIG_SYS_FLASH_PROTECTION
1858 info->legacy_unlock = 0;
1859 #endif
1860
1861 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
1862
1863 if (flash_detect_cfi (info, &qry)) {
1864 info->vendor = le16_to_cpu(qry.p_id);
1865 info->ext_addr = le16_to_cpu(qry.p_adr);
1866 num_erase_regions = qry.num_erase_regions;
1867
1868 if (info->ext_addr) {
1869 info->cfi_version = (ushort) flash_read_uchar (info,
1870 info->ext_addr + 3) << 8;
1871 info->cfi_version |= (ushort) flash_read_uchar (info,
1872 info->ext_addr + 4);
1873 }
1874
1875 #ifdef DEBUG
1876 flash_printqry (&qry);
1877 #endif
1878
1879 switch (info->vendor) {
1880 case CFI_CMDSET_INTEL_PROG_REGIONS:
1881 case CFI_CMDSET_INTEL_STANDARD:
1882 case CFI_CMDSET_INTEL_EXTENDED:
1883 cmdset_intel_init(info, &qry);
1884 break;
1885 case CFI_CMDSET_AMD_STANDARD:
1886 case CFI_CMDSET_AMD_EXTENDED:
1887 cmdset_amd_init(info, &qry);
1888 break;
1889 default:
1890 printf("CFI: Unknown command set 0x%x\n",
1891 info->vendor);
1892 /*
1893 * Unfortunately, this means we don't know how
1894 * to get the chip back to Read mode. Might
1895 * as well try an Intel-style reset...
1896 */
1897 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1898 return 0;
1899 }
1900
1901 /* Do manufacturer-specific fixups */
1902 switch (info->manufacturer_id) {
1903 case 0x0001:
1904 flash_fixup_amd(info, &qry);
1905 break;
1906 case 0x001f:
1907 flash_fixup_atmel(info, &qry);
1908 break;
1909 case 0x0020:
1910 flash_fixup_stm(info, &qry);
1911 break;
1912 }
1913
1914 debug ("manufacturer is %d\n", info->vendor);
1915 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1916 debug ("device id is 0x%x\n", info->device_id);
1917 debug ("device id2 is 0x%x\n", info->device_id2);
1918 debug ("cfi version is 0x%04x\n", info->cfi_version);
1919
1920 size_ratio = info->portwidth / info->chipwidth;
1921 /* if the chip is x8/x16 reduce the ratio by half */
1922 if ((info->interface == FLASH_CFI_X8X16)
1923 && (info->chipwidth == FLASH_CFI_BY8)) {
1924 size_ratio >>= 1;
1925 }
1926 debug ("size_ratio %d port %d bits chip %d bits\n",
1927 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1928 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1929 info->size = 1 << qry.dev_size;
1930 /* multiply the size by the number of chips */
1931 info->size *= size_ratio;
1932 if (max_size && (info->size > max_size)) {
1933 debug("[truncated from %ldMiB]", info->size >> 20);
1934 info->size = max_size;
1935 }
1936 debug ("found %d erase regions\n", num_erase_regions);
1937 sect_cnt = 0;
1938 sector = base;
1939 for (i = 0; i < num_erase_regions; i++) {
1940 if (i > NUM_ERASE_REGIONS) {
1941 printf ("%d erase regions found, only %d used\n",
1942 num_erase_regions, NUM_ERASE_REGIONS);
1943 break;
1944 }
1945
1946 tmp = le32_to_cpu(qry.erase_region_info[i]);
1947 debug("erase region %u: 0x%08lx\n", i, tmp);
1948
1949 erase_region_count = (tmp & 0xffff) + 1;
1950 tmp >>= 16;
1951 erase_region_size =
1952 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1953 debug ("erase_region_count = %d erase_region_size = %d\n",
1954 erase_region_count, erase_region_size);
1955 for (j = 0; j < erase_region_count; j++) {
1956 if (sector - base >= info->size)
1957 break;
1958 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
1959 printf("ERROR: too many flash sectors\n");
1960 break;
1961 }
1962 info->start[sect_cnt] =
1963 (ulong)map_physmem(sector,
1964 info->portwidth,
1965 MAP_NOCACHE);
1966 sector += (erase_region_size * size_ratio);
1967
1968 /*
1969 * Only read protection status from
1970 * supported devices (intel...)
1971 */
1972 switch (info->vendor) {
1973 case CFI_CMDSET_INTEL_PROG_REGIONS:
1974 case CFI_CMDSET_INTEL_EXTENDED:
1975 case CFI_CMDSET_INTEL_STANDARD:
1976 info->protect[sect_cnt] =
1977 flash_isset (info, sect_cnt,
1978 FLASH_OFFSET_PROTECT,
1979 FLASH_STATUS_PROTECT);
1980 break;
1981 default:
1982 /* default: not protected */
1983 info->protect[sect_cnt] = 0;
1984 }
1985
1986 sect_cnt++;
1987 }
1988 }
1989
1990 info->sector_count = sect_cnt;
1991 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1992 tmp = 1 << qry.block_erase_timeout_typ;
1993 info->erase_blk_tout = tmp *
1994 (1 << qry.block_erase_timeout_max);
1995 tmp = (1 << qry.buf_write_timeout_typ) *
1996 (1 << qry.buf_write_timeout_max);
1997
1998 /* round up when converting to ms */
1999 info->buffer_write_tout = (tmp + 999) / 1000;
2000 tmp = (1 << qry.word_write_timeout_typ) *
2001 (1 << qry.word_write_timeout_max);
2002 /* round up when converting to ms */
2003 info->write_tout = (tmp + 999) / 1000;
2004 info->flash_id = FLASH_MAN_CFI;
2005 if ((info->interface == FLASH_CFI_X8X16) &&
2006 (info->chipwidth == FLASH_CFI_BY8)) {
2007 /* XXX - Need to test on x8/x16 in parallel. */
2008 info->portwidth >>= 1;
2009 }
2010
2011 flash_write_cmd (info, 0, 0, info->cmd_reset);
2012 }
2013
2014 return (info->size);
2015 }
2016
2017 void flash_set_verbose(uint v)
2018 {
2019 flash_verbose = v;
2020 }
2021
2022 /*-----------------------------------------------------------------------
2023 */
2024 unsigned long flash_init (void)
2025 {
2026 unsigned long size = 0;
2027 int i;
2028 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2029 struct apl_s {
2030 ulong start;
2031 ulong size;
2032 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2033 #endif
2034
2035 #ifdef CONFIG_SYS_FLASH_PROTECTION
2036 /* read environment from EEPROM */
2037 char s[64];
2038 getenv_f("unlock", s, sizeof(s));
2039 #endif
2040
2041 /* Init: no FLASHes known */
2042 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2043 flash_info[i].flash_id = FLASH_UNKNOWN;
2044
2045 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2046 flash_get_size(cfi_flash_bank_addr(i), i,
2047 cfi_flash_bank_size(i));
2048 size += flash_info[i].size;
2049 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2050 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2051 printf ("## Unknown FLASH on Bank %d "
2052 "- Size = 0x%08lx = %ld MB\n",
2053 i+1, flash_info[i].size,
2054 flash_info[i].size >> 20);
2055 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2056 }
2057 #ifdef CONFIG_SYS_FLASH_PROTECTION
2058 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2059 /*
2060 * Only the U-Boot image and it's environment
2061 * is protected, all other sectors are
2062 * unprotected (unlocked) if flash hardware
2063 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2064 * and the environment variable "unlock" is
2065 * set to "yes".
2066 */
2067 if (flash_info[i].legacy_unlock) {
2068 int k;
2069
2070 /*
2071 * Disable legacy_unlock temporarily,
2072 * since flash_real_protect would
2073 * relock all other sectors again
2074 * otherwise.
2075 */
2076 flash_info[i].legacy_unlock = 0;
2077
2078 /*
2079 * Legacy unlocking (e.g. Intel J3) ->
2080 * unlock only one sector. This will
2081 * unlock all sectors.
2082 */
2083 flash_real_protect (&flash_info[i], 0, 0);
2084
2085 flash_info[i].legacy_unlock = 1;
2086
2087 /*
2088 * Manually mark other sectors as
2089 * unlocked (unprotected)
2090 */
2091 for (k = 1; k < flash_info[i].sector_count; k++)
2092 flash_info[i].protect[k] = 0;
2093 } else {
2094 /*
2095 * No legancy unlocking -> unlock all sectors
2096 */
2097 flash_protect (FLAG_PROTECT_CLEAR,
2098 flash_info[i].start[0],
2099 flash_info[i].start[0]
2100 + flash_info[i].size - 1,
2101 &flash_info[i]);
2102 }
2103 }
2104 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2105 }
2106
2107 /* Monitor protection ON by default */
2108 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2109 (!defined(CONFIG_MONITOR_IS_IN_RAM))
2110 flash_protect (FLAG_PROTECT_SET,
2111 CONFIG_SYS_MONITOR_BASE,
2112 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2113 flash_get_info(CONFIG_SYS_MONITOR_BASE));
2114 #endif
2115
2116 /* Environment protection ON by default */
2117 #ifdef CONFIG_ENV_IS_IN_FLASH
2118 flash_protect (FLAG_PROTECT_SET,
2119 CONFIG_ENV_ADDR,
2120 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2121 flash_get_info(CONFIG_ENV_ADDR));
2122 #endif
2123
2124 /* Redundant environment protection ON by default */
2125 #ifdef CONFIG_ENV_ADDR_REDUND
2126 flash_protect (FLAG_PROTECT_SET,
2127 CONFIG_ENV_ADDR_REDUND,
2128 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2129 flash_get_info(CONFIG_ENV_ADDR_REDUND));
2130 #endif
2131
2132 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2133 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2134 debug("autoprotecting from %08x to %08x\n",
2135 apl[i].start, apl[i].start + apl[i].size - 1);
2136 flash_protect (FLAG_PROTECT_SET,
2137 apl[i].start,
2138 apl[i].start + apl[i].size - 1,
2139 flash_get_info(apl[i].start));
2140 }
2141 #endif
2142
2143 #ifdef CONFIG_FLASH_CFI_MTD
2144 cfi_mtd_init();
2145 #endif
2146
2147 return (size);
2148 }
"Das U-Boot" Source Tree