2 * Copyright (C) 2014 Freescale Semiconductor
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <fdt_support.h>
12 #include <fsl-mc/fsl_mc.h>
13 #include <fsl-mc/fsl_mc_sys.h>
14 #include <fsl-mc/fsl_mc_private.h>
15 #include <fsl-mc/fsl_dpmng.h>
16 #include <fsl-mc/fsl_dprc.h>
17 #include <fsl-mc/fsl_dpio.h>
18 #include <fsl-mc/fsl_dpni.h>
19 #include <fsl-mc/fsl_qbman_portal.h>
20 #include <fsl-mc/ldpaa_wriop.h>
22 #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024)
23 #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1))
24 #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024)
26 #define MC_MEM_SIZE_ENV_VAR "mcmemsize"
27 #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout"
29 DECLARE_GLOBAL_DATA_PTR
;
30 static int mc_boot_status
= -1;
31 static int mc_dpl_applied
= -1;
32 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
33 static int mc_aiop_applied
= -1;
35 struct fsl_mc_io
*root_mc_io
= NULL
;
36 struct fsl_mc_io
*dflt_mc_io
= NULL
; /* child container */
37 uint16_t root_dprc_handle
= 0;
38 uint16_t dflt_dprc_handle
= 0;
40 struct fsl_dpbp_obj
*dflt_dpbp
= NULL
;
41 struct fsl_dpio_obj
*dflt_dpio
= NULL
;
42 struct fsl_dpni_obj
*dflt_dpni
= NULL
;
45 void dump_ram_words(const char *title
, void *addr
)
48 uint32_t *words
= addr
;
50 printf("Dumping beginning of %s (%p):\n", title
, addr
);
51 for (i
= 0; i
< 16; i
++)
52 printf("%#x ", words
[i
]);
57 void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem
*mc_ccsr_regs
)
59 printf("MC CCSR registers:\n"
69 mc_ccsr_regs
->reg_gcr1
,
70 mc_ccsr_regs
->reg_gsr
,
71 mc_ccsr_regs
->reg_sicbalr
,
72 mc_ccsr_regs
->reg_sicbahr
,
73 mc_ccsr_regs
->reg_sicapr
,
74 mc_ccsr_regs
->reg_mcfbalr
,
75 mc_ccsr_regs
->reg_mcfbahr
,
76 mc_ccsr_regs
->reg_mcfapr
,
77 mc_ccsr_regs
->reg_psr
);
81 #define dump_ram_words(title, addr)
82 #define dump_mc_ccsr_regs(mc_ccsr_regs)
86 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
88 * Copying MC firmware or DPL image to DDR
90 static int mc_copy_image(const char *title
,
91 u64 image_addr
, u32 image_size
, u64 mc_ram_addr
)
93 debug("%s copied to address %p\n", title
, (void *)mc_ram_addr
);
94 memcpy((void *)mc_ram_addr
, (void *)image_addr
, image_size
);
95 flush_dcache_range(mc_ram_addr
, mc_ram_addr
+ image_size
);
100 * MC firmware FIT image parser checks if the image is in FIT
101 * format, verifies integrity of the image and calculates
102 * raw image address and size values.
103 * Returns 0 on success and a negative errno on error.
106 int parse_mc_firmware_fit_image(u64 mc_fw_addr
,
107 const void **raw_image_addr
,
108 size_t *raw_image_size
)
115 const char *uname
= "firmware";
117 fit_hdr
= (void *)mc_fw_addr
;
119 /* Check if Image is in FIT format */
120 format
= genimg_get_format(fit_hdr
);
122 if (format
!= IMAGE_FORMAT_FIT
) {
123 printf("fsl-mc: ERR: Bad firmware image (not a FIT image)\n");
127 if (!fit_check_format(fit_hdr
)) {
128 printf("fsl-mc: ERR: Bad firmware image (bad FIT header)\n");
132 node_offset
= fit_image_get_node(fit_hdr
, uname
);
134 if (node_offset
< 0) {
135 printf("fsl-mc: ERR: Bad firmware image (missing subimage)\n");
139 /* Verify MC firmware image */
140 if (!(fit_image_verify(fit_hdr
, node_offset
))) {
141 printf("fsl-mc: ERR: Bad firmware image (bad CRC)\n");
145 /* Get address and size of raw image */
146 fit_image_get_data(fit_hdr
, node_offset
, &data
, &size
);
148 *raw_image_addr
= data
;
149 *raw_image_size
= size
;
156 * Calculates the values to be used to specify the address range
157 * for the MC private DRAM block, in the MCFBALR/MCFBAHR registers.
158 * It returns the highest 512MB-aligned address within the given
159 * address range, in '*aligned_base_addr', and the number of 256 MiB
160 * blocks in it, in 'num_256mb_blocks'.
162 static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr
,
164 u64
*aligned_base_addr
,
165 u8
*num_256mb_blocks
)
170 if (mc_ram_size
% MC_RAM_SIZE_ALIGNMENT
!= 0) {
171 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
176 num_blocks
= mc_ram_size
/ MC_RAM_SIZE_ALIGNMENT
;
177 if (num_blocks
< 1 || num_blocks
> 0xff) {
178 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
183 addr
= (mc_private_ram_start_addr
+ mc_ram_size
- 1) &
184 MC_RAM_BASE_ADDR_ALIGNMENT_MASK
;
186 if (addr
< mc_private_ram_start_addr
) {
187 printf("fsl-mc: ERROR: bad start address %#llx\n",
188 mc_private_ram_start_addr
);
192 *aligned_base_addr
= addr
;
193 *num_256mb_blocks
= num_blocks
;
197 static int mc_fixup_dpc(u64 dpc_addr
)
199 void *blob
= (void *)dpc_addr
;
202 /* delete any existing ICID pools */
203 nodeoffset
= fdt_path_offset(blob
, "/resources/icid_pools");
204 if (fdt_del_node(blob
, nodeoffset
) < 0)
205 printf("\nfsl-mc: WARNING: could not delete ICID pool\n");
208 nodeoffset
= fdt_path_offset(blob
, "/resources");
209 if (nodeoffset
< 0) {
210 printf("\nfsl-mc: ERROR: DPC is missing /resources\n");
213 nodeoffset
= fdt_add_subnode(blob
, nodeoffset
, "icid_pools");
214 nodeoffset
= fdt_add_subnode(blob
, nodeoffset
, "icid_pool@0");
215 do_fixup_by_path_u32(blob
, "/resources/icid_pools/icid_pool@0",
216 "base_icid", FSL_DPAA2_STREAM_ID_START
, 1);
217 do_fixup_by_path_u32(blob
, "/resources/icid_pools/icid_pool@0",
219 FSL_DPAA2_STREAM_ID_END
-
220 FSL_DPAA2_STREAM_ID_START
+ 1, 1);
222 flush_dcache_range(dpc_addr
, dpc_addr
+ fdt_totalsize(blob
));
227 static int load_mc_dpc(u64 mc_ram_addr
, size_t mc_ram_size
, u64 mc_dpc_addr
)
230 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
236 #ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
237 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
& 0x3) != 0 ||
238 CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
> 0xffffffff);
240 mc_dpc_offset
= CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
;
242 #error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined"
246 * Load the MC DPC blob in the MC private DRAM block:
248 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
249 printf("MC DPC is preloaded to %#llx\n", mc_ram_addr
+ mc_dpc_offset
);
252 * Get address and size of the DPC blob stored in flash:
254 dpc_fdt_hdr
= (void *)mc_dpc_addr
;
256 error
= fdt_check_header(dpc_fdt_hdr
);
259 * Don't return with error here, since the MC firmware can
260 * still boot without a DPC
262 printf("\nfsl-mc: WARNING: No DPC image found");
266 dpc_size
= fdt_totalsize(dpc_fdt_hdr
);
267 if (dpc_size
> CONFIG_SYS_LS_MC_DPC_MAX_LENGTH
) {
268 printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n",
273 mc_copy_image("MC DPC blob",
274 (u64
)dpc_fdt_hdr
, dpc_size
, mc_ram_addr
+ mc_dpc_offset
);
275 #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */
277 if (mc_fixup_dpc(mc_ram_addr
+ mc_dpc_offset
))
280 dump_ram_words("DPC", (void *)(mc_ram_addr
+ mc_dpc_offset
));
284 static int load_mc_dpl(u64 mc_ram_addr
, size_t mc_ram_size
, u64 mc_dpl_addr
)
287 #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR
293 #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
294 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
& 0x3) != 0 ||
295 CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
> 0xffffffff);
297 mc_dpl_offset
= CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
;
299 #error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined"
303 * Load the MC DPL blob in the MC private DRAM block:
305 #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR
306 printf("MC DPL is preloaded to %#llx\n", mc_ram_addr
+ mc_dpl_offset
);
309 * Get address and size of the DPL blob stored in flash:
311 dpl_fdt_hdr
= (void *)mc_dpl_addr
;
313 error
= fdt_check_header(dpl_fdt_hdr
);
315 printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n");
319 dpl_size
= fdt_totalsize(dpl_fdt_hdr
);
320 if (dpl_size
> CONFIG_SYS_LS_MC_DPL_MAX_LENGTH
) {
321 printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n",
326 mc_copy_image("MC DPL blob",
327 (u64
)dpl_fdt_hdr
, dpl_size
, mc_ram_addr
+ mc_dpl_offset
);
328 #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */
330 dump_ram_words("DPL", (void *)(mc_ram_addr
+ mc_dpl_offset
));
335 * Return the MC boot timeout value in milliseconds
337 static unsigned long get_mc_boot_timeout_ms(void)
339 unsigned long timeout_ms
= CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS
;
341 char *timeout_ms_env_var
= getenv(MC_BOOT_TIMEOUT_ENV_VAR
);
343 if (timeout_ms_env_var
) {
344 timeout_ms
= simple_strtoul(timeout_ms_env_var
, NULL
, 10);
345 if (timeout_ms
== 0) {
346 printf("fsl-mc: WARNING: Invalid value for \'"
347 MC_BOOT_TIMEOUT_ENV_VAR
348 "\' environment variable: %lu\n",
351 timeout_ms
= CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS
;
358 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
359 static int load_mc_aiop_img(u64 aiop_fw_addr
)
361 u64 mc_ram_addr
= mc_get_dram_addr();
362 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
367 * Load the MC AIOP image in the MC private DRAM block:
370 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
371 printf("MC AIOP is preloaded to %#llx\n", mc_ram_addr
+
372 CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
);
374 aiop_img
= (void *)aiop_fw_addr
;
375 mc_copy_image("MC AIOP image",
376 (u64
)aiop_img
, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH
,
377 mc_ram_addr
+ CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
);
385 static int wait_for_mc(bool booting_mc
, u32
*final_reg_gsr
)
388 u32 mc_fw_boot_status
;
389 unsigned long timeout_ms
= get_mc_boot_timeout_ms();
390 struct mc_ccsr_registers __iomem
*mc_ccsr_regs
= MC_CCSR_BASE_ADDR
;
393 assert(timeout_ms
> 0);
395 udelay(1000); /* throttle polling */
396 reg_gsr
= in_le32(&mc_ccsr_regs
->reg_gsr
);
397 mc_fw_boot_status
= (reg_gsr
& GSR_FS_MASK
);
398 if (mc_fw_boot_status
& 0x1)
406 if (timeout_ms
== 0) {
407 printf("ERROR: timeout\n");
409 /* TODO: Get an error status from an MC CCSR register */
413 if (mc_fw_boot_status
!= 0x1) {
415 * TODO: Identify critical errors from the GSR register's FS
416 * field and for those errors, set error to -ENODEV or other
417 * appropriate errno, so that the status property is set to
418 * failure in the fsl,dprc device tree node.
420 printf("WARNING: Firmware returned an error (GSR: %#x)\n",
427 *final_reg_gsr
= reg_gsr
;
431 int mc_init(u64 mc_fw_addr
, u64 mc_dpc_addr
)
435 struct mc_ccsr_registers __iomem
*mc_ccsr_regs
= MC_CCSR_BASE_ADDR
;
436 u64 mc_ram_addr
= mc_get_dram_addr();
439 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
440 const void *raw_image_addr
;
441 size_t raw_image_size
= 0;
443 struct mc_version mc_ver_info
;
444 u64 mc_ram_aligned_base_addr
;
445 u8 mc_ram_num_256mb_blocks
;
446 size_t mc_ram_size
= mc_get_dram_block_size();
449 error
= calculate_mc_private_ram_params(mc_ram_addr
,
451 &mc_ram_aligned_base_addr
,
452 &mc_ram_num_256mb_blocks
);
457 * Management Complex cores should be held at reset out of POR.
458 * U-boot should be the first software to touch MC. To be safe,
459 * we reset all cores again by setting GCR1 to 0. It doesn't do
460 * anything if they are held at reset. After we setup the firmware
461 * we kick off MC by deasserting the reset bit for core 0, and
462 * deasserting the reset bits for Command Portal Managers.
463 * The stop bits are not touched here. They are used to stop the
464 * cores when they are active. Setting stop bits doesn't stop the
465 * cores from fetching instructions when they are released from
468 out_le32(&mc_ccsr_regs
->reg_gcr1
, 0);
471 #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR
472 printf("MC firmware is preloaded to %#llx\n", mc_ram_addr
);
474 error
= parse_mc_firmware_fit_image(mc_fw_addr
, &raw_image_addr
,
479 * Load the MC FW at the beginning of the MC private DRAM block:
481 mc_copy_image("MC Firmware",
482 (u64
)raw_image_addr
, raw_image_size
, mc_ram_addr
);
484 dump_ram_words("firmware", (void *)mc_ram_addr
);
486 error
= load_mc_dpc(mc_ram_addr
, mc_ram_size
, mc_dpc_addr
);
490 debug("mc_ccsr_regs %p\n", mc_ccsr_regs
);
491 dump_mc_ccsr_regs(mc_ccsr_regs
);
494 * Tell MC what is the address range of the DRAM block assigned to it:
496 reg_mcfbalr
= (u32
)mc_ram_aligned_base_addr
|
497 (mc_ram_num_256mb_blocks
- 1);
498 out_le32(&mc_ccsr_regs
->reg_mcfbalr
, reg_mcfbalr
);
499 out_le32(&mc_ccsr_regs
->reg_mcfbahr
,
500 (u32
)(mc_ram_aligned_base_addr
>> 32));
501 out_le32(&mc_ccsr_regs
->reg_mcfapr
, FSL_BYPASS_AMQ
);
504 * Tell the MC that we want delayed DPL deployment.
506 out_le32(&mc_ccsr_regs
->reg_gsr
, 0xDD00);
508 printf("\nfsl-mc: Booting Management Complex ... ");
511 * Deassert reset and release MC core 0 to run
513 out_le32(&mc_ccsr_regs
->reg_gcr1
, GCR1_P1_DE_RST
| GCR1_M_ALL_DE_RST
);
514 error
= wait_for_mc(true, ®_gsr
);
519 * TODO: need to obtain the portal_id for the root container from the
525 * Initialize the global default MC portal
526 * And check that the MC firmware is responding portal commands:
528 root_mc_io
= (struct fsl_mc_io
*)malloc(sizeof(struct fsl_mc_io
));
530 printf(" No memory: malloc() failed\n");
534 root_mc_io
->mmio_regs
= SOC_MC_PORTAL_ADDR(portal_id
);
535 debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
536 portal_id
, root_mc_io
->mmio_regs
);
538 error
= mc_get_version(root_mc_io
, MC_CMD_NO_FLAGS
, &mc_ver_info
);
540 printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
545 printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
546 mc_ver_info
.major
, mc_ver_info
.minor
, mc_ver_info
.revision
,
547 reg_gsr
& GSR_FS_MASK
);
551 mc_boot_status
= error
;
558 int mc_apply_dpl(u64 mc_dpl_addr
)
560 struct mc_ccsr_registers __iomem
*mc_ccsr_regs
= MC_CCSR_BASE_ADDR
;
563 u64 mc_ram_addr
= mc_get_dram_addr();
564 size_t mc_ram_size
= mc_get_dram_block_size();
566 error
= load_mc_dpl(mc_ram_addr
, mc_ram_size
, mc_dpl_addr
);
571 * Tell the MC to deploy the DPL:
573 out_le32(&mc_ccsr_regs
->reg_gsr
, 0x0);
574 printf("fsl-mc: Deploying data path layout ... ");
575 error
= wait_for_mc(false, ®_gsr
);
583 int get_mc_boot_status(void)
585 return mc_boot_status
;
588 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
589 int get_aiop_apply_status(void)
591 return mc_aiop_applied
;
595 int get_dpl_apply_status(void)
597 return mc_dpl_applied
;
601 * Return the MC address of private DRAM block.
603 u64
mc_get_dram_addr(void)
608 * The MC private DRAM block was already carved at the end of DRAM
609 * by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE:
611 if (gd
->bd
->bi_dram
[1].start
) {
613 gd
->bd
->bi_dram
[1].start
+ gd
->bd
->bi_dram
[1].size
;
616 gd
->bd
->bi_dram
[0].start
+ gd
->bd
->bi_dram
[0].size
;
623 * Return the actual size of the MC private DRAM block.
625 unsigned long mc_get_dram_block_size(void)
627 unsigned long dram_block_size
= CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE
;
629 char *dram_block_size_env_var
= getenv(MC_MEM_SIZE_ENV_VAR
);
631 if (dram_block_size_env_var
) {
632 dram_block_size
= simple_strtoul(dram_block_size_env_var
, NULL
,
635 if (dram_block_size
< CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE
) {
636 printf("fsl-mc: WARNING: Invalid value for \'"
638 "\' environment variable: %lu\n",
641 dram_block_size
= CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE
;
645 return dram_block_size
;
648 int fsl_mc_ldpaa_init(bd_t
*bis
)
652 for (i
= WRIOP1_DPMAC1
; i
< NUM_WRIOP_PORTS
; i
++)
653 if ((wriop_is_enabled_dpmac(i
) == 1) &&
654 (wriop_get_phy_address(i
) != -1))
655 ldpaa_eth_init(i
, wriop_get_enet_if(i
));
659 static int dpio_init(void)
661 struct qbman_swp_desc p_des
;
662 struct dpio_attr attr
;
663 struct dpio_cfg dpio_cfg
;
666 dflt_dpio
= (struct fsl_dpio_obj
*)malloc(sizeof(struct fsl_dpio_obj
));
668 printf("No memory: malloc() failed\n");
673 dpio_cfg
.channel_mode
= DPIO_LOCAL_CHANNEL
;
674 dpio_cfg
.num_priorities
= 8;
676 err
= dpio_create(dflt_mc_io
, MC_CMD_NO_FLAGS
, &dpio_cfg
,
677 &dflt_dpio
->dpio_handle
);
679 printf("dpio_create() failed: %d\n", err
);
684 memset(&attr
, 0, sizeof(struct dpio_attr
));
685 err
= dpio_get_attributes(dflt_mc_io
, MC_CMD_NO_FLAGS
,
686 dflt_dpio
->dpio_handle
, &attr
);
688 printf("dpio_get_attributes() failed: %d\n", err
);
692 dflt_dpio
->dpio_id
= attr
.id
;
694 printf("Init: DPIO id=0x%d\n", dflt_dpio
->dpio_id
);
697 err
= dpio_enable(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpio
->dpio_handle
);
699 printf("dpio_enable() failed %d\n", err
);
702 debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n",
703 attr
.qbman_portal_ce_offset
,
704 attr
.qbman_portal_ci_offset
,
705 attr
.qbman_portal_id
,
706 attr
.num_priorities
);
708 p_des
.cena_bar
= (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
709 + attr
.qbman_portal_ce_offset
);
710 p_des
.cinh_bar
= (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
711 + attr
.qbman_portal_ci_offset
);
713 dflt_dpio
->sw_portal
= qbman_swp_init(&p_des
);
714 if (dflt_dpio
->sw_portal
== NULL
) {
715 printf("qbman_swp_init() failed\n");
716 goto err_get_swp_init
;
721 dpio_disable(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpio
->dpio_handle
);
725 dpio_close(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpio
->dpio_handle
);
726 dpio_destroy(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpio
->dpio_handle
);
732 static int dpio_exit(void)
736 err
= dpio_disable(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpio
->dpio_handle
);
738 printf("dpio_disable() failed: %d\n", err
);
742 err
= dpio_destroy(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpio
->dpio_handle
);
744 printf("dpio_destroy() failed: %d\n", err
);
749 printf("Exit: DPIO id=0x%d\n", dflt_dpio
->dpio_id
);
760 static int dprc_init(void)
762 int err
, child_portal_id
, container_id
;
764 uint64_t mc_portal_offset
;
766 /* Open root container */
767 err
= dprc_get_container_id(root_mc_io
, MC_CMD_NO_FLAGS
, &container_id
);
769 printf("dprc_get_container_id(): Root failed: %d\n", err
);
770 goto err_root_container_id
;
774 printf("Root container id = %d\n", container_id
);
776 err
= dprc_open(root_mc_io
, MC_CMD_NO_FLAGS
, container_id
,
779 printf("dprc_open(): Root Container failed: %d\n", err
);
783 if (!root_dprc_handle
) {
784 printf("dprc_open(): Root Container Handle is not valid\n");
788 cfg
.options
= DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED
|
789 DPRC_CFG_OPT_OBJ_CREATE_ALLOWED
|
790 DPRC_CFG_OPT_ALLOC_ALLOWED
;
791 cfg
.icid
= DPRC_GET_ICID_FROM_POOL
;
793 err
= dprc_create_container(root_mc_io
, MC_CMD_NO_FLAGS
,
799 printf("dprc_create_container() failed: %d\n", err
);
803 dflt_mc_io
= (struct fsl_mc_io
*)malloc(sizeof(struct fsl_mc_io
));
806 printf(" No memory: malloc() failed\n");
810 child_portal_id
= MC_PORTAL_OFFSET_TO_PORTAL_ID(mc_portal_offset
);
811 dflt_mc_io
->mmio_regs
= SOC_MC_PORTAL_ADDR(child_portal_id
);
813 printf("MC portal of child DPRC container: %d, physical addr %p)\n",
814 child_dprc_id
, dflt_mc_io
->mmio_regs
);
817 err
= dprc_open(dflt_mc_io
, MC_CMD_NO_FLAGS
, child_dprc_id
,
820 printf("dprc_open(): Child container failed: %d\n", err
);
824 if (!dflt_dprc_handle
) {
825 printf("dprc_open(): Child container Handle is not valid\n");
833 dprc_destroy_container(root_mc_io
, MC_CMD_NO_FLAGS
,
834 root_dprc_handle
, child_dprc_id
);
836 dprc_close(root_mc_io
, MC_CMD_NO_FLAGS
, root_dprc_handle
);
838 err_root_container_id
:
842 static int dprc_exit(void)
846 err
= dprc_close(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dprc_handle
);
848 printf("dprc_close(): Child failed: %d\n", err
);
852 err
= dprc_destroy_container(root_mc_io
, MC_CMD_NO_FLAGS
,
853 root_dprc_handle
, child_dprc_id
);
855 printf("dprc_destroy_container() failed: %d\n", err
);
859 err
= dprc_close(root_mc_io
, MC_CMD_NO_FLAGS
, root_dprc_handle
);
861 printf("dprc_close(): Root failed: %d\n", err
);
877 static int dpbp_init(void)
880 struct dpbp_attr dpbp_attr
;
881 struct dpbp_cfg dpbp_cfg
;
883 dflt_dpbp
= (struct fsl_dpbp_obj
*)malloc(sizeof(struct fsl_dpbp_obj
));
885 printf("No memory: malloc() failed\n");
890 dpbp_cfg
.options
= 512;
892 err
= dpbp_create(dflt_mc_io
, MC_CMD_NO_FLAGS
, &dpbp_cfg
,
893 &dflt_dpbp
->dpbp_handle
);
897 printf("dpbp_create() failed: %d\n", err
);
901 memset(&dpbp_attr
, 0, sizeof(struct dpbp_attr
));
902 err
= dpbp_get_attributes(dflt_mc_io
, MC_CMD_NO_FLAGS
,
903 dflt_dpbp
->dpbp_handle
,
906 printf("dpbp_get_attributes() failed: %d\n", err
);
910 dflt_dpbp
->dpbp_attr
.id
= dpbp_attr
.id
;
912 printf("Init: DPBP id=0x%d\n", dflt_dpbp
->dpbp_attr
.id
);
915 err
= dpbp_close(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpbp
->dpbp_handle
);
917 printf("dpbp_close() failed: %d\n", err
);
926 dpbp_close(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpbp
->dpbp_handle
);
927 dpbp_destroy(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpbp
->dpbp_handle
);
933 static int dpbp_exit(void)
937 err
= dpbp_open(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpbp
->dpbp_attr
.id
,
938 &dflt_dpbp
->dpbp_handle
);
940 printf("dpbp_open() failed: %d\n", err
);
944 err
= dpbp_destroy(dflt_mc_io
, MC_CMD_NO_FLAGS
,
945 dflt_dpbp
->dpbp_handle
);
947 printf("dpbp_destroy() failed: %d\n", err
);
952 printf("Exit: DPBP id=0x%d\n", dflt_dpbp
->dpbp_attr
.id
);
963 static int dpni_init(void)
966 struct dpni_attr dpni_attr
;
967 struct dpni_cfg dpni_cfg
;
969 dflt_dpni
= (struct fsl_dpni_obj
*)malloc(sizeof(struct fsl_dpni_obj
));
971 printf("No memory: malloc() failed\n");
976 memset(&dpni_cfg
, 0, sizeof(dpni_cfg
));
977 dpni_cfg
.adv
.options
= DPNI_OPT_UNICAST_FILTER
|
978 DPNI_OPT_MULTICAST_FILTER
;
980 err
= dpni_create(dflt_mc_io
, MC_CMD_NO_FLAGS
, &dpni_cfg
,
981 &dflt_dpni
->dpni_handle
);
985 printf("dpni_create() failed: %d\n", err
);
989 memset(&dpni_attr
, 0, sizeof(struct dpni_attr
));
990 err
= dpni_get_attributes(dflt_mc_io
, MC_CMD_NO_FLAGS
,
991 dflt_dpni
->dpni_handle
,
994 printf("dpni_get_attributes() failed: %d\n", err
);
998 dflt_dpni
->dpni_id
= dpni_attr
.id
;
1000 printf("Init: DPNI id=0x%d\n", dflt_dpni
->dpni_id
);
1003 err
= dpni_close(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpni
->dpni_handle
);
1005 printf("dpni_close() failed: %d\n", err
);
1014 dpni_close(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpni
->dpni_handle
);
1015 dpni_destroy(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpni
->dpni_handle
);
1021 static int dpni_exit(void)
1025 err
= dpni_open(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpni
->dpni_id
,
1026 &dflt_dpni
->dpni_handle
);
1028 printf("dpni_open() failed: %d\n", err
);
1032 err
= dpni_destroy(dflt_mc_io
, MC_CMD_NO_FLAGS
,
1033 dflt_dpni
->dpni_handle
);
1035 printf("dpni_destroy() failed: %d\n", err
);
1040 printf("Exit: DPNI id=0x%d\n", dflt_dpni
->dpni_id
);
1051 static int mc_init_object(void)
1057 printf("dprc_init() failed: %d\n", err
);
1063 printf("dpbp_init() failed: %d\n", err
);
1069 printf("dpio_init() failed: %d\n", err
);
1075 printf("dpni_init() failed: %d\n", err
);
1084 int fsl_mc_ldpaa_exit(bd_t
*bd
)
1088 if (bd
&& get_mc_boot_status() == -1)
1091 if (bd
&& !get_mc_boot_status() && get_dpl_apply_status() == -1) {
1092 printf("ERROR: fsl-mc: DPL is not applied\n");
1097 if (bd
&& !get_mc_boot_status() && !get_dpl_apply_status())
1102 printf("dpni_exit() failed: %d\n", err
);
1108 printf("dpio_exit() failed: %d\n", err
);
1114 printf("dpni_exit() failed: %d\n", err
);
1120 printf("dprc_exit() failed: %d\n", err
);
1129 static int do_fsl_mc(cmd_tbl_t
*cmdtp
, int flag
, int argc
, char * const argv
[])
1135 switch (argv
[1][0]) {
1138 u64 mc_fw_addr
, mc_dpc_addr
;
1139 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
1143 sub_cmd
= argv
[2][0];
1149 if (get_mc_boot_status() == 0) {
1150 printf("fsl-mc: MC is already booted");
1154 mc_fw_addr
= simple_strtoull(argv
[3], NULL
, 16);
1155 mc_dpc_addr
= simple_strtoull(argv
[4], NULL
,
1158 if (!mc_init(mc_fw_addr
, mc_dpc_addr
))
1159 err
= mc_init_object();
1162 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
1166 if (get_aiop_apply_status() == 0) {
1167 printf("fsl-mc: AIOP FW is already");
1168 printf(" applied\n");
1172 aiop_fw_addr
= simple_strtoull(argv
[3], NULL
,
1175 err
= load_mc_aiop_img(aiop_fw_addr
);
1177 printf("fsl-mc: AIOP FW applied\n");
1181 printf("Invalid option: %s\n", argv
[2]);
1195 if (get_dpl_apply_status() == 0) {
1196 printf("fsl-mc: DPL already applied\n");
1200 mc_dpl_addr
= simple_strtoull(argv
[3], NULL
,
1203 if (get_mc_boot_status() != 0) {
1204 printf("fsl-mc: Deploying data path layout ..");
1205 printf("ERROR (MC is not booted)\n");
1209 if (!fsl_mc_ldpaa_exit(NULL
))
1210 err
= mc_apply_dpl(mc_dpl_addr
);
1214 printf("Invalid option: %s\n", argv
[1]);
1220 return CMD_RET_USAGE
;
1224 fsl_mc
, CONFIG_SYS_MAXARGS
, 1, do_fsl_mc
,
1225 "DPAA2 command to manage Management Complex (MC)",
1226 "start mc [FW_addr] [DPC_addr] - Start Management Complex\n"
1227 "fsl_mc apply DPL [DPL_addr] - Apply DPL file\n"
1228 "fsl_mc start aiop [FW_addr] - Start AIOP\n"