drivers/net/fsl-mc/mc.c

   1 /*
   2  * Copyright (C) 2014 Freescale Semiconductor
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6 #include <errno.h>
   7 #include <asm/io.h>
   8 #include <fsl-mc/fsl_mc.h>
   9 #include <fsl-mc/fsl_mc_sys.h>
  10 #include <fsl-mc/fsl_mc_private.h>
  11 #include <fsl-mc/fsl_dpmng.h>
  12 #include <fsl-mc/fsl_dprc.h>
  13 #include <fsl-mc/fsl_dpio.h>
  14 #include <fsl-mc/fsl_qbman_portal.h>
  15
  16 #define MC_RAM_BASE_ADDR_ALIGNMENT  (512UL * 1024 * 1024)
  17 #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1))
  18 #define MC_RAM_SIZE_ALIGNMENT       (256UL * 1024 * 1024)
  19
  20 #define MC_MEM_SIZE_ENV_VAR     "mcmemsize"
  21 #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout"
  22
  23 DECLARE_GLOBAL_DATA_PTR;
  24 static int mc_boot_status;
  25 struct fsl_mc_io *dflt_mc_io = NULL;
  26 uint16_t dflt_dprc_handle = 0;
  27 struct fsl_dpbp_obj *dflt_dpbp = NULL;
  28 struct fsl_dpio_obj *dflt_dpio = NULL;
  29 uint16_t dflt_dpio_handle = 0;
  30
  31 #ifdef DEBUG
  32 void dump_ram_words(const char *title, void *addr)
  33 {
  34         int i;
  35         uint32_t *words = addr;
  36
  37         printf("Dumping beginning of %s (%p):\n", title, addr);
  38         for (i = 0; i < 16; i++)
  39                 printf("%#x ", words[i]);
  40
  41         printf("\n");
  42 }
  43
  44 void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs)
  45 {
  46         printf("MC CCSR registers:\n"
  47                 "reg_gcr1 %#x\n"
  48                 "reg_gsr %#x\n"
  49                 "reg_sicbalr %#x\n"
  50                 "reg_sicbahr %#x\n"
  51                 "reg_sicapr %#x\n"
  52                 "reg_mcfbalr %#x\n"
  53                 "reg_mcfbahr %#x\n"
  54                 "reg_mcfapr %#x\n"
  55                 "reg_psr %#x\n",
  56                 mc_ccsr_regs->reg_gcr1,
  57                 mc_ccsr_regs->reg_gsr,
  58                 mc_ccsr_regs->reg_sicbalr,
  59                 mc_ccsr_regs->reg_sicbahr,
  60                 mc_ccsr_regs->reg_sicapr,
  61                 mc_ccsr_regs->reg_mcfbalr,
  62                 mc_ccsr_regs->reg_mcfbahr,
  63                 mc_ccsr_regs->reg_mcfapr,
  64                 mc_ccsr_regs->reg_psr);
  65 }
  66 #else
  67
  68 #define dump_ram_words(title, addr)
  69 #define dump_mc_ccsr_regs(mc_ccsr_regs)
  70
  71 #endif /* DEBUG */
  72
  73 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
  74 /**
  75  * Copying MC firmware or DPL image to DDR
  76  */
  77 static int mc_copy_image(const char *title,
  78                          u64 image_addr, u32 image_size, u64 mc_ram_addr)
  79 {
  80         debug("%s copied to address %p\n", title, (void *)mc_ram_addr);
  81         memcpy((void *)mc_ram_addr, (void *)image_addr, image_size);
  82         flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size);
  83         return 0;
  84 }
  85
  86 /**
  87  * MC firmware FIT image parser checks if the image is in FIT
  88  * format, verifies integrity of the image and calculates
  89  * raw image address and size values.
  90  * Returns 0 on success and a negative errno on error.
  91  * task fail.
  92  **/
  93 int parse_mc_firmware_fit_image(const void **raw_image_addr,
  94                                 size_t *raw_image_size)
  95 {
  96         int format;
  97         void *fit_hdr;
  98         int node_offset;
  99         const void *data;
 100         size_t size;
 101         const char *uname = "firmware";
 102
 103         /* Check if the image is in NOR flash */
 104 #ifdef CONFIG_SYS_LS_MC_FW_IN_NOR
 105         fit_hdr = (void *)CONFIG_SYS_LS_MC_FW_ADDR;
 106 #else
 107 #error "No CONFIG_SYS_LS_MC_FW_IN_xxx defined"
 108 #endif
 109
 110         /* Check if Image is in FIT format */
 111         format = genimg_get_format(fit_hdr);
 112
 113         if (format != IMAGE_FORMAT_FIT) {
 114                 printf("fsl-mc: ERROR: Bad firmware image (not a FIT image)\n");
 115                 return -EINVAL;
 116         }
 117
 118         if (!fit_check_format(fit_hdr)) {
 119                 printf("fsl-mc: ERROR: Bad firmware image (bad FIT header)\n");
 120                 return -EINVAL;
 121         }
 122
 123         node_offset = fit_image_get_node(fit_hdr, uname);
 124
 125         if (node_offset < 0) {
 126                 printf("fsl-mc: ERROR: Bad firmware image (missing subimage)\n");
 127                 return -ENOENT;
 128         }
 129
 130         /* Verify MC firmware image */
 131         if (!(fit_image_verify(fit_hdr, node_offset))) {
 132                 printf("fsl-mc: ERROR: Bad firmware image (bad CRC)\n");
 133                 return -EINVAL;
 134         }
 135
 136         /* Get address and size of raw image */
 137         fit_image_get_data(fit_hdr, node_offset, &data, &size);
 138
 139         *raw_image_addr = data;
 140         *raw_image_size = size;
 141
 142         return 0;
 143 }
 144 #endif
 145
 146 /*
 147  * Calculates the values to be used to specify the address range
 148  * for the MC private DRAM block, in the MCFBALR/MCFBAHR registers.
 149  * It returns the highest 512MB-aligned address within the given
 150  * address range, in '*aligned_base_addr', and the number of 256 MiB
 151  * blocks in it, in 'num_256mb_blocks'.
 152  */
 153 static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr,
 154                                            size_t mc_ram_size,
 155                                            u64 *aligned_base_addr,
 156                                            u8 *num_256mb_blocks)
 157 {
 158         u64 addr;
 159         u16 num_blocks;
 160
 161         if (mc_ram_size % MC_RAM_SIZE_ALIGNMENT != 0) {
 162                 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
 163                        mc_ram_size);
 164                 return -EINVAL;
 165         }
 166
 167         num_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
 168         if (num_blocks < 1 || num_blocks > 0xff) {
 169                 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
 170                        mc_ram_size);
 171                 return -EINVAL;
 172         }
 173
 174         addr = (mc_private_ram_start_addr + mc_ram_size - 1) &
 175                 MC_RAM_BASE_ADDR_ALIGNMENT_MASK;
 176
 177         if (addr < mc_private_ram_start_addr) {
 178                 printf("fsl-mc: ERROR: bad start address %#llx\n",
 179                        mc_private_ram_start_addr);
 180                 return -EFAULT;
 181         }
 182
 183         *aligned_base_addr = addr;
 184         *num_256mb_blocks = num_blocks;
 185         return 0;
 186 }
 187
 188 static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size)
 189 {
 190         u64 mc_dpc_offset;
 191 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
 192         int error;
 193         void *dpc_fdt_hdr;
 194         int dpc_size;
 195 #endif
 196
 197 #ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
 198         BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 ||
 199                      CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff);
 200
 201         mc_dpc_offset = CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET;
 202 #else
 203 #error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined"
 204 #endif
 205
 206         /*
 207          * Load the MC DPC blob in the MC private DRAM block:
 208          */
 209 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
 210         printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset);
 211 #else
 212         /*
 213          * Get address and size of the DPC blob stored in flash:
 214          */
 215 #ifdef CONFIG_SYS_LS_MC_DPC_IN_NOR
 216         dpc_fdt_hdr = (void *)CONFIG_SYS_LS_MC_DPC_ADDR;
 217 #else
 218 #error "No CONFIG_SYS_LS_MC_DPC_IN_xxx defined"
 219 #endif
 220
 221         error = fdt_check_header(dpc_fdt_hdr);
 222         if (error != 0) {
 223                 /*
 224                  * Don't return with error here, since the MC firmware can
 225                  * still boot without a DPC
 226                  */
 227                 printf("\nfsl-mc: WARNING: No DPC image found");
 228                 return 0;
 229         }
 230
 231         dpc_size = fdt_totalsize(dpc_fdt_hdr);
 232         if (dpc_size > CONFIG_SYS_LS_MC_DPC_MAX_LENGTH) {
 233                 printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n",
 234                        dpc_size);
 235                 return -EINVAL;
 236         }
 237
 238         mc_copy_image("MC DPC blob",
 239                       (u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset);
 240 #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */
 241
 242         dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset));
 243         return 0;
 244 }
 245
 246 static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size)
 247 {
 248         u64 mc_dpl_offset;
 249 #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR
 250         int error;
 251         void *dpl_fdt_hdr;
 252         int dpl_size;
 253 #endif
 254
 255 #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
 256         BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
 257                      CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
 258
 259         mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET;
 260 #else
 261 #error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined"
 262 #endif
 263
 264         /*
 265          * Load the MC DPL blob in the MC private DRAM block:
 266          */
 267 #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR
 268         printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset);
 269 #else
 270         /*
 271          * Get address and size of the DPL blob stored in flash:
 272          */
 273 #ifdef CONFIG_SYS_LS_MC_DPL_IN_NOR
 274         dpl_fdt_hdr = (void *)CONFIG_SYS_LS_MC_DPL_ADDR;
 275 #else
 276 #error "No CONFIG_SYS_LS_MC_DPL_IN_xxx defined"
 277 #endif
 278
 279         error = fdt_check_header(dpl_fdt_hdr);
 280         if (error != 0) {
 281                 printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n");
 282                 return error;
 283         }
 284
 285         dpl_size = fdt_totalsize(dpl_fdt_hdr);
 286         if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) {
 287                 printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n",
 288                        dpl_size);
 289                 return -EINVAL;
 290         }
 291
 292         mc_copy_image("MC DPL blob",
 293                       (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset);
 294 #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */
 295
 296         dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset));
 297         return 0;
 298 }
 299
 300 /**
 301  * Return the MC boot timeout value in milliseconds
 302  */
 303 static unsigned long get_mc_boot_timeout_ms(void)
 304 {
 305         unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
 306
 307         char *timeout_ms_env_var = getenv(MC_BOOT_TIMEOUT_ENV_VAR);
 308
 309         if (timeout_ms_env_var) {
 310                 timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10);
 311                 if (timeout_ms == 0) {
 312                         printf("fsl-mc: WARNING: Invalid value for \'"
 313                                MC_BOOT_TIMEOUT_ENV_VAR
 314                                "\' environment variable: %lu\n",
 315                                timeout_ms);
 316
 317                         timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
 318                 }
 319         }
 320
 321         return timeout_ms;
 322 }
 323
 324 #ifdef CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR
 325 static int load_mc_aiop_img(u64 mc_ram_addr, size_t mc_ram_size)
 326 {
 327         void *aiop_img;
 328
 329         /*
 330          * Load the MC AIOP image in the MC private DRAM block:
 331          */
 332
 333         aiop_img = (void *)CONFIG_SYS_LS_MC_AIOP_IMG_ADDR;
 334         mc_copy_image("MC AIOP image",
 335                       (u64)aiop_img, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH,
 336                       mc_ram_addr + CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
 337
 338         return 0;
 339 }
 340 #endif
 341 static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
 342 {
 343         u32 reg_gsr;
 344         u32 mc_fw_boot_status;
 345         unsigned long timeout_ms = get_mc_boot_timeout_ms();
 346         struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
 347
 348         dmb();
 349         assert(timeout_ms > 0);
 350         for (;;) {
 351                 udelay(1000);   /* throttle polling */
 352                 reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr);
 353                 mc_fw_boot_status = (reg_gsr & GSR_FS_MASK);
 354                 if (mc_fw_boot_status & 0x1)
 355                         break;
 356
 357                 timeout_ms--;
 358                 if (timeout_ms == 0)
 359                         break;
 360         }
 361
 362         if (timeout_ms == 0) {
 363                 printf("ERROR: timeout\n");
 364
 365                 /* TODO: Get an error status from an MC CCSR register */
 366                 return -ETIMEDOUT;
 367         }
 368
 369         if (mc_fw_boot_status != 0x1) {
 370                 /*
 371                  * TODO: Identify critical errors from the GSR register's FS
 372                  * field and for those errors, set error to -ENODEV or other
 373                  * appropriate errno, so that the status property is set to
 374                  * failure in the fsl,dprc device tree node.
 375                  */
 376                 printf("WARNING: Firmware returned an error (GSR: %#x)\n",
 377                        reg_gsr);
 378         } else {
 379                 printf("SUCCESS\n");
 380         }
 381
 382
 383         *final_reg_gsr = reg_gsr;
 384         return 0;
 385 }
 386
 387 int mc_init(void)
 388 {
 389         int error = 0;
 390         int portal_id = 0;
 391         struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
 392         u64 mc_ram_addr;
 393         u32 reg_gsr;
 394         u32 reg_mcfbalr;
 395 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
 396         const void *raw_image_addr;
 397         size_t raw_image_size = 0;
 398 #endif
 399         struct mc_version mc_ver_info;
 400         u64 mc_ram_aligned_base_addr;
 401         u8 mc_ram_num_256mb_blocks;
 402         size_t mc_ram_size = mc_get_dram_block_size();
 403
 404         /*
 405          * The MC private DRAM block was already carved at the end of DRAM
 406          * by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE:
 407          */
 408         if (gd->bd->bi_dram[1].start) {
 409                 mc_ram_addr =
 410                         gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size;
 411         } else {
 412                 mc_ram_addr =
 413                         gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
 414         }
 415
 416         error = calculate_mc_private_ram_params(mc_ram_addr,
 417                                                 mc_ram_size,
 418                                                 &mc_ram_aligned_base_addr,
 419                                                 &mc_ram_num_256mb_blocks);
 420         if (error != 0)
 421                 goto out;
 422
 423         /*
 424          * Management Complex cores should be held at reset out of POR.
 425          * U-boot should be the first software to touch MC. To be safe,
 426          * we reset all cores again by setting GCR1 to 0. It doesn't do
 427          * anything if they are held at reset. After we setup the firmware
 428          * we kick off MC by deasserting the reset bit for core 0, and
 429          * deasserting the reset bits for Command Portal Managers.
 430          * The stop bits are not touched here. They are used to stop the
 431          * cores when they are active. Setting stop bits doesn't stop the
 432          * cores from fetching instructions when they are released from
 433          * reset.
 434          */
 435         out_le32(&mc_ccsr_regs->reg_gcr1, 0);
 436         dmb();
 437
 438 #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR
 439         printf("MC firmware is preloaded to %#llx\n", mc_ram_addr);
 440 #else
 441         error = parse_mc_firmware_fit_image(&raw_image_addr, &raw_image_size);
 442         if (error != 0)
 443                 goto out;
 444         /*
 445          * Load the MC FW at the beginning of the MC private DRAM block:
 446          */
 447         mc_copy_image("MC Firmware",
 448                       (u64)raw_image_addr, raw_image_size, mc_ram_addr);
 449 #endif
 450         dump_ram_words("firmware", (void *)mc_ram_addr);
 451
 452         error = load_mc_dpc(mc_ram_addr, mc_ram_size);
 453         if (error != 0)
 454                 goto out;
 455
 456         error = load_mc_dpl(mc_ram_addr, mc_ram_size);
 457         if (error != 0)
 458                 goto out;
 459
 460 #ifdef CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR
 461         error = load_mc_aiop_img(mc_ram_addr, mc_ram_size);
 462         if (error != 0)
 463                 goto out;
 464 #endif
 465
 466         debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
 467         dump_mc_ccsr_regs(mc_ccsr_regs);
 468
 469         /*
 470          * Tell MC what is the address range of the DRAM block assigned to it:
 471          */
 472         reg_mcfbalr = (u32)mc_ram_aligned_base_addr |
 473                       (mc_ram_num_256mb_blocks - 1);
 474         out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr);
 475         out_le32(&mc_ccsr_regs->reg_mcfbahr,
 476                  (u32)(mc_ram_aligned_base_addr >> 32));
 477         out_le32(&mc_ccsr_regs->reg_mcfapr, MCFAPR_BYPASS_ICID_MASK);
 478
 479         /*
 480          * Tell the MC that we want delayed DPL deployment.
 481          */
 482         out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00);
 483
 484         printf("\nfsl-mc: Booting Management Complex ... ");
 485
 486         /*
 487          * Deassert reset and release MC core 0 to run
 488          */
 489         out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST);
 490         error = wait_for_mc(true, &reg_gsr);
 491         if (error != 0)
 492                 goto out;
 493
 494         /*
 495          * TODO: need to obtain the portal_id for the root container from the
 496          * DPL
 497          */
 498         portal_id = 0;
 499
 500         /*
 501          * Initialize the global default MC portal
 502          * And check that the MC firmware is responding portal commands:
 503          */
 504         dflt_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
 505         if (!dflt_mc_io) {
 506                 printf(" No memory: malloc() failed\n");
 507                 return -ENOMEM;
 508         }
 509
 510         dflt_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id);
 511         debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
 512               portal_id, dflt_mc_io->mmio_regs);
 513
 514         error = mc_get_version(dflt_mc_io, &mc_ver_info);
 515         if (error != 0) {
 516                 printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
 517                        error);
 518                 goto out;
 519         }
 520
 521         if (MC_VER_MAJOR != mc_ver_info.major)
 522                 printf("fsl-mc: ERROR: Firmware major version mismatch (found: %d, expected: %d)\n",
 523                        mc_ver_info.major, MC_VER_MAJOR);
 524
 525         if (MC_VER_MINOR != mc_ver_info.minor)
 526                 printf("fsl-mc: WARNING: Firmware minor version mismatch (found: %d, expected: %d)\n",
 527                        mc_ver_info.minor, MC_VER_MINOR);
 528
 529         printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
 530                mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
 531                reg_gsr & GSR_FS_MASK);
 532
 533         /*
 534          * Tell the MC to deploy the DPL:
 535          */
 536         out_le32(&mc_ccsr_regs->reg_gsr, 0x0);
 537         printf("fsl-mc: Deploying data path layout ... ");
 538         error = wait_for_mc(false, &reg_gsr);
 539         if (error != 0)
 540                 goto out;
 541
 542 out:
 543         if (error != 0)
 544                 mc_boot_status = -error;
 545         else
 546                 mc_boot_status = 0;
 547
 548         return error;
 549 }
 550
 551 int get_mc_boot_status(void)
 552 {
 553         return mc_boot_status;
 554 }
 555
 556 /**
 557  * Return the actual size of the MC private DRAM block.
 558  */
 559 unsigned long mc_get_dram_block_size(void)
 560 {
 561         unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
 562
 563         char *dram_block_size_env_var = getenv(MC_MEM_SIZE_ENV_VAR);
 564
 565         if (dram_block_size_env_var) {
 566                 dram_block_size = simple_strtoul(dram_block_size_env_var, NULL,
 567                                                  10);
 568
 569                 if (dram_block_size < CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE) {
 570                         printf("fsl-mc: WARNING: Invalid value for \'"
 571                                MC_MEM_SIZE_ENV_VAR
 572                                "\' environment variable: %lu\n",
 573                                dram_block_size);
 574
 575                         dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
 576                 }
 577         }
 578
 579         return dram_block_size;
 580 }
 581
 582 int dpio_init(struct dprc_obj_desc obj_desc)
 583 {
 584         struct qbman_swp_desc p_des;
 585         struct dpio_attr attr;
 586         int err = 0;
 587
 588         dflt_dpio = (struct fsl_dpio_obj *)malloc(sizeof(struct fsl_dpio_obj));
 589         if (!dflt_dpio) {
 590                 printf(" No memory: malloc() failed\n");
 591                 return -ENOMEM;
 592         }
 593
 594         dflt_dpio->dpio_id = obj_desc.id;
 595
 596         err = dpio_open(dflt_mc_io, obj_desc.id, &dflt_dpio_handle);
 597         if (err) {
 598                 printf("dpio_open() failed\n");
 599                 goto err_open;
 600         }
 601
 602         err = dpio_get_attributes(dflt_mc_io, dflt_dpio_handle, &attr);
 603         if (err) {
 604                 printf("dpio_get_attributes() failed %d\n", err);
 605                 goto err_get_attr;
 606         }
 607
 608         err = dpio_enable(dflt_mc_io, dflt_dpio_handle);
 609         if (err) {
 610                 printf("dpio_enable() failed %d\n", err);
 611                 goto err_get_enable;
 612         }
 613         debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n",
 614               attr.qbman_portal_ce_offset,
 615               attr.qbman_portal_ci_offset,
 616               attr.qbman_portal_id,
 617               attr.num_priorities);
 618
 619         p_des.cena_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
 620                                         + attr.qbman_portal_ce_offset);
 621         p_des.cinh_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
 622                                         + attr.qbman_portal_ci_offset);
 623
 624         dflt_dpio->sw_portal = qbman_swp_init(&p_des);
 625         if (dflt_dpio->sw_portal == NULL) {
 626                 printf("qbman_swp_init() failed\n");
 627                 goto err_get_swp_init;
 628         }
 629         return 0;
 630
 631 err_get_swp_init:
 632 err_get_enable:
 633         dpio_disable(dflt_mc_io, dflt_dpio_handle);
 634 err_get_attr:
 635         dpio_close(dflt_mc_io, dflt_dpio_handle);
 636 err_open:
 637         free(dflt_dpio);
 638         return err;
 639 }
 640
 641 int dpbp_init(struct dprc_obj_desc obj_desc)
 642 {
 643         dflt_dpbp = (struct fsl_dpbp_obj *)malloc(sizeof(struct fsl_dpbp_obj));
 644         if (!dflt_dpbp) {
 645                 printf(" No memory: malloc() failed\n");
 646                 return -ENOMEM;
 647         }
 648         dflt_dpbp->dpbp_attr.id = obj_desc.id;
 649
 650         return 0;
 651 }
 652
 653 int dprc_init_container_obj(struct dprc_obj_desc obj_desc, uint16_t dprc_handle)
 654 {
 655         int error = 0, state = 0;
 656         struct dprc_endpoint dpni_endpoint, dpmac_endpoint;
 657         if (!strcmp(obj_desc.type, "dpbp")) {
 658                 if (!dflt_dpbp) {
 659                         error = dpbp_init(obj_desc);
 660                         if (error < 0)
 661                                 printf("dpbp_init failed\n");
 662                 }
 663         } else if (!strcmp(obj_desc.type, "dpio")) {
 664                 if (!dflt_dpio) {
 665                         error = dpio_init(obj_desc);
 666                         if (error < 0)
 667                                 printf("dpio_init failed\n");
 668                 }
 669         } else if (!strcmp(obj_desc.type, "dpni")) {
 670                 strcpy(dpni_endpoint.type, obj_desc.type);
 671                 dpni_endpoint.id = obj_desc.id;
 672                 error = dprc_get_connection(dflt_mc_io, dprc_handle,
 673                                      &dpni_endpoint, &dpmac_endpoint, &state);
 674                 if (!strcmp(dpmac_endpoint.type, "dpmac"))
 675                         error = ldpaa_eth_init(obj_desc);
 676                 if (error < 0)
 677                         printf("ldpaa_eth_init failed\n");
 678         }
 679
 680         return error;
 681 }
 682
 683 int dprc_scan_container_obj(uint16_t dprc_handle, char *obj_type, int i)
 684 {
 685         int error = 0;
 686         struct dprc_obj_desc obj_desc;
 687
 688         memset((void *)&obj_desc, 0x00, sizeof(struct dprc_obj_desc));
 689
 690         error = dprc_get_obj(dflt_mc_io, dprc_handle,
 691                              i, &obj_desc);
 692         if (error < 0) {
 693                 printf("dprc_get_obj(i=%d) failed: %d\n",
 694                        i, error);
 695                 return error;
 696         }
 697
 698         if (!strcmp(obj_desc.type, obj_type)) {
 699                 debug("Discovered object: type %s, id %d, req %s\n",
 700                       obj_desc.type, obj_desc.id, obj_type);
 701
 702                 error = dprc_init_container_obj(obj_desc, dprc_handle);
 703                 if (error < 0) {
 704                         printf("dprc_init_container_obj(i=%d) failed: %d\n",
 705                                i, error);
 706                         return error;
 707                 }
 708         }
 709
 710         return error;
 711 }
 712
 713 int fsl_mc_ldpaa_init(bd_t *bis)
 714 {
 715         int i, error = 0;
 716         int dprc_opened = 0, container_id;
 717         int num_child_objects = 0;
 718
 719         error = mc_init();
 720         if (error < 0)
 721                 goto error;
 722
 723         error = dprc_get_container_id(dflt_mc_io, &container_id);
 724         if (error < 0) {
 725                 printf("dprc_get_container_id() failed: %d\n", error);
 726                 goto error;
 727         }
 728
 729         debug("fsl-mc: Container id=0x%x\n", container_id);
 730
 731         error = dprc_open(dflt_mc_io, container_id, &dflt_dprc_handle);
 732         if (error < 0) {
 733                 printf("dprc_open() failed: %d\n", error);
 734                 goto error;
 735         }
 736         dprc_opened = true;
 737
 738         error = dprc_get_obj_count(dflt_mc_io,
 739                                    dflt_dprc_handle,
 740                                    &num_child_objects);
 741         if (error < 0) {
 742                 printf("dprc_get_obj_count() failed: %d\n", error);
 743                 goto error;
 744         }
 745         debug("Total child in container %d = %d\n", container_id,
 746               num_child_objects);
 747
 748         if (num_child_objects != 0) {
 749                 /*
 750                  * Discover objects currently in the DPRC container in the MC:
 751                  */
 752                 for (i = 0; i < num_child_objects; i++)
 753                         error = dprc_scan_container_obj(dflt_dprc_handle,
 754                                                         "dpbp", i);
 755
 756                 for (i = 0; i < num_child_objects; i++)
 757                         error = dprc_scan_container_obj(dflt_dprc_handle,
 758                                                         "dpio", i);
 759
 760                 for (i = 0; i < num_child_objects; i++)
 761                         error = dprc_scan_container_obj(dflt_dprc_handle,
 762                                                         "dpni", i);
 763         }
 764 error:
 765         if (dprc_opened)
 766                 dprc_close(dflt_mc_io, dflt_dprc_handle);
 767
 768         return error;
 769 }
 770
 771 void fsl_mc_ldpaa_exit(bd_t *bis)
 772 {
 773         int err;
 774
 775         if (get_mc_boot_status() == 0) {
 776                 err = dpio_disable(dflt_mc_io, dflt_dpio_handle);
 777                 if (err < 0) {
 778                         printf("dpio_disable() failed: %d\n", err);
 779                         return;
 780                 }
 781                 err = dpio_reset(dflt_mc_io, dflt_dpio_handle);
 782                 if (err < 0) {
 783                         printf("dpio_reset() failed: %d\n", err);
 784                         return;
 785                 }
 786                 err = dpio_close(dflt_mc_io, dflt_dpio_handle);
 787                 if (err < 0) {
 788                         printf("dpio_close() failed: %d\n", err);
 789                         return;
 790                 }
 791
 792                 free(dflt_dpio);
 793                 free(dflt_dpbp);
 794         }
 795
 796         if (dflt_mc_io)
 797                 free(dflt_mc_io);
 798 }