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git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/net/xilinx_emaclite.c
2 * (C) Copyright 2007-2009 Michal Simek
3 * (C) Copyright 2003 Xilinx Inc.
5 * Michal SIMEK <monstr@monstr.eu>
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #define ENET_MAX_MTU PKTSIZE
35 #define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN
36 #define ENET_ADDR_LENGTH 6
38 /* EmacLite constants */
39 #define XEL_BUFFER_OFFSET 0x0800 /* Next buffer's offset */
40 #define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */
41 #define XEL_TSR_OFFSET 0x07FC /* Tx status */
42 #define XEL_RSR_OFFSET 0x17FC /* Rx status */
43 #define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */
46 #define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL
47 /* Xmit interrupt enable bit */
48 #define XEL_TSR_XMIT_IE_MASK 0x00000008UL
49 /* Buffer is active, SW bit only */
50 #define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000UL
51 /* Program the MAC address */
52 #define XEL_TSR_PROGRAM_MASK 0x00000002UL
53 /* define for programming the MAC address into the EMAC Lite */
54 #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)
56 /* Transmit packet length upper byte */
57 #define XEL_TPLR_LENGTH_MASK_HI 0x0000FF00UL
58 /* Transmit packet length lower byte */
59 #define XEL_TPLR_LENGTH_MASK_LO 0x000000FFUL
62 #define XEL_RSR_RECV_DONE_MASK 0x00000001UL
63 /* Recv interrupt enable bit */
64 #define XEL_RSR_RECV_IE_MASK 0x00000008UL
67 u32 nexttxbuffertouse
; /* Next TX buffer to write to */
68 u32 nextrxbuffertouse
; /* Next RX buffer to read from */
71 static u32 etherrxbuff
[PKTSIZE_ALIGN
/4]; /* Receive buffer */
73 static void xemaclite_alignedread (u32
*srcptr
, void *destptr
, u32 bytecount
)
82 from32ptr
= (u32
*) srcptr
;
84 /* Word aligned buffer, no correction needed. */
85 to32ptr
= (u32
*) destptr
;
86 while (bytecount
> 3) {
87 *to32ptr
++ = *from32ptr
++;
90 to8ptr
= (u8
*) to32ptr
;
92 alignbuffer
= *from32ptr
++;
93 from8ptr
= (u8
*) & alignbuffer
;
95 for (i
= 0; i
< bytecount
; i
++) {
96 *to8ptr
++ = *from8ptr
++;
100 static void xemaclite_alignedwrite (void *srcptr
, u32 destptr
, u32 bytecount
)
104 u32
*to32ptr
= (u32
*) destptr
;
109 from32ptr
= (u32
*) srcptr
;
110 while (bytecount
> 3) {
112 *to32ptr
++ = *from32ptr
++;
117 to8ptr
= (u8
*) & alignbuffer
;
118 from8ptr
= (u8
*) from32ptr
;
120 for (i
= 0; i
< bytecount
; i
++) {
121 *to8ptr
++ = *from8ptr
++;
124 *to32ptr
++ = alignbuffer
;
127 static void emaclite_halt(struct eth_device
*dev
)
129 debug ("eth_halt\n");
132 static int emaclite_init(struct eth_device
*dev
, bd_t
*bis
)
134 debug ("EmacLite Initialization Started\n");
137 * TX - TX_PING & TX_PONG initialization
139 /* Restart PING TX */
140 out_be32 (dev
->iobase
+ XEL_TSR_OFFSET
, 0);
141 /* Copy MAC address */
142 xemaclite_alignedwrite (dev
->enetaddr
,
143 dev
->iobase
, ENET_ADDR_LENGTH
);
145 out_be32 (dev
->iobase
+ XEL_TPLR_OFFSET
, ENET_ADDR_LENGTH
);
146 /* Update the MAC address in the EMAC Lite */
147 out_be32 (dev
->iobase
+ XEL_TSR_OFFSET
, XEL_TSR_PROG_MAC_ADDR
);
148 /* Wait for EMAC Lite to finish with the MAC address update */
149 while ((in_be32 (dev
->iobase
+ XEL_TSR_OFFSET
) &
150 XEL_TSR_PROG_MAC_ADDR
) != 0)
153 #ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
154 /* The same operation with PONG TX */
155 out_be32 (dev
->iobase
+ XEL_TSR_OFFSET
+ XEL_BUFFER_OFFSET
, 0);
156 xemaclite_alignedwrite(dev
->enetaddr
, dev
->iobase
+
157 XEL_BUFFER_OFFSET
, ENET_ADDR_LENGTH
);
158 out_be32 (dev
->iobase
+ XEL_TPLR_OFFSET
, ENET_ADDR_LENGTH
);
159 out_be32 (dev
->iobase
+ XEL_TSR_OFFSET
+ XEL_BUFFER_OFFSET
,
160 XEL_TSR_PROG_MAC_ADDR
);
161 while ((in_be32 (dev
->iobase
+ XEL_TSR_OFFSET
+
162 XEL_BUFFER_OFFSET
) & XEL_TSR_PROG_MAC_ADDR
) != 0)
167 * RX - RX_PING & RX_PONG initialization
169 /* Write out the value to flush the RX buffer */
170 out_be32 (dev
->iobase
+ XEL_RSR_OFFSET
, XEL_RSR_RECV_IE_MASK
);
171 #ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
172 out_be32 (dev
->iobase
+ XEL_RSR_OFFSET
+ XEL_BUFFER_OFFSET
,
173 XEL_RSR_RECV_IE_MASK
);
176 debug ("EmacLite Initialization complete\n");
180 static int xemaclite_txbufferavailable(struct eth_device
*dev
)
185 struct xemaclite
*emaclite
= dev
->priv
;
188 * Read the other buffer register
189 * and determine if the other buffer is available
191 reg
= in_be32 (dev
->iobase
+
192 emaclite
->nexttxbuffertouse
+ 0);
193 txpingbusy
= ((reg
& XEL_TSR_XMIT_BUSY_MASK
) ==
194 XEL_TSR_XMIT_BUSY_MASK
);
196 reg
= in_be32 (dev
->iobase
+
197 (emaclite
->nexttxbuffertouse
^ XEL_TSR_OFFSET
) + 0);
198 txpongbusy
= ((reg
& XEL_TSR_XMIT_BUSY_MASK
) ==
199 XEL_TSR_XMIT_BUSY_MASK
);
201 return (!(txpingbusy
&& txpongbusy
));
204 static int emaclite_send (struct eth_device
*dev
, volatile void *ptr
, int len
)
208 struct xemaclite
*emaclite
= dev
->priv
;
212 if (len
> ENET_MAX_MTU
)
215 while (!xemaclite_txbufferavailable(dev
) && maxtry
) {
221 printf ("Error: Timeout waiting for ethernet TX buffer\n");
222 /* Restart PING TX */
223 out_be32 (dev
->iobase
+ XEL_TSR_OFFSET
, 0);
224 #ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
225 out_be32 (dev
->iobase
+ XEL_TSR_OFFSET
+
226 XEL_BUFFER_OFFSET
, 0);
231 /* Determine the expected TX buffer address */
232 baseaddress
= (dev
->iobase
+ emaclite
->nexttxbuffertouse
);
234 /* Determine if the expected buffer address is empty */
235 reg
= in_be32 (baseaddress
+ XEL_TSR_OFFSET
);
236 if (((reg
& XEL_TSR_XMIT_BUSY_MASK
) == 0)
237 && ((in_be32 ((baseaddress
) + XEL_TSR_OFFSET
)
238 & XEL_TSR_XMIT_ACTIVE_MASK
) == 0)) {
240 #ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
241 emaclite
->nexttxbuffertouse
^= XEL_BUFFER_OFFSET
;
243 debug ("Send packet from 0x%x\n", baseaddress
);
244 /* Write the frame to the buffer */
245 xemaclite_alignedwrite ((void *) ptr
, baseaddress
, len
);
246 out_be32 (baseaddress
+ XEL_TPLR_OFFSET
,(len
&
247 (XEL_TPLR_LENGTH_MASK_HI
| XEL_TPLR_LENGTH_MASK_LO
)));
248 reg
= in_be32 (baseaddress
+ XEL_TSR_OFFSET
);
249 reg
|= XEL_TSR_XMIT_BUSY_MASK
;
250 if ((reg
& XEL_TSR_XMIT_IE_MASK
) != 0) {
251 reg
|= XEL_TSR_XMIT_ACTIVE_MASK
;
253 out_be32 (baseaddress
+ XEL_TSR_OFFSET
, reg
);
256 #ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
257 /* Switch to second buffer */
258 baseaddress
^= XEL_BUFFER_OFFSET
;
259 /* Determine if the expected buffer address is empty */
260 reg
= in_be32 (baseaddress
+ XEL_TSR_OFFSET
);
261 if (((reg
& XEL_TSR_XMIT_BUSY_MASK
) == 0)
262 && ((in_be32 ((baseaddress
) + XEL_TSR_OFFSET
)
263 & XEL_TSR_XMIT_ACTIVE_MASK
) == 0)) {
264 debug("Send packet from 0x%x\n", baseaddress
);
265 /* Write the frame to the buffer */
266 xemaclite_alignedwrite ((void *) ptr
, baseaddress
, len
);
267 out_be32 (baseaddress
+ XEL_TPLR_OFFSET
,(len
&
268 (XEL_TPLR_LENGTH_MASK_HI
| XEL_TPLR_LENGTH_MASK_LO
)));
269 reg
= in_be32 (baseaddress
+ XEL_TSR_OFFSET
);
270 reg
|= XEL_TSR_XMIT_BUSY_MASK
;
271 if ((reg
& XEL_TSR_XMIT_IE_MASK
) != 0) {
272 reg
|= XEL_TSR_XMIT_ACTIVE_MASK
;
274 out_be32 (baseaddress
+ XEL_TSR_OFFSET
, reg
);
278 puts ("Error while sending frame\n");
282 static int emaclite_recv(struct eth_device
*dev
)
287 struct xemaclite
*emaclite
= dev
->priv
;
289 baseaddress
= dev
->iobase
+ emaclite
->nextrxbuffertouse
;
290 reg
= in_be32 (baseaddress
+ XEL_RSR_OFFSET
);
291 debug ("Testing data at address 0x%x\n", baseaddress
);
292 if ((reg
& XEL_RSR_RECV_DONE_MASK
) == XEL_RSR_RECV_DONE_MASK
) {
293 #ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
294 emaclite
->nextrxbuffertouse
^= XEL_BUFFER_OFFSET
;
297 #ifndef CONFIG_XILINX_EMACLITE_RX_PING_PONG
298 debug ("No data was available - address 0x%x\n", baseaddress
);
301 baseaddress
^= XEL_BUFFER_OFFSET
;
302 reg
= in_be32 (baseaddress
+ XEL_RSR_OFFSET
);
303 if ((reg
& XEL_RSR_RECV_DONE_MASK
) !=
304 XEL_RSR_RECV_DONE_MASK
) {
305 debug ("No data was available - address 0x%x\n",
311 /* Get the length of the frame that arrived */
312 switch(((ntohl(in_be32 (baseaddress
+ XEL_RXBUFF_OFFSET
+ 0xC))) &
313 0xFFFF0000 ) >> 16) {
315 length
= 42 + 20; /* FIXME size of ARP */
316 debug ("ARP Packet\n");
320 (((ntohl(in_be32 (baseaddress
+ XEL_RXBUFF_OFFSET
+ 0x10))) &
321 0xFFFF0000) >> 16); /* FIXME size of IP packet */
322 debug ("IP Packet\n");
325 debug ("Other Packet\n");
326 length
= ENET_MAX_MTU
;
330 xemaclite_alignedread ((u32
*) (baseaddress
+ XEL_RXBUFF_OFFSET
),
331 etherrxbuff
, length
);
333 /* Acknowledge the frame */
334 reg
= in_be32 (baseaddress
+ XEL_RSR_OFFSET
);
335 reg
&= ~XEL_RSR_RECV_DONE_MASK
;
336 out_be32 (baseaddress
+ XEL_RSR_OFFSET
, reg
);
338 debug ("Packet receive from 0x%x, length %dB\n", baseaddress
, length
);
339 NetReceive ((uchar
*) etherrxbuff
, length
);
344 int xilinx_emaclite_initialize (bd_t
*bis
, int base_addr
)
346 struct eth_device
*dev
;
347 struct xemaclite
*emaclite
;
349 dev
= calloc(1, sizeof(*dev
));
353 emaclite
= calloc(1, sizeof(struct xemaclite
));
354 if (emaclite
== NULL
) {
359 dev
->priv
= emaclite
;
361 sprintf(dev
->name
, "Xelite.%x", base_addr
);
363 dev
->iobase
= base_addr
;
364 dev
->init
= emaclite_init
;
365 dev
->halt
= emaclite_halt
;
366 dev
->send
= emaclite_send
;
367 dev
->recv
= emaclite_recv
;