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git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/rtc/ds3231.c
3 * Markus Klotzbuecher, mk@denx.de
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
26 * Extremly Accurate DS3231 Real Time Clock (RTC).
28 * copied from ds1337.c
36 #if defined(CONFIG_CMD_DATE)
38 /*---------------------------------------------------------------------*/
42 #define DEBUGR(fmt,args...) printf(fmt ,##args)
44 #define DEBUGR(fmt,args...)
46 /*---------------------------------------------------------------------*/
49 * RTC register addresses
51 #define RTC_SEC_REG_ADDR 0x0
52 #define RTC_MIN_REG_ADDR 0x1
53 #define RTC_HR_REG_ADDR 0x2
54 #define RTC_DAY_REG_ADDR 0x3
55 #define RTC_DATE_REG_ADDR 0x4
56 #define RTC_MON_REG_ADDR 0x5
57 #define RTC_YR_REG_ADDR 0x6
58 #define RTC_CTL_REG_ADDR 0x0e
59 #define RTC_STAT_REG_ADDR 0x0f
63 * RTC control register bits
65 #define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */
66 #define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */
67 #define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */
68 #define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */
69 #define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */
70 #define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */
73 * RTC status register bits
75 #define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */
76 #define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */
77 #define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */
80 static uchar
rtc_read (uchar reg
);
81 static void rtc_write (uchar reg
, uchar val
);
82 static uchar
bin2bcd (unsigned int n
);
83 static unsigned bcd2bin (uchar c
);
87 * Get the current time from the RTC
89 int rtc_get (struct rtc_time
*tmp
)
92 uchar sec
, min
, hour
, mday
, wday
, mon_cent
, year
, control
, status
;
94 control
= rtc_read (RTC_CTL_REG_ADDR
);
95 status
= rtc_read (RTC_STAT_REG_ADDR
);
96 sec
= rtc_read (RTC_SEC_REG_ADDR
);
97 min
= rtc_read (RTC_MIN_REG_ADDR
);
98 hour
= rtc_read (RTC_HR_REG_ADDR
);
99 wday
= rtc_read (RTC_DAY_REG_ADDR
);
100 mday
= rtc_read (RTC_DATE_REG_ADDR
);
101 mon_cent
= rtc_read (RTC_MON_REG_ADDR
);
102 year
= rtc_read (RTC_YR_REG_ADDR
);
104 DEBUGR ("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
105 "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
106 year
, mon_cent
, mday
, wday
, hour
, min
, sec
, control
, status
);
108 if (status
& RTC_STAT_BIT_OSF
) {
109 printf ("### Warning: RTC oscillator has stopped\n");
110 /* clear the OSF flag */
111 rtc_write (RTC_STAT_REG_ADDR
,
112 rtc_read (RTC_STAT_REG_ADDR
) & ~RTC_STAT_BIT_OSF
);
116 tmp
->tm_sec
= bcd2bin (sec
& 0x7F);
117 tmp
->tm_min
= bcd2bin (min
& 0x7F);
118 tmp
->tm_hour
= bcd2bin (hour
& 0x3F);
119 tmp
->tm_mday
= bcd2bin (mday
& 0x3F);
120 tmp
->tm_mon
= bcd2bin (mon_cent
& 0x1F);
121 tmp
->tm_year
= bcd2bin (year
) + ((mon_cent
& 0x80) ? 2000 : 1900);
122 tmp
->tm_wday
= bcd2bin ((wday
- 1) & 0x07);
126 DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
127 tmp
->tm_year
, tmp
->tm_mon
, tmp
->tm_mday
, tmp
->tm_wday
,
128 tmp
->tm_hour
, tmp
->tm_min
, tmp
->tm_sec
);
137 int rtc_set (struct rtc_time
*tmp
)
141 DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
142 tmp
->tm_year
, tmp
->tm_mon
, tmp
->tm_mday
, tmp
->tm_wday
,
143 tmp
->tm_hour
, tmp
->tm_min
, tmp
->tm_sec
);
145 rtc_write (RTC_YR_REG_ADDR
, bin2bcd (tmp
->tm_year
% 100));
147 century
= (tmp
->tm_year
>= 2000) ? 0x80 : 0;
148 rtc_write (RTC_MON_REG_ADDR
, bin2bcd (tmp
->tm_mon
) | century
);
150 rtc_write (RTC_DAY_REG_ADDR
, bin2bcd (tmp
->tm_wday
+ 1));
151 rtc_write (RTC_DATE_REG_ADDR
, bin2bcd (tmp
->tm_mday
));
152 rtc_write (RTC_HR_REG_ADDR
, bin2bcd (tmp
->tm_hour
));
153 rtc_write (RTC_MIN_REG_ADDR
, bin2bcd (tmp
->tm_min
));
154 rtc_write (RTC_SEC_REG_ADDR
, bin2bcd (tmp
->tm_sec
));
161 * Reset the RTC. We also enable the oscillator output on the
162 * SQW/INTB* pin and program it for 32,768 Hz output. Note that
163 * according to the datasheet, turning on the square wave output
164 * increases the current drain on the backup battery from about
167 void rtc_reset (void)
169 rtc_write (RTC_CTL_REG_ADDR
, RTC_CTL_BIT_RS1
| RTC_CTL_BIT_RS2
);
178 uchar
rtc_read (uchar reg
)
180 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR
, reg
));
184 static void rtc_write (uchar reg
, uchar val
)
186 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR
, reg
, val
);
189 static unsigned bcd2bin (uchar n
)
191 return ((((n
>> 4) & 0x0F) * 10) + (n
& 0x0F));
194 static unsigned char bin2bcd (unsigned int n
)
196 return (((n
/ 10) << 4) | (n
% 10));