3 * originally from linux source (arch/powerpc/boot/ns16550.c)
4 * modified to use CONFIG_SYS_ISA_MEM and new defines
15 #include <linux/types.h>
18 DECLARE_GLOBAL_DATA_PTR
;
20 #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
21 #define UART_MCRVAL (UART_MCR_DTR | \
22 UART_MCR_RTS) /* RTS/DTR */
24 #ifndef CONFIG_DM_SERIAL
25 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
26 #define serial_out(x, y) outb(x, (ulong)y)
27 #define serial_in(y) inb((ulong)y)
28 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
29 #define serial_out(x, y) out_be32(y, x)
30 #define serial_in(y) in_be32(y)
31 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
32 #define serial_out(x, y) out_le32(y, x)
33 #define serial_in(y) in_le32(y)
35 #define serial_out(x, y) writeb(x, y)
36 #define serial_in(y) readb(y)
38 #endif /* !CONFIG_DM_SERIAL */
40 #if defined(CONFIG_SOC_KEYSTONE)
41 #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
42 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
44 #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
45 #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
47 #define UART_MCRVAL (UART_MCR_RTS)
51 #ifndef CONFIG_SYS_NS16550_IER
52 #define CONFIG_SYS_NS16550_IER 0x00
53 #endif /* CONFIG_SYS_NS16550_IER */
55 static inline void serial_out_shift(void *addr
, int shift
, int value
)
57 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
58 outb(value
, (ulong
)addr
);
59 #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
60 out_le32(addr
, value
);
61 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
62 out_be32(addr
, value
);
63 #elif defined(CONFIG_SYS_NS16550_MEM32)
65 #elif defined(CONFIG_SYS_BIG_ENDIAN)
66 writeb(value
, addr
+ (1 << shift
) - 1);
72 static inline int serial_in_shift(void *addr
, int shift
)
74 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
75 return inb((ulong
)addr
);
76 #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
78 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
80 #elif defined(CONFIG_SYS_NS16550_MEM32)
82 #elif defined(CONFIG_SYS_BIG_ENDIAN)
83 return readb(addr
+ (1 << shift
) - 1);
89 #ifdef CONFIG_DM_SERIAL
91 #ifndef CONFIG_SYS_NS16550_CLK
92 #define CONFIG_SYS_NS16550_CLK 0
95 static void ns16550_writeb(NS16550_t port
, int offset
, int value
)
97 struct ns16550_platdata
*plat
= port
->plat
;
100 offset
*= 1 << plat
->reg_shift
;
101 addr
= (unsigned char *)plat
->base
+ offset
;
104 * As far as we know it doesn't make sense to support selection of
105 * these options at run-time, so use the existing CONFIG options.
107 serial_out_shift(addr
+ plat
->reg_offset
, plat
->reg_shift
, value
);
110 static int ns16550_readb(NS16550_t port
, int offset
)
112 struct ns16550_platdata
*plat
= port
->plat
;
115 offset
*= 1 << plat
->reg_shift
;
116 addr
= (unsigned char *)plat
->base
+ offset
;
118 return serial_in_shift(addr
+ plat
->reg_offset
, plat
->reg_shift
);
121 static u32
ns16550_getfcr(NS16550_t port
)
123 struct ns16550_platdata
*plat
= port
->plat
;
128 /* We can clean these up once everything is moved to driver model */
129 #define serial_out(value, addr) \
130 ns16550_writeb(com_port, \
131 (unsigned char *)addr - (unsigned char *)com_port, value)
132 #define serial_in(addr) \
133 ns16550_readb(com_port, \
134 (unsigned char *)addr - (unsigned char *)com_port)
136 static u32
ns16550_getfcr(NS16550_t port
)
138 return UART_FCR_DEFVAL
;
142 int ns16550_calc_divisor(NS16550_t port
, int clock
, int baudrate
)
144 const unsigned int mode_x_div
= 16;
146 return DIV_ROUND_CLOSEST(clock
, mode_x_div
* baudrate
);
149 static void NS16550_setbrg(NS16550_t com_port
, int baud_divisor
)
151 serial_out(UART_LCR_BKSE
| UART_LCRVAL
, &com_port
->lcr
);
152 serial_out(baud_divisor
& 0xff, &com_port
->dll
);
153 serial_out((baud_divisor
>> 8) & 0xff, &com_port
->dlm
);
154 serial_out(UART_LCRVAL
, &com_port
->lcr
);
157 void NS16550_init(NS16550_t com_port
, int baud_divisor
)
159 #if (defined(CONFIG_SPL_BUILD) && \
160 (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
162 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
163 * before SPL starts only THRE bit is set. We have to empty the
164 * transmitter before initialization starts.
166 if ((serial_in(&com_port
->lsr
) & (UART_LSR_TEMT
| UART_LSR_THRE
))
168 if (baud_divisor
!= -1)
169 NS16550_setbrg(com_port
, baud_divisor
);
170 serial_out(0, &com_port
->mdr1
);
174 while (!(serial_in(&com_port
->lsr
) & UART_LSR_TEMT
))
177 serial_out(CONFIG_SYS_NS16550_IER
, &com_port
->ier
);
178 #if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \
179 defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
180 serial_out(0x7, &com_port
->mdr1
); /* mode select reset TL16C750*/
182 serial_out(UART_MCRVAL
, &com_port
->mcr
);
183 serial_out(ns16550_getfcr(com_port
), &com_port
->fcr
);
184 if (baud_divisor
!= -1)
185 NS16550_setbrg(com_port
, baud_divisor
);
186 #if defined(CONFIG_OMAP) || \
187 defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \
188 defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
190 /* /16 is proper to hit 115200 with 48MHz */
191 serial_out(0, &com_port
->mdr1
);
192 #endif /* CONFIG_OMAP */
193 #if defined(CONFIG_SOC_KEYSTONE)
194 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE
, &com_port
->regC
);
198 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
199 void NS16550_reinit(NS16550_t com_port
, int baud_divisor
)
201 serial_out(CONFIG_SYS_NS16550_IER
, &com_port
->ier
);
202 NS16550_setbrg(com_port
, 0);
203 serial_out(UART_MCRVAL
, &com_port
->mcr
);
204 serial_out(ns16550_getfcr(com_port
), &com_port
->fcr
);
205 NS16550_setbrg(com_port
, baud_divisor
);
207 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
209 void NS16550_putc(NS16550_t com_port
, char c
)
211 while ((serial_in(&com_port
->lsr
) & UART_LSR_THRE
) == 0)
213 serial_out(c
, &com_port
->thr
);
216 * Call watchdog_reset() upon newline. This is done here in putc
217 * since the environment code uses a single puts() to print the complete
218 * environment upon "printenv". So we can't put this watchdog call
225 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
226 char NS16550_getc(NS16550_t com_port
)
228 while ((serial_in(&com_port
->lsr
) & UART_LSR_DR
) == 0) {
229 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
230 extern void usbtty_poll(void);
235 return serial_in(&com_port
->rbr
);
238 int NS16550_tstc(NS16550_t com_port
)
240 return (serial_in(&com_port
->lsr
) & UART_LSR_DR
) != 0;
243 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
245 #ifdef CONFIG_DEBUG_UART_NS16550
247 #include <debug_uart.h>
249 static inline void _debug_uart_init(void)
251 struct NS16550
*com_port
= (struct NS16550
*)CONFIG_DEBUG_UART_BASE
;
255 * We copy the code from above because it is already horribly messy.
256 * Trying to refactor to nicely remove the duplication doesn't seem
257 * feasible. The better fix is to move all users of this driver to
260 baud_divisor
= ns16550_calc_divisor(com_port
, CONFIG_DEBUG_UART_CLOCK
,
262 serial_dout(&com_port
->ier
, CONFIG_SYS_NS16550_IER
);
263 serial_dout(&com_port
->mcr
, UART_MCRVAL
);
264 serial_dout(&com_port
->fcr
, UART_FCR_DEFVAL
);
266 serial_dout(&com_port
->lcr
, UART_LCR_BKSE
| UART_LCRVAL
);
267 serial_dout(&com_port
->dll
, baud_divisor
& 0xff);
268 serial_dout(&com_port
->dlm
, (baud_divisor
>> 8) & 0xff);
269 serial_dout(&com_port
->lcr
, UART_LCRVAL
);
272 static inline void _debug_uart_putc(int ch
)
274 struct NS16550
*com_port
= (struct NS16550
*)CONFIG_DEBUG_UART_BASE
;
276 while (!(serial_din(&com_port
->lsr
) & UART_LSR_THRE
))
278 serial_dout(&com_port
->thr
, ch
);
285 #ifdef CONFIG_DEBUG_UART_OMAP
287 #include <debug_uart.h>
289 static inline void _debug_uart_init(void)
291 struct NS16550
*com_port
= (struct NS16550
*)CONFIG_DEBUG_UART_BASE
;
294 baud_divisor
= ns16550_calc_divisor(com_port
, CONFIG_DEBUG_UART_CLOCK
,
296 serial_dout(&com_port
->ier
, CONFIG_SYS_NS16550_IER
);
297 serial_dout(&com_port
->mdr1
, 0x7);
298 serial_dout(&com_port
->mcr
, UART_MCRVAL
);
299 serial_dout(&com_port
->fcr
, UART_FCR_DEFVAL
);
301 serial_dout(&com_port
->lcr
, UART_LCR_BKSE
| UART_LCRVAL
);
302 serial_dout(&com_port
->dll
, baud_divisor
& 0xff);
303 serial_dout(&com_port
->dlm
, (baud_divisor
>> 8) & 0xff);
304 serial_dout(&com_port
->lcr
, UART_LCRVAL
);
305 serial_dout(&com_port
->mdr1
, 0x0);
308 static inline void _debug_uart_putc(int ch
)
310 struct NS16550
*com_port
= (struct NS16550
*)CONFIG_DEBUG_UART_BASE
;
312 while (!(serial_din(&com_port
->lsr
) & UART_LSR_THRE
))
314 serial_dout(&com_port
->thr
, ch
);
321 #ifdef CONFIG_DM_SERIAL
322 static int ns16550_serial_putc(struct udevice
*dev
, const char ch
)
324 struct NS16550
*const com_port
= dev_get_priv(dev
);
326 if (!(serial_in(&com_port
->lsr
) & UART_LSR_THRE
))
328 serial_out(ch
, &com_port
->thr
);
331 * Call watchdog_reset() upon newline. This is done here in putc
332 * since the environment code uses a single puts() to print the complete
333 * environment upon "printenv". So we can't put this watchdog call
342 static int ns16550_serial_pending(struct udevice
*dev
, bool input
)
344 struct NS16550
*const com_port
= dev_get_priv(dev
);
347 return serial_in(&com_port
->lsr
) & UART_LSR_DR
? 1 : 0;
349 return serial_in(&com_port
->lsr
) & UART_LSR_THRE
? 0 : 1;
352 static int ns16550_serial_getc(struct udevice
*dev
)
354 struct NS16550
*const com_port
= dev_get_priv(dev
);
356 if (!(serial_in(&com_port
->lsr
) & UART_LSR_DR
))
359 return serial_in(&com_port
->rbr
);
362 static int ns16550_serial_setbrg(struct udevice
*dev
, int baudrate
)
364 struct NS16550
*const com_port
= dev_get_priv(dev
);
365 struct ns16550_platdata
*plat
= com_port
->plat
;
368 clock_divisor
= ns16550_calc_divisor(com_port
, plat
->clock
, baudrate
);
370 NS16550_setbrg(com_port
, clock_divisor
);
375 int ns16550_serial_probe(struct udevice
*dev
)
377 struct NS16550
*const com_port
= dev_get_priv(dev
);
379 com_port
->plat
= dev_get_platdata(dev
);
380 NS16550_init(com_port
, -1);
385 #if CONFIG_IS_ENABLED(OF_CONTROL)
392 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
393 int ns16550_serial_ofdata_to_platdata(struct udevice
*dev
)
395 struct ns16550_platdata
*plat
= dev
->platdata
;
396 const u32 port_type
= dev_get_driver_data(dev
);
401 /* try Processor Local Bus device first */
402 addr
= dev_get_addr(dev
);
403 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
404 if (addr
== FDT_ADDR_T_NONE
) {
405 /* then try pci device */
406 struct fdt_pci_addr pci_addr
;
410 /* we prefer to use a memory-mapped register */
411 ret
= fdtdec_get_pci_addr(gd
->fdt_blob
, dev_of_offset(dev
),
412 FDT_PCI_SPACE_MEM32
, "reg",
415 /* try if there is any i/o-mapped register */
416 ret
= fdtdec_get_pci_addr(gd
->fdt_blob
,
424 ret
= fdtdec_get_pci_bar32(dev
, &pci_addr
, &bar
);
432 if (addr
== FDT_ADDR_T_NONE
)
435 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
438 plat
->base
= (unsigned long)map_physmem(addr
, 0, MAP_NOCACHE
);
441 plat
->reg_offset
= fdtdec_get_int(gd
->fdt_blob
, dev_of_offset(dev
),
443 plat
->reg_shift
= fdtdec_get_int(gd
->fdt_blob
, dev_of_offset(dev
),
446 err
= clk_get_by_index(dev
, 0, &clk
);
448 err
= clk_get_rate(&clk
);
449 if (!IS_ERR_VALUE(err
))
451 } else if (err
!= -ENOENT
&& err
!= -ENODEV
&& err
!= -ENOSYS
) {
452 debug("ns16550 failed to get clock\n");
457 plat
->clock
= fdtdec_get_int(gd
->fdt_blob
, dev_of_offset(dev
),
459 CONFIG_SYS_NS16550_CLK
);
461 debug("ns16550 clock not defined\n");
465 plat
->fcr
= UART_FCR_DEFVAL
;
466 if (port_type
== PORT_JZ4780
)
467 plat
->fcr
|= UART_FCR_UME
;
473 const struct dm_serial_ops ns16550_serial_ops
= {
474 .putc
= ns16550_serial_putc
,
475 .pending
= ns16550_serial_pending
,
476 .getc
= ns16550_serial_getc
,
477 .setbrg
= ns16550_serial_setbrg
,
480 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
482 * Please consider existing compatible strings before adding a new
483 * one to keep this table compact. Or you may add a generic "ns16550"
484 * compatible string to your dts.
486 static const struct udevice_id ns16550_serial_ids
[] = {
487 { .compatible
= "ns16550", .data
= PORT_NS16550
},
488 { .compatible
= "ns16550a", .data
= PORT_NS16550
},
489 { .compatible
= "ingenic,jz4780-uart", .data
= PORT_JZ4780
},
490 { .compatible
= "nvidia,tegra20-uart", .data
= PORT_NS16550
},
491 { .compatible
= "snps,dw-apb-uart", .data
= PORT_NS16550
},
492 { .compatible
= "ti,omap2-uart", .data
= PORT_NS16550
},
493 { .compatible
= "ti,omap3-uart", .data
= PORT_NS16550
},
494 { .compatible
= "ti,omap4-uart", .data
= PORT_NS16550
},
495 { .compatible
= "ti,am3352-uart", .data
= PORT_NS16550
},
496 { .compatible
= "ti,am4372-uart", .data
= PORT_NS16550
},
497 { .compatible
= "ti,dra742-uart", .data
= PORT_NS16550
},
500 #endif /* OF_CONTROL && !OF_PLATDATA */
502 #if CONFIG_IS_ENABLED(SERIAL_PRESENT)
504 /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
505 #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
506 U_BOOT_DRIVER(ns16550_serial
) = {
507 .name
= "ns16550_serial",
509 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
510 .of_match
= ns16550_serial_ids
,
511 .ofdata_to_platdata
= ns16550_serial_ofdata_to_platdata
,
512 .platdata_auto_alloc_size
= sizeof(struct ns16550_platdata
),
514 .priv_auto_alloc_size
= sizeof(struct NS16550
),
515 .probe
= ns16550_serial_probe
,
516 .ops
= &ns16550_serial_ops
,
517 .flags
= DM_FLAG_PRE_RELOC
,
520 #endif /* SERIAL_PRESENT */
522 #endif /* CONFIG_DM_SERIAL */