drivers/serial/serial_sh.c

   1 /*
   2  * SuperH SCIF device driver.
   3  * Copyright (C) 2013  Renesas Electronics Corporation
   4  * Copyright (C) 2007,2008,2010, 2014 Nobuhiro Iwamatsu
   5  * Copyright (C) 2002 - 2008  Paul Mundt
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <common.h>
  11 #include <errno.h>
  12 #include <dm.h>
  13 #include <asm/io.h>
  14 #include <asm/processor.h>
  15 #include <serial.h>
  16 #include <linux/compiler.h>
  17 #include <dm/platform_data/serial_sh.h>
  18 #include "serial_sh.h"
  19
  20 DECLARE_GLOBAL_DATA_PTR;
  21
  22 #if defined(CONFIG_CPU_SH7760) || \
  23         defined(CONFIG_CPU_SH7780) || \
  24         defined(CONFIG_CPU_SH7785) || \
  25         defined(CONFIG_CPU_SH7786)
  26 static int scif_rxfill(struct uart_port *port)
  27 {
  28         return sci_in(port, SCRFDR) & 0xff;
  29 }
  30 #elif defined(CONFIG_CPU_SH7763)
  31 static int scif_rxfill(struct uart_port *port)
  32 {
  33         if ((port->mapbase == 0xffe00000) ||
  34             (port->mapbase == 0xffe08000)) {
  35                 /* SCIF0/1*/
  36                 return sci_in(port, SCRFDR) & 0xff;
  37         } else {
  38                 /* SCIF2 */
  39                 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
  40         }
  41 }
  42 #elif defined(CONFIG_ARCH_SH7372)
  43 static int scif_rxfill(struct uart_port *port)
  44 {
  45         if (port->type == PORT_SCIFA)
  46                 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
  47         else
  48                 return sci_in(port, SCRFDR);
  49 }
  50 #else
  51 static int scif_rxfill(struct uart_port *port)
  52 {
  53         return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
  54 }
  55 #endif
  56
  57 static void sh_serial_init_generic(struct uart_port *port)
  58 {
  59         sci_out(port, SCSCR , SCSCR_INIT(port));
  60         sci_out(port, SCSCR , SCSCR_INIT(port));
  61         sci_out(port, SCSMR, 0);
  62         sci_out(port, SCSMR, 0);
  63         sci_out(port, SCFCR, SCFCR_RFRST|SCFCR_TFRST);
  64         sci_in(port, SCFCR);
  65         sci_out(port, SCFCR, 0);
  66 }
  67
  68 static void
  69 sh_serial_setbrg_generic(struct uart_port *port, int clk, int baudrate)
  70 {
  71         if (port->clk_mode == EXT_CLK) {
  72                 unsigned short dl = DL_VALUE(baudrate, clk);
  73                 sci_out(port, DL, dl);
  74                 /* Need wait: Clock * 1/dl * 1/16 */
  75                 udelay((1000000 * dl * 16 / clk) * 1000 + 1);
  76         } else {
  77                 sci_out(port, SCBRR, SCBRR_VALUE(baudrate, clk));
  78         }
  79 }
  80
  81 static void handle_error(struct uart_port *port)
  82 {
  83         sci_in(port, SCxSR);
  84         sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
  85         sci_in(port, SCLSR);
  86         sci_out(port, SCLSR, 0x00);
  87 }
  88
  89 static int serial_raw_putc(struct uart_port *port, const char c)
  90 {
  91         /* Tx fifo is empty */
  92         if (!(sci_in(port, SCxSR) & SCxSR_TEND(port)))
  93                 return -EAGAIN;
  94
  95         sci_out(port, SCxTDR, c);
  96         sci_out(port, SCxSR, sci_in(port, SCxSR) & ~SCxSR_TEND(port));
  97
  98         return 0;
  99 }
 100
 101 static int serial_rx_fifo_level(struct uart_port *port)
 102 {
 103         return scif_rxfill(port);
 104 }
 105
 106 static int sh_serial_tstc_generic(struct uart_port *port)
 107 {
 108         if (sci_in(port, SCxSR) & SCIF_ERRORS) {
 109                 handle_error(port);
 110                 return 0;
 111         }
 112
 113         return serial_rx_fifo_level(port) ? 1 : 0;
 114 }
 115
 116 static int serial_getc_check(struct uart_port *port)
 117 {
 118         unsigned short status;
 119
 120         status = sci_in(port, SCxSR);
 121
 122         if (status & SCIF_ERRORS)
 123                 handle_error(port);
 124         if (sci_in(port, SCLSR) & SCxSR_ORER(port))
 125                 handle_error(port);
 126         return status & (SCIF_DR | SCxSR_RDxF(port));
 127 }
 128
 129 static int sh_serial_getc_generic(struct uart_port *port)
 130 {
 131         unsigned short status;
 132         char ch;
 133
 134         if (!serial_getc_check(port))
 135                 return -EAGAIN;
 136
 137         ch = sci_in(port, SCxRDR);
 138         status = sci_in(port, SCxSR);
 139
 140         sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
 141
 142         if (status & SCIF_ERRORS)
 143                 handle_error(port);
 144
 145         if (sci_in(port, SCLSR) & SCxSR_ORER(port))
 146                 handle_error(port);
 147
 148         return ch;
 149 }
 150
 151 #ifdef CONFIG_DM_SERIAL
 152
 153 static int sh_serial_pending(struct udevice *dev, bool input)
 154 {
 155         struct uart_port *priv = dev_get_priv(dev);
 156
 157         return sh_serial_tstc_generic(priv);
 158 }
 159
 160 static int sh_serial_putc(struct udevice *dev, const char ch)
 161 {
 162         struct uart_port *priv = dev_get_priv(dev);
 163
 164         return serial_raw_putc(priv, ch);
 165 }
 166
 167 static int sh_serial_getc(struct udevice *dev)
 168 {
 169         struct uart_port *priv = dev_get_priv(dev);
 170
 171         return sh_serial_getc_generic(priv);
 172 }
 173
 174 static int sh_serial_setbrg(struct udevice *dev, int baudrate)
 175 {
 176         struct sh_serial_platdata *plat = dev_get_platdata(dev);
 177         struct uart_port *priv = dev_get_priv(dev);
 178
 179         sh_serial_setbrg_generic(priv, plat->clk, baudrate);
 180
 181         return 0;
 182 }
 183
 184 static int sh_serial_probe(struct udevice *dev)
 185 {
 186         struct sh_serial_platdata *plat = dev_get_platdata(dev);
 187         struct uart_port *priv = dev_get_priv(dev);
 188
 189         priv->membase   = (unsigned char *)plat->base;
 190         priv->mapbase   = plat->base;
 191         priv->type      = plat->type;
 192         priv->clk_mode  = plat->clk_mode;
 193
 194         sh_serial_init_generic(priv);
 195
 196         return 0;
 197 }
 198
 199 static const struct dm_serial_ops sh_serial_ops = {
 200         .putc = sh_serial_putc,
 201         .pending = sh_serial_pending,
 202         .getc = sh_serial_getc,
 203         .setbrg = sh_serial_setbrg,
 204 };
 205
 206 #ifdef CONFIG_OF_CONTROL
 207 static const struct udevice_id sh_serial_id[] ={
 208         {.compatible = "renesas,sci", .data = PORT_SCI},
 209         {.compatible = "renesas,scif", .data = PORT_SCIF},
 210         {.compatible = "renesas,scifa", .data = PORT_SCIFA},
 211         {}
 212 };
 213
 214 static int sh_serial_ofdata_to_platdata(struct udevice *dev)
 215 {
 216         struct sh_serial_platdata *plat = dev_get_platdata(dev);
 217         fdt_addr_t addr;
 218
 219         addr = fdtdec_get_addr(gd->fdt_blob, dev_of_offset(dev), "reg");
 220         if (addr == FDT_ADDR_T_NONE)
 221                 return -EINVAL;
 222
 223         plat->base = addr;
 224         plat->clk = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "clock",
 225                                    1);
 226         plat->type = dev_get_driver_data(dev);
 227         return 0;
 228 }
 229 #endif
 230
 231 U_BOOT_DRIVER(serial_sh) = {
 232         .name   = "serial_sh",
 233         .id     = UCLASS_SERIAL,
 234         .of_match = of_match_ptr(sh_serial_id),
 235         .ofdata_to_platdata = of_match_ptr(sh_serial_ofdata_to_platdata),
 236         .platdata_auto_alloc_size = sizeof(struct sh_serial_platdata),
 237         .probe  = sh_serial_probe,
 238         .ops    = &sh_serial_ops,
 239         .flags  = DM_FLAG_PRE_RELOC,
 240         .priv_auto_alloc_size = sizeof(struct uart_port),
 241 };
 242
 243 #else /* CONFIG_DM_SERIAL */
 244
 245 #if defined(CONFIG_CONS_SCIF0)
 246 # define SCIF_BASE      SCIF0_BASE
 247 #elif defined(CONFIG_CONS_SCIF1)
 248 # define SCIF_BASE      SCIF1_BASE
 249 #elif defined(CONFIG_CONS_SCIF2)
 250 # define SCIF_BASE      SCIF2_BASE
 251 #elif defined(CONFIG_CONS_SCIF3)
 252 # define SCIF_BASE      SCIF3_BASE
 253 #elif defined(CONFIG_CONS_SCIF4)
 254 # define SCIF_BASE      SCIF4_BASE
 255 #elif defined(CONFIG_CONS_SCIF5)
 256 # define SCIF_BASE      SCIF5_BASE
 257 #elif defined(CONFIG_CONS_SCIF6)
 258 # define SCIF_BASE      SCIF6_BASE
 259 #elif defined(CONFIG_CONS_SCIF7)
 260 # define SCIF_BASE      SCIF7_BASE
 261 #else
 262 # error "Default SCIF doesn't set....."
 263 #endif
 264
 265 #if defined(CONFIG_SCIF_A)
 266         #define SCIF_BASE_PORT  PORT_SCIFA
 267 #elif defined(CONFIG_SCI)
 268         #define SCIF_BASE_PORT  PORT_SCI
 269 #else
 270         #define SCIF_BASE_PORT  PORT_SCIF
 271 #endif
 272
 273 static struct uart_port sh_sci = {
 274         .membase        = (unsigned char *)SCIF_BASE,
 275         .mapbase        = SCIF_BASE,
 276         .type           = SCIF_BASE_PORT,
 277 #ifdef CONFIG_SCIF_USE_EXT_CLK
 278         .clk_mode =     EXT_CLK,
 279 #endif
 280 };
 281
 282 static void sh_serial_setbrg(void)
 283 {
 284         DECLARE_GLOBAL_DATA_PTR;
 285         struct uart_port *port = &sh_sci;
 286
 287         sh_serial_setbrg_generic(port, CONFIG_SH_SCIF_CLK_FREQ, gd->baudrate);
 288 }
 289
 290 static int sh_serial_init(void)
 291 {
 292         struct uart_port *port = &sh_sci;
 293
 294         sh_serial_init_generic(port);
 295         serial_setbrg();
 296
 297         return 0;
 298 }
 299
 300 static void sh_serial_putc(const char c)
 301 {
 302         struct uart_port *port = &sh_sci;
 303
 304         if (c == '\n') {
 305                 while (1) {
 306                         if  (serial_raw_putc(port, '\r') != -EAGAIN)
 307                                 break;
 308                 }
 309         }
 310         while (1) {
 311                 if  (serial_raw_putc(port, c) != -EAGAIN)
 312                         break;
 313         }
 314 }
 315
 316 static int sh_serial_tstc(void)
 317 {
 318         struct uart_port *port = &sh_sci;
 319
 320         return sh_serial_tstc_generic(port);
 321 }
 322
 323 static int sh_serial_getc(void)
 324 {
 325         struct uart_port *port = &sh_sci;
 326         int ch;
 327
 328         while (1) {
 329                 ch = sh_serial_getc_generic(port);
 330                 if (ch != -EAGAIN)
 331                         break;
 332         }
 333
 334         return ch;
 335 }
 336
 337 static struct serial_device sh_serial_drv = {
 338         .name   = "sh_serial",
 339         .start  = sh_serial_init,
 340         .stop   = NULL,
 341         .setbrg = sh_serial_setbrg,
 342         .putc   = sh_serial_putc,
 343         .puts   = default_serial_puts,
 344         .getc   = sh_serial_getc,
 345         .tstc   = sh_serial_tstc,
 346 };
 347
 348 void sh_serial_initialize(void)
 349 {
 350         serial_register(&sh_serial_drv);
 351 }
 352
 353 __weak struct serial_device *default_serial_console(void)
 354 {
 355         return &sh_serial_drv;
 356 }
 357 #endif /* CONFIG_DM_SERIAL */