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1 /*
2 * Copyright (c) 2006 Ben Warren, Qstreams Networks Inc.
3 * With help from the common/soft_spi and cpu/mpc8260 drivers
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24 #include <common.h>
25 #if defined(CONFIG_MPC8XXX_SPI) && defined(CONFIG_HARD_SPI)
26
27 #include <malloc.h>
28 #include <spi.h>
29 #include <asm/mpc8xxx_spi.h>
30
31 #define SPI_EV_NE (0x80000000 >> 22) /* Receiver Not Empty */
32 #define SPI_EV_NF (0x80000000 >> 23) /* Transmitter Not Full */
33
34 #define SPI_MODE_LOOP (0x80000000 >> 1) /* Loopback mode */
35 #define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */
36 #define SPI_MODE_MS (0x80000000 >> 6) /* Always master */
37 #define SPI_MODE_EN (0x80000000 >> 7) /* Enable interface */
38
39 #define SPI_TIMEOUT 1000
40
41 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
42 unsigned int max_hz, unsigned int mode)
43 {
44 struct spi_slave *slave;
45
46 if (!spi_cs_is_valid(bus, cs))
47 return NULL;
48
49 slave = malloc(sizeof(struct spi_slave));
50 if (!slave)
51 return NULL;
52
53 slave->bus = bus;
54 slave->cs = cs;
55
56 /*
57 * TODO: Some of the code in spi_init() should probably move
58 * here, or into spi_claim_bus() below.
59 */
60
61 return slave;
62 }
63
64 void spi_free_slave(struct spi_slave *slave)
65 {
66 free(slave);
67 }
68
69 void spi_init(void)
70 {
71 volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi;
72
73 /*
74 * SPI pins on the MPC83xx are not muxed, so all we do is initialize
75 * some registers
76 */
77 spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN;
78 spi->mode = (spi->mode & 0xfff0ffff) | (1 << 16); /* Use SYSCLK / 8
79 (16.67MHz typ.) */
80 spi->event = 0xffffffff; /* Clear all SPI events */
81 spi->mask = 0x00000000; /* Mask all SPI interrupts */
82 spi->com = 0; /* LST bit doesn't do anything, so disregard */
83 }
84
85 int spi_claim_bus(struct spi_slave *slave)
86 {
87 return 0;
88 }
89
90 void spi_release_bus(struct spi_slave *slave)
91 {
92
93 }
94
95 int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
96 void *din, unsigned long flags)
97 {
98 volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi;
99 unsigned int tmpdout, tmpdin, event;
100 int numBlks = bitlen / 32 + (bitlen % 32 ? 1 : 0);
101 int tm, isRead = 0;
102 unsigned char charSize = 32;
103
104 debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
105 slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);
106
107 if (flags & SPI_XFER_BEGIN)
108 spi_cs_activate(slave);
109
110 spi->event = 0xffffffff; /* Clear all SPI events */
111
112 /* handle data in 32-bit chunks */
113 while (numBlks--) {
114 tmpdout = 0;
115 charSize = (bitlen >= 32 ? 32 : bitlen);
116
117 /* Shift data so it's msb-justified */
118 tmpdout = *(u32 *) dout >> (32 - charSize);
119
120 /* The LEN field of the SPMODE register is set as follows:
121 *
122 * Bit length setting
123 * len <= 4 3
124 * 4 < len <= 16 len - 1
125 * len > 16 0
126 */
127
128 if (bitlen <= 16) {
129 if (bitlen <= 4)
130 spi->mode = (spi->mode & 0xff0fffff) |
131 (3 << 20);
132 else
133 spi->mode = (spi->mode & 0xff0fffff) |
134 ((bitlen - 1) << 20);
135 } else {
136 spi->mode = (spi->mode & 0xff0fffff);
137 /* Set up the next iteration if sending > 32 bits */
138 bitlen -= 32;
139 dout += 4;
140 }
141
142 spi->tx = tmpdout; /* Write the data out */
143 debug("*** spi_xfer: ... %08x written\n", tmpdout);
144
145 /*
146 * Wait for SPI transmit to get out
147 * or time out (1 second = 1000 ms)
148 * The NE event must be read and cleared first
149 */
150 for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) {
151 event = spi->event;
152 if (event & SPI_EV_NE) {
153 tmpdin = spi->rx;
154 spi->event |= SPI_EV_NE;
155 isRead = 1;
156
157 *(u32 *) din = (tmpdin << (32 - charSize));
158 if (charSize == 32) {
159 /* Advance output buffer by 32 bits */
160 din += 4;
161 }
162 }
163 /*
164 * Only bail when we've had both NE and NF events.
165 * This will cause timeouts on RO devices, so maybe
166 * in the future put an arbitrary delay after writing
167 * the device. Arbitrary delays suck, though...
168 */
169 if (isRead && (event & SPI_EV_NF))
170 break;
171 }
172 if (tm >= SPI_TIMEOUT)
173 puts("*** spi_xfer: Time out during SPI transfer");
174
175 debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin);
176 }
177
178 if (flags & SPI_XFER_END)
179 spi_cs_deactivate(slave);
180
181 return 0;
182 }
183 #endif /* CONFIG_HARD_SPI */