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git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/spi/sh_spi.c
4 * Copyright (C) 2011 Renesas Solutions Corp.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
27 static void sh_spi_write(unsigned long data
, unsigned long *reg
)
32 static unsigned long sh_spi_read(unsigned long *reg
)
37 static void sh_spi_set_bit(unsigned long val
, unsigned long *reg
)
41 tmp
= sh_spi_read(reg
);
43 sh_spi_write(tmp
, reg
);
46 static void sh_spi_clear_bit(unsigned long val
, unsigned long *reg
)
50 tmp
= sh_spi_read(reg
);
52 sh_spi_write(tmp
, reg
);
55 static void clear_fifo(struct sh_spi
*ss
)
57 sh_spi_set_bit(SH_SPI_RSTF
, &ss
->regs
->cr2
);
58 sh_spi_clear_bit(SH_SPI_RSTF
, &ss
->regs
->cr2
);
61 static int recvbuf_wait(struct sh_spi
*ss
)
63 while (sh_spi_read(&ss
->regs
->cr1
) & SH_SPI_RBE
) {
71 static int write_fifo_empty_wait(struct sh_spi
*ss
)
73 while (!(sh_spi_read(&ss
->regs
->cr1
) & SH_SPI_TBE
)) {
85 struct spi_slave
*spi_setup_slave(unsigned int bus
, unsigned int cs
,
86 unsigned int max_hz
, unsigned int mode
)
90 if (!spi_cs_is_valid(bus
, cs
))
93 ss
= malloc(sizeof(struct spi_slave
));
99 ss
->regs
= (struct sh_spi_regs
*)CONFIG_SH_SPI_BASE
;
102 sh_spi_write(0xfe, &ss
->regs
->cr1
);
104 sh_spi_write(0x00, &ss
->regs
->cr1
);
106 sh_spi_write(0x00, &ss
->regs
->cr3
);
111 sh_spi_write(sh_spi_read(&ss
->regs
->cr2
) | 0x07, &ss
->regs
->cr2
);
117 void spi_free_slave(struct spi_slave
*slave
)
119 struct sh_spi
*spi
= to_sh_spi(slave
);
124 int spi_claim_bus(struct spi_slave
*slave
)
129 void spi_release_bus(struct spi_slave
*slave
)
131 struct sh_spi
*ss
= to_sh_spi(slave
);
133 sh_spi_write(sh_spi_read(&ss
->regs
->cr1
) &
134 ~(SH_SPI_SSA
| SH_SPI_SSDB
| SH_SPI_SSD
), &ss
->regs
->cr1
);
137 static int sh_spi_send(struct sh_spi
*ss
, const unsigned char *tx_data
,
138 unsigned int len
, unsigned long flags
)
140 int i
, cur_len
, ret
= 0;
141 int remain
= (int)len
;
144 if (len
>= SH_SPI_FIFO_SIZE
)
145 sh_spi_set_bit(SH_SPI_SSA
, &ss
->regs
->cr1
);
148 cur_len
= (remain
< SH_SPI_FIFO_SIZE
) ?
149 remain
: SH_SPI_FIFO_SIZE
;
150 for (i
= 0; i
< cur_len
&&
151 !(sh_spi_read(&ss
->regs
->cr4
) & SH_SPI_WPABRT
) &&
152 !(sh_spi_read(&ss
->regs
->cr1
) & SH_SPI_TBF
);
154 sh_spi_write(tx_data
[i
], &ss
->regs
->tbr_rbr
);
158 if (sh_spi_read(&ss
->regs
->cr4
) & SH_SPI_WPABRT
) {
159 /* Abort the transaction */
160 flags
|= SPI_XFER_END
;
161 sh_spi_set_bit(SH_SPI_WPABRT
, &ss
->regs
->cr4
);
170 write_fifo_empty_wait(ss
);
173 if (flags
& SPI_XFER_END
) {
174 tmp
= sh_spi_read(&ss
->regs
->cr1
);
175 tmp
= tmp
& ~(SH_SPI_SSD
| SH_SPI_SSDB
);
176 sh_spi_write(tmp
, &ss
->regs
->cr1
);
177 sh_spi_set_bit(SH_SPI_SSA
, &ss
->regs
->cr1
);
179 write_fifo_empty_wait(ss
);
185 static int sh_spi_receive(struct sh_spi
*ss
, unsigned char *rx_data
,
186 unsigned int len
, unsigned long flags
)
191 if (len
> SH_SPI_MAX_BYTE
)
192 sh_spi_write(SH_SPI_MAX_BYTE
, &ss
->regs
->cr3
);
194 sh_spi_write(len
, &ss
->regs
->cr3
);
196 tmp
= sh_spi_read(&ss
->regs
->cr1
);
197 tmp
= tmp
& ~(SH_SPI_SSD
| SH_SPI_SSDB
);
198 sh_spi_write(tmp
, &ss
->regs
->cr1
);
199 sh_spi_set_bit(SH_SPI_SSA
, &ss
->regs
->cr1
);
201 for (i
= 0; i
< len
; i
++) {
202 if (recvbuf_wait(ss
))
205 rx_data
[i
] = (unsigned char)sh_spi_read(&ss
->regs
->tbr_rbr
);
207 sh_spi_write(0, &ss
->regs
->cr3
);
212 int spi_xfer(struct spi_slave
*slave
, unsigned int bitlen
, const void *dout
,
213 void *din
, unsigned long flags
)
215 struct sh_spi
*ss
= to_sh_spi(slave
);
216 const unsigned char *tx_data
= dout
;
217 unsigned char *rx_data
= din
;
218 unsigned int len
= bitlen
/ 8;
221 if (flags
& SPI_XFER_BEGIN
)
222 sh_spi_write(sh_spi_read(&ss
->regs
->cr1
) & ~SH_SPI_SSA
,
226 ret
= sh_spi_send(ss
, tx_data
, len
, flags
);
228 if (ret
== 0 && rx_data
)
229 ret
= sh_spi_receive(ss
, rx_data
, len
, flags
);
231 if (flags
& SPI_XFER_END
) {
232 sh_spi_set_bit(SH_SPI_SSD
, &ss
->regs
->cr1
);
235 sh_spi_clear_bit(SH_SPI_SSA
| SH_SPI_SSDB
| SH_SPI_SSD
,
243 int spi_cs_is_valid(unsigned int bus
, unsigned int cs
)
245 /* This driver supports "bus = 0" and "cs = 0" only. */
252 void spi_cs_activate(struct spi_slave
*slave
)
257 void spi_cs_deactivate(struct spi_slave
*slave
)