2 * (C) Copyright 2009, 2011 Freescale Semiconductor, Inc.
4 * (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB
6 * Author: Tor Krill tor@excito.com
8 * SPDX-License-Identifier: GPL-2.0+
15 #include <usb/ehci-fsl.h>
18 #include <fdt_support.h>
22 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
23 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
26 static void set_txfifothresh(struct usb_ehci
*, u32
);
28 /* Check USB PHY clock valid */
29 static int usb_phy_clk_valid(struct usb_ehci
*ehci
)
31 if (!((in_be32(&ehci
->control
) & PHY_CLK_VALID
) ||
32 in_be32(&ehci
->prictrl
))) {
33 printf("USB PHY clock invalid!\n");
41 * Create the appropriate control structures to manage
42 * a new EHCI host controller.
44 * Excerpts from linux ehci fsl driver.
46 int ehci_hcd_init(int index
, enum usb_init_type init
,
47 struct ehci_hccr
**hccr
, struct ehci_hcor
**hcor
)
49 struct usb_ehci
*ehci
= NULL
;
50 const char *phy_type
= NULL
;
52 char current_usb_controller
[5];
53 #ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
58 if (has_erratum_a007075()) {
60 * A 5ms delay is needed after applying soft-reset to the
61 * controller to let external ULPI phy come out of reset.
62 * This delay needs to be added before re-initializing
63 * the controller after soft-resetting completes
67 memset(current_usb_controller
, '\0', 5);
68 snprintf(current_usb_controller
, 4, "usb%d", index
+1);
72 ehci
= (struct usb_ehci
*)CONFIG_SYS_FSL_USB1_ADDR
;
75 ehci
= (struct usb_ehci
*)CONFIG_SYS_FSL_USB2_ADDR
;
78 printf("ERROR: wrong controller index!!\n");
82 *hccr
= (struct ehci_hccr
*)((uint32_t)&ehci
->caplength
);
83 *hcor
= (struct ehci_hcor
*)((uint32_t) *hccr
+
84 HC_LENGTH(ehci_readl(&(*hccr
)->cr_capbase
)));
86 /* Set to Host mode */
87 setbits_le32(&ehci
->usbmode
, CM_HOST
);
89 out_be32(&ehci
->snoop1
, SNOOP_SIZE_2GB
);
90 out_be32(&ehci
->snoop2
, 0x80000000 | SNOOP_SIZE_2GB
);
93 if (hwconfig_sub(current_usb_controller
, "phy_type"))
94 phy_type
= hwconfig_subarg(current_usb_controller
,
97 phy_type
= getenv("usb_phy_type");
100 #ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
101 /* if none specified assume internal UTMI */
102 strcpy(usb_phy
, "utmi");
105 printf("WARNING: USB phy type not defined !!\n");
110 if (!strncmp(phy_type
, "utmi", 4)) {
111 #if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
112 clrsetbits_be32(&ehci
->control
, CONTROL_REGISTER_W1C_MASK
,
114 clrsetbits_be32(&ehci
->control
, CONTROL_REGISTER_W1C_MASK
,
116 udelay(1000); /* delay required for PHY Clk to appear */
118 out_le32(&(*hcor
)->or_portsc
[0], PORT_PTS_UTMI
);
119 clrsetbits_be32(&ehci
->control
, CONTROL_REGISTER_W1C_MASK
,
122 clrsetbits_be32(&ehci
->control
, CONTROL_REGISTER_W1C_MASK
,
124 clrsetbits_be32(&ehci
->control
, UTMI_PHY_EN
|
125 CONTROL_REGISTER_W1C_MASK
, USB_EN
);
126 udelay(1000); /* delay required for PHY Clk to appear */
127 if (!usb_phy_clk_valid(ehci
))
129 out_le32(&(*hcor
)->or_portsc
[0], PORT_PTS_ULPI
);
132 out_be32(&ehci
->prictrl
, 0x0000000c);
133 out_be32(&ehci
->age_cnt_limit
, 0x00000040);
134 out_be32(&ehci
->sictrl
, 0x00000001);
136 in_le32(&ehci
->usbmode
);
138 if (has_erratum_a007798())
139 set_txfifothresh(ehci
, TXFIFOTHRESH
);
145 * Destroy the appropriate control structures corresponding
146 * the the EHCI host controller.
148 int ehci_hcd_stop(int index
)
154 * Setting the value of TXFIFO_THRESH field in TXFILLTUNING register
155 * to counter DDR latencies in writing data into Tx buffer.
156 * This prevents Tx buffer from getting underrun
158 static void set_txfifothresh(struct usb_ehci
*ehci
, u32 txfifo_thresh
)
161 cmd
= ehci_readl(&ehci
->txfilltuning
);
162 cmd
&= ~TXFIFO_THRESH_MASK
;
163 cmd
|= TXFIFO_THRESH(txfifo_thresh
);
164 ehci_writel(&ehci
->txfilltuning
, cmd
);
167 #if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
168 static int fdt_fixup_usb_mode_phy_type(void *blob
, const char *mode
,
169 const char *phy_type
, int start_offset
)
171 const char *compat_dr
= "fsl-usb2-dr";
172 const char *compat_mph
= "fsl-usb2-mph";
173 const char *prop_mode
= "dr_mode";
174 const char *prop_type
= "phy_type";
175 const char *node_type
= NULL
;
179 node_offset
= fdt_node_offset_by_compatible(blob
,
180 start_offset
, compat_mph
);
181 if (node_offset
< 0) {
182 node_offset
= fdt_node_offset_by_compatible(blob
,
185 if (node_offset
< 0) {
186 printf("WARNING: could not find compatible node: %s",
187 fdt_strerror(node_offset
));
190 node_type
= compat_dr
;
192 node_type
= compat_mph
;
196 err
= fdt_setprop(blob
, node_offset
, prop_mode
, mode
,
199 printf("WARNING: could not set %s for %s: %s.\n",
200 prop_mode
, node_type
, fdt_strerror(err
));
204 err
= fdt_setprop(blob
, node_offset
, prop_type
, phy_type
,
205 strlen(phy_type
) + 1);
207 printf("WARNING: could not set %s for %s: %s.\n",
208 prop_type
, node_type
, fdt_strerror(err
));
214 static const char *fdt_usb_get_node_type(void *blob
, int start_offset
,
217 const char *compat_dr
= "fsl-usb2-dr";
218 const char *compat_mph
= "fsl-usb2-mph";
219 const char *node_type
= NULL
;
221 *node_offset
= fdt_node_offset_by_compatible(blob
, start_offset
,
223 if (*node_offset
< 0) {
224 *node_offset
= fdt_node_offset_by_compatible(blob
,
227 if (*node_offset
< 0) {
228 printf("ERROR: could not find compatible node: %s\n",
229 fdt_strerror(*node_offset
));
231 node_type
= compat_dr
;
234 node_type
= compat_mph
;
240 static int fdt_fixup_usb_erratum(void *blob
, const char *prop_erratum
,
243 int node_offset
, err
;
244 const char *node_type
= NULL
;
246 node_type
= fdt_usb_get_node_type(blob
, start_offset
, &node_offset
);
250 err
= fdt_setprop(blob
, node_offset
, prop_erratum
, NULL
, 0);
252 printf("ERROR: could not set %s for %s: %s.\n",
253 prop_erratum
, node_type
, fdt_strerror(err
));
259 void fdt_fixup_dr_usb(void *blob
, bd_t
*bd
)
261 static const char * const modes
[] = { "host", "peripheral", "otg" };
262 static const char * const phys
[] = { "ulpi", "utmi", "utmi_dual" };
263 int usb_erratum_a006261_off
= -1;
264 int usb_erratum_a007075_off
= -1;
265 int usb_erratum_a007792_off
= -1;
266 int usb_erratum_a005697_off
= -1;
267 int usb_mode_off
= -1;
268 int usb_phy_off
= -1;
272 for (i
= 1; i
<= CONFIG_USB_MAX_CONTROLLER_COUNT
; i
++) {
273 const char *dr_mode_type
= NULL
;
274 const char *dr_phy_type
= NULL
;
275 int mode_idx
= -1, phy_idx
= -1;
277 snprintf(str
, 5, "%s%d", "usb", i
);
279 for (j
= 0; j
< ARRAY_SIZE(modes
); j
++) {
280 if (hwconfig_subarg_cmp(str
, "dr_mode",
287 for (j
= 0; j
< ARRAY_SIZE(phys
); j
++) {
288 if (hwconfig_subarg_cmp(str
, "phy_type",
295 if (mode_idx
< 0 && phy_idx
< 0) {
296 printf("WARNING: invalid phy or mode\n");
301 dr_mode_type
= modes
[mode_idx
];
304 dr_phy_type
= phys
[phy_idx
];
308 dr_phy_type
= phys
[2];
310 usb_mode_off
= fdt_fixup_usb_mode_phy_type(blob
,
314 if (usb_mode_off
< 0)
317 usb_phy_off
= fdt_fixup_usb_mode_phy_type(blob
,
324 if (has_erratum_a006261()) {
325 usb_erratum_a006261_off
= fdt_fixup_usb_erratum
327 "fsl,usb-erratum-a006261",
328 usb_erratum_a006261_off
);
329 if (usb_erratum_a006261_off
< 0)
333 if (has_erratum_a007075()) {
334 usb_erratum_a007075_off
= fdt_fixup_usb_erratum
336 "fsl,usb-erratum-a007075",
337 usb_erratum_a007075_off
);
338 if (usb_erratum_a007075_off
< 0)
342 if (has_erratum_a007792()) {
343 usb_erratum_a007792_off
= fdt_fixup_usb_erratum
345 "fsl,usb-erratum-a007792",
346 usb_erratum_a007792_off
);
347 if (usb_erratum_a007792_off
< 0)
350 if (has_erratum_a005697()) {
351 usb_erratum_a005697_off
= fdt_fixup_usb_erratum
353 "fsl,usb-erratum-a005697",
354 usb_erratum_a005697_off
);
355 if (usb_erratum_a005697_off
< 0)