drivers/usb/host/ehci-marvell.c

   1 /*
   2  * (C) Copyright 2009
   3  * Marvell Semiconductor <www.marvell.com>
   4  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  22  * MA 02110-1301 USA
  23  */
  24
  25 #include <common.h>
  26 #include <asm/io.h>
  27 #include <usb.h>
  28 #include "ehci.h"
  29 #include <asm/arch/cpu.h>
  30
  31 #if defined(CONFIG_KIRKWOOD)
  32 #include <asm/arch/kirkwood.h>
  33 #elif defined(CONFIG_ORION5X)
  34 #include <asm/arch/orion5x.h>
  35 #endif
  36
  37 DECLARE_GLOBAL_DATA_PTR;
  38
  39 #define rdl(off)        readl(MVUSB0_BASE + (off))
  40 #define wrl(off, val)   writel((val), MVUSB0_BASE + (off))
  41
  42 #define USB_WINDOW_CTRL(i)      (0x320 + ((i) << 4))
  43 #define USB_WINDOW_BASE(i)      (0x324 + ((i) << 4))
  44 #define USB_TARGET_DRAM         0x0
  45
  46 /*
  47  * USB 2.0 Bridge Address Decoding registers setup
  48  */
  49 static void usb_brg_adrdec_setup(void)
  50 {
  51         int i;
  52         u32 size, base, attrib;
  53
  54         for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  55
  56                 /* Enable DRAM bank */
  57                 switch (i) {
  58                 case 0:
  59                         attrib = MVUSB0_CPU_ATTR_DRAM_CS0;
  60                         break;
  61                 case 1:
  62                         attrib = MVUSB0_CPU_ATTR_DRAM_CS1;
  63                         break;
  64                 case 2:
  65                         attrib = MVUSB0_CPU_ATTR_DRAM_CS2;
  66                         break;
  67                 case 3:
  68                         attrib = MVUSB0_CPU_ATTR_DRAM_CS3;
  69                         break;
  70                 default:
  71                         /* invalide bank, disable access */
  72                         attrib = 0;
  73                         break;
  74                 }
  75
  76                 size = gd->bd->bi_dram[i].size;
  77                 base = gd->bd->bi_dram[i].start;
  78                 if ((size) && (attrib))
  79                         wrl(USB_WINDOW_CTRL(i),
  80                                 MVCPU_WIN_CTRL_DATA(size, USB_TARGET_DRAM,
  81                                         attrib, MVCPU_WIN_ENABLE));
  82                 else
  83                         wrl(USB_WINDOW_CTRL(i), MVCPU_WIN_DISABLE);
  84
  85                 wrl(USB_WINDOW_BASE(i), base);
  86         }
  87 }
  88
  89 /*
  90  * Create the appropriate control structures to manage
  91  * a new EHCI host controller.
  92  */
  93 int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
  94 {
  95         usb_brg_adrdec_setup();
  96
  97         *hccr = (struct ehci_hccr *)(MVUSB0_BASE + 0x100);
  98         *hcor = (struct ehci_hcor *)((uint32_t) *hccr
  99                         + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
 100
 101         debug("ehci-marvell: init hccr %x and hcor %x hc_length %d\n",
 102                 (uint32_t)*hccr, (uint32_t)*hcor,
 103                 (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
 104
 105         return 0;
 106 }
 107
 108 /*
 109  * Destroy the appropriate control structures corresponding
 110  * the the EHCI host controller.
 111  */
 112 int ehci_hcd_stop(int index)
 113 {
 114         return 0;
 115 }