drivers/usb/host/ehci-sunxi.c

   1 /*
   2  * Sunxi ehci glue
   3  *
   4  * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com>
   5  * Copyright (C) 2014 Roman Byshko <rbyshko@gmail.com>
   6  *
   7  * Based on code from
   8  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #include <common.h>
  14 #include <asm/arch/clock.h>
  15 #include <asm/arch/usb_phy.h>
  16 #include <asm/io.h>
  17 #include <dm.h>
  18 #include "ehci.h"
  19
  20 #ifdef CONFIG_SUNXI_GEN_SUN4I
  21 #define BASE_DIST               0x8000
  22 #define AHB_CLK_DIST            2
  23 #else
  24 #define BASE_DIST               0x1000
  25 #define AHB_CLK_DIST            1
  26 #endif
  27
  28 struct ehci_sunxi_priv {
  29         struct ehci_ctrl ehci;
  30         int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
  31         int phy_index;     /* Index of the usb-phy attached to this hcd */
  32 };
  33
  34 static int ehci_usb_probe(struct udevice *dev)
  35 {
  36         struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
  37         struct usb_platdata *plat = dev_get_platdata(dev);
  38         struct ehci_sunxi_priv *priv = dev_get_priv(dev);
  39         struct ehci_hccr *hccr = (struct ehci_hccr *)dev_get_addr(dev);
  40         struct ehci_hcor *hcor;
  41
  42         /*
  43          * This should go away once we've moved to the driver model for
  44          * clocks resp. phys.
  45          */
  46         priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
  47 #ifdef CONFIG_MACH_SUN8I_H3
  48         priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_OHCI0;
  49 #endif
  50         priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / BASE_DIST;
  51         priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
  52         priv->phy_index++; /* Non otg phys start at 1 */
  53
  54         setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
  55 #ifdef CONFIG_SUNXI_GEN_SUN6I
  56         setbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
  57 #endif
  58
  59         sunxi_usb_phy_init(priv->phy_index);
  60         sunxi_usb_phy_power_on(priv->phy_index);
  61
  62         hcor = (struct ehci_hcor *)((uint32_t)hccr +
  63                                     HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
  64
  65         return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type);
  66 }
  67
  68 static int ehci_usb_remove(struct udevice *dev)
  69 {
  70         struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
  71         struct ehci_sunxi_priv *priv = dev_get_priv(dev);
  72         int ret;
  73
  74         ret = ehci_deregister(dev);
  75         if (ret)
  76                 return ret;
  77
  78         sunxi_usb_phy_exit(priv->phy_index);
  79
  80 #ifdef CONFIG_SUNXI_GEN_SUN6I
  81         clrbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
  82 #endif
  83         clrbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
  84
  85         return 0;
  86 }
  87
  88 static const struct udevice_id ehci_usb_ids[] = {
  89         { .compatible = "allwinner,sun4i-a10-ehci", },
  90         { .compatible = "allwinner,sun5i-a13-ehci", },
  91         { .compatible = "allwinner,sun6i-a31-ehci", },
  92         { .compatible = "allwinner,sun7i-a20-ehci", },
  93         { .compatible = "allwinner,sun8i-a23-ehci", },
  94         { .compatible = "allwinner,sun8i-h3-ehci",  },
  95         { .compatible = "allwinner,sun9i-a80-ehci", },
  96         { }
  97 };
  98
  99 U_BOOT_DRIVER(ehci_sunxi) = {
 100         .name   = "ehci_sunxi",
 101         .id     = UCLASS_USB,
 102         .of_match = ehci_usb_ids,
 103         .probe = ehci_usb_probe,
 104         .remove = ehci_usb_remove,
 105         .ops    = &ehci_usb_ops,
 106         .platdata_auto_alloc_size = sizeof(struct usb_platdata),
 107         .priv_auto_alloc_size = sizeof(struct ehci_sunxi_priv),
 108         .flags  = DM_FLAG_ALLOC_PRIV_DMA,
 109 };