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remove VA_* from binutils
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1 2014-01-07 Tom Tromey <tromey@redhat.com>
2
3 * config/tc-tic30.c (debug): Avoid old VA_* compatibility
4 wrappers.
5
6 2014-01-07 Tom Tromey <tromey@redhat.com>
7
8 * config/tc-microblaze.h (parse_cons_expression_microblaze): Don't
9 use PARAMS.
10
11 2014-01-07 Tom Tromey <tromey@redhat.com>
12
13 * config/tc-xc16x.h: Don't use ANSI_PROTOTYPES.
14
15 2013-01-07 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
16
17 * config/tc-aarch64.c (aarch64_cpus): Add entry for "xgene-1"
18
19 2013-12-20 Tristan Gingold <gingold@adacore.com>
20
21 * doc/c-arm.texi (ARM Directives): Remove duplicate .pad entry.
22
23 2013-12-18 Yufeng Zhang <yufeng.zhang@arm.com>
24
25 * config/tc-aarch64.c (md_assemble): Defer the feature checking until
26 do_encode () succeeds.
27
28 2013-12-18 Nick Clifton <nickc@redhat.com>
29
30 * config/tc-rx.c (rx_include): Rename 'eof' to 'last_char' in
31 order to avoid conflict with same named variable in MinGW system
32 header file.
33
34 2013-12-13 Nick Clifton <nickc@redhat.com>
35
36 * config/tc-msp430.c (mcu_types): Add some more 430X mcu names.
37 (OPTION_INTR_NOPS): Define.
38 (gen_interrupt_nops): Default to FALSE.
39 (md_parse_opton): Add support for OPTION_INTR_NOPS.
40 (md_longopts): Add -mn.
41 (md_show_usage): Add -mn.
42 (msp430_operands): Generate NOPs for all MCUs not just 430Xv2.
43 * doc/c-msp430.c: Document -mn.
44
45 2013-12-13 Kuan-Lin Chen <kuanlinchentw@gmail.com>
46 Wei-Cheng Wang <cole945@gmail.com>
47 Hsiang-Kai Wang <hsiangkai@gmail.com>
48 Hui-Wen Ni <sabrinanitw@gmail.com>
49
50 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c.
51 (TARGET_CPU_HFILES): Add config/tc-nds32.h.
52 * Makefile.in: Regenerate.
53 * configure.in (nds32): Add nds32 target extension config support.
54 * configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*.
55 * configure: Regenerate.
56 * config/tc-nds32.c: New file for nds32.
57 * config/tc-nds32.h: New file for nds32.
58 * doc/Makefile.am (CPU_DOCS): Add c-nds32.texi.
59 * doc/Makefile.in: Regenerate.
60 * doc/as.texinfo: Add nds32 options.
61 * doc/all.texi: Set NDS32.
62 * doc/c-nds32.texi: New file dor nds32 document.
63 * NEWS: Announce Andes nds32 support.
64
65 2013-12-10 Roland McGrath <mcgrathr@google.com>
66
67 * Makefile.am (install-exec-bindir): Prefix libtool invocation
68 with $(INSTALL_PROGRAM_ENV).
69 (install-exec-tooldir): Likewise.
70 * Makefile.in: Regenerate.
71
72 2013-12-07 Mike Frysinger <vapier@gentoo.org>
73
74 * config/bfin-aux.h: Remove +x file mode.
75 * config/tc-epiphany.c: Likewise.
76 * config/tc-epiphany.h: Likewise.
77
78 2013-12-03 Tristan Gingold <gingold@adacore.com>
79
80 * config/tc-i386-intel.c (i386_intel_simplify): Avoid arithmetic
81 overflow on pointers.
82
83 2013-11-19 Yufeng Zhang <yufeng.zhang@arm.com>
84
85 Revert
86
87 2013-11-19 Nick Clifton <nickc@redhat.com>
88
89 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
90 for deprecated system registers when parsing pstate fields.
91
92 2013-11-19 Nick Clifton <nickc@redhat.com>
93
94 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
95 for deprecated system registers when parsing pstate fields.
96
97 2013-11-19 Catherine Moore <clm@codesourcery.com>
98
99 * config/tc-mips.c (mips_fix_pmc_rm7000): Declare.
100 (options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000.
101 (md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000.
102 (INSN_DMULT): Define.
103 (INSN_DMULTU): Define.
104 (insns_between): Detect PMC RM7000 errata.
105 (md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and
106 OPTION_NO_FIX_PMC_RM7000.
107 * doc/as.texinfo: Document new options.
108 * doc/c-mips.texi: Likewise.
109
110 2013-11-19 Alexey Makhalov <makhaloff@gmail.com>
111
112 PR gas/16109
113 * app.c (do_scrub_chars): Only insert a newline character if
114 end-of-file has been reached.
115
116 2013-11-18 H.J. Lu <hongjiu.lu@intel.com>
117
118 * config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix"
119 argument.
120
121 2013-11-18 Renlin Li <Renlin.Li@arm.com>
122
123 * config/tc-arm.c (arm_archs): New armv7ve architecture option.
124 (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
125 ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
126 (cpu_arch_ver): Likewise.
127 * doc/c-arm.texi: Document armv7ve.
128
129 2013-11-18 Zhenqiang Chen <zhenqiang.chen@linaro.org>
130
131 * config/tc-aarch64.c (parse_sys_reg): Support
132 S2_<op1>_<Cn>_<Cm>_<op2>.
133
134 2013-11-18 Yufeng Zhang <yufeng.zhang@arm.com>
135
136 Revert
137
138 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
139
140 * config/tc-aarch64.c (set_other_error): New function.
141 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
142 the variable to which it points with 'o'.
143 (parse_operands): Update; check for write to read-only system
144 registers or read from write-only ones.
145
146 2013-11-17 H.J. Lu <hongjiu.lu@intel.com>
147
148 * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
149 indicate if instruction has the BND prefix. Return
150 BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
151 bnd_prefix isn't zero.
152 (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
153 if needed.
154 (output_jump): Update reloc call.
155 (output_interseg_jump): Likewise.
156 (output_disp): Likewise.
157 (output_imm): Likewise.
158 (x86_cons_fix_new): Likewise.
159 (lex_got): Add an argument, bnd_prefix, to indicate if
160 instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
161 if needed.
162 (x86_cons): Update lex_got call.
163 (i386_immediate): Likewise.
164 (i386_displacement): Likewise.
165 (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
166 BFD_RELOC_X86_64_PLT32_BND.
167 (tc_gen_reloc): Likewise.
168 * config/tc-i386-intel.c (i386_operator): Update lex_got call.
169
170 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
171
172 * config/tc-aarch64.c (set_other_error): New function.
173 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
174 the variable to which it points with 'o'.
175 (parse_operands): Update; check for write to read-only system
176 registers or read from write-only ones.
177
178 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
179
180 * config/tc-i386.c (check_VecOperands): Reorder checks.
181
182 2013-11-11 Catherine Moore <clm@codesourcery.com>
183
184 * config/mips/tc-mips.c (convert_reg_type): Use
185 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
186 (reg_needs_delay): Likewise.
187 (insns_between): Likewise.
188
189 2013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
190
191 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
192
193 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
194
195 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
196 call aarch64_sys_reg_deprecated_p and warn about the deprecated
197 system registers.
198
199 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
200
201 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
202
203 2013-11-05 Will Newton <will.newton@linaro.org>
204
205 PR gas/16103
206 * config/tc-aarch64.c (parse_operands): Avoid trying to
207 parse a vector register as an immediate.
208
209 2013-11-04 Jan Beulich <jbeulich@suse.com>
210
211 * config/tc-i386.c (check_long_reg): Correct comment indentation.
212 (check_qword_reg): Correct comment and its indentation.
213 (check_word_reg): Extend comment and correct its indentation. Also
214 check for 64-bit register.
215
216 2013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
217
218 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
219 (ppc_elf_localentry): New function.
220 (ppc_force_relocation): Force relocs on all branches to localenty
221 symbols.
222 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
223
224 2013-10-30 Alan Modra <amodra@gmail.com>
225
226 * config/tc-ppc.c: Include elf/ppc64.h.
227 (ppc_abiversion): New variable.
228 (md_pseudo_table): Add .abiversion.
229 (ppc_elf_abiversion, ppc_elf_end): New functions.
230 * config/tc-ppc.h (md_end): Define.
231
232 2013-10-30 Alan Modra <amodra@gmail.com>
233
234 * config/tc-ppc.c (SEX16): Don't mask.
235 (REPORT_OVERFLOW_HI): Define as zero.
236 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
237 @tprel@high, and @tprel@higha modifiers.
238 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
239 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
240 Handle new relocs.
241 (md_apply_fix): Similarly.
242
243 2013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
244
245 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
246 (fpr_write_mask): Test MSA registers.
247 (can_swap_branch_p): Check fpr write followed by fpr read.
248
249 2013-10-18 Nick Clifton <nickc@redhat.com>
250
251 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
252
253 2013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
254 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
255
256 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
257 (md_longopts): Add mmsa and mno-msa.
258 (mips_ases): Add msa.
259 (RTYPE_MASK): Update.
260 (RTYPE_MSA): New define.
261 (OT_REG_ELEMENT): Replace with...
262 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
263 (mips_operand_token): Replace reg_element with index.
264 (mips_parse_argument_token): Treat vector indices as separate tokens.
265 Handle register indices.
266 (md_begin): Add MSA register names.
267 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
268 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
269 (match_mdmx_imm_reg_operand): Update accordingly.
270 (match_imm_index_operand): New function.
271 (match_reg_index_operand): New function.
272 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
273 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
274 (md_show_usage): Print -mmsa and -mno-msa.
275 * doc/as.texinfo: Document -mmsa and -mno-msa.
276 * doc/c-mips.texi: Document -mmsa and -mno-msa.
277 Document .set msa and .set nomsa.
278
279 2013-10-14 Nick Clifton <nickc@redhat.com>
280
281 * read.c (add_include_dir): Use xrealloc.
282 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
283 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
284
285 2013-10-13 Sandra Loosemore <sandra@codesourcery.com>
286
287 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
288 also test/refer to "sstatus". Reformat the warning message.
289
290 2013-10-10 Sean Keys <skeys@ipdatasys.com>
291
292 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
293
294 2013-10-10 Jan Beulich <jbeulich@suse.com>
295
296 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
297 swapping for bndmk, bndldx, and bndstx.
298
299 2013-10-09 Nick Clifton <nickc@redhat.com>
300
301 PR gas/16025
302 * config/tc-epiphany.c (md_convert_frag): Add missing break
303 statement.
304
305 PR gas/16026
306 * config/tc-mn10200.c (md_convert_frag): Add missing break
307 statement.
308
309 2013-10-08 Jan Beulich <jbeulich@suse.com>
310
311 * tc-i386.c (check_word_reg): Remove misplaced "else".
312 (check_long_reg): Restore symmetry with check_word_reg.
313
314 2013-10-08 Jan Beulich <jbeulich@suse.com>
315
316 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
317 LR/PC check.
318
319 2013-10-08 Nick Clifton <nickc@redhat.com>
320
321 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
322 for "<foo>a". Issue error messages for unrecognised or corrrupt
323 size extensions.
324
325 2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
326
327 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
328 possible.
329
330 2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
331
332 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
333 * doc/c-i386.texi: Add -march=bdver4 option.
334
335 2013-09-20 Alan Modra <amodra@gmail.com>
336
337 * configure: Regenerate.
338
339 2013-09-18 Tristan Gingold <gingold@adacore.com>
340
341 * NEWS: Add marker for 2.24.
342
343 2013-09-18 Nick Clifton <nickc@redhat.com>
344
345 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
346 (move_data): New variable.
347 (md_parse_option): Parse -md.
348 (msp430_section): New function. Catch references to the .bss or
349 .data sections and generate a special symbol for use by the libcrt
350 library.
351 (md_pseudo_table): Intercept .section directives.
352 (md_longopt): Add -md
353 (md_show_usage): Likewise.
354 (msp430_operands): Generate a warning message if a NOP is inserted
355 into the instruction stream.
356 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
357
358 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
359
360 * config/tc-mips.c (mips_elf_final_processing): Set
361 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
362
363 2013-09-16 Will Newton <will.newton@linaro.org>
364
365 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
366 disallowing element size 64 with interleave other than 1.
367
368 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
369
370 * config/tc-mips.c (match_insn): Set error when $31 is used for
371 bltzal* and bgezal*.
372
373 2013-09-04 Tristan Gingold <gingold@adacore.com>
374
375 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
376 symbols.
377
378 2013-09-04 Roland McGrath <mcgrathr@google.com>
379
380 PR gas/15914
381 * config/tc-arm.c (T16_32_TAB): Add _udf.
382 (do_t_udf): New function.
383 (insns): Add "udf".
384
385 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
386
387 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
388 assembler errors at correct position.
389
390 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
391
392 PR binutils/15834
393 * config/tc-ia64.c: Fix typos.
394 * config/tc-sparc.c: Likewise.
395 * config/tc-z80.c: Likewise.
396 * doc/c-i386.texi: Likewise.
397 * doc/c-m32r.texi: Likewise.
398
399 2013-08-23 Will Newton <will.newton@linaro.org>
400
401 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
402 for pre-indexed addressing modes.
403
404 2013-08-21 Alan Modra <amodra@gmail.com>
405
406 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
407 range check label number for use with fb_low_counter array.
408
409 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
410
411 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
412 (mips_parse_argument_token, validate_micromips_insn, md_begin)
413 (check_regno, match_float_constant, check_completed_insn, append_insn)
414 (match_insn, match_mips16_insn, match_insns, macro_start)
415 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
416 (mips16_ip, mips_set_option_string, md_parse_option)
417 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
418 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
419 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
420 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
421 Start error messages with a lower-case letter. Do not end error
422 messages with a period. Wrap long messages to 80 character-lines.
423 Use "cannot" instead of "can't" and "can not".
424
425 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
426
427 * config/tc-mips.c (imm_expr): Expand comment.
428 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
429 when populated.
430
431 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
432
433 * config/tc-mips.c (imm2_expr): Delete.
434 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
435
436 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
437
438 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
439 (macro): Remove M_DEXT and M_DINS handling.
440
441 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
442
443 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
444 lax_max with lax_match.
445 (match_int_operand): Update accordingly. Don't report an error
446 for !lax_match-only cases.
447 (match_insn): Replace more_alts with lax_match and use it to
448 initialize the mips_arg_info field. Add a complete_p parameter.
449 Handle implicit VU0 suffixes here.
450 (match_invalid_for_isa, match_insns, match_mips16_insns): New
451 functions.
452 (mips_ip, mips16_ip): Use them.
453
454 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
455
456 * config/tc-mips.c (match_expression): Report uses of registers here.
457 Add a "must be an immediate expression" error. Handle elided offsets
458 here rather than...
459 (match_int_operand): ...here.
460
461 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
462
463 * config/tc-mips.c (mips_arg_info): Remove soft_match.
464 (match_out_of_range, match_not_constant): New functions.
465 (match_const_int): Remove fallback parameter and check for soft_match.
466 Use match_not_constant.
467 (match_mapped_int_operand, match_addiusp_operand)
468 (match_perf_reg_operand, match_save_restore_list_operand)
469 (match_mdmx_imm_reg_operand): Update accordingly. Use
470 match_out_of_range and set_insn_error* instead of as_bad.
471 (match_int_operand): Likewise. Use match_not_constant in the
472 !allows_nonconst case.
473 (match_float_constant): Report invalid float constants.
474 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
475 match_float_constant to check for invalid constants. Fail the
476 match if match_const_int or match_float_constant return false.
477 (mips_ip): Update accordingly.
478 (mips16_ip): Likewise. Undo null termination of instruction name
479 once lookup is complete.
480
481 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
482
483 * config/tc-mips.c (mips_insn_error_format): New enum.
484 (mips_insn_error): New struct.
485 (insn_error): Change to a mips_insn_error.
486 (clear_insn_error, set_insn_error_format, set_insn_error)
487 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
488 functions.
489 (mips_parse_argument_token, md_assemble, match_insn)
490 (match_mips16_insn): Use them instead of manipulating insn_error
491 directly.
492 (mips_ip, mips16_ip): Likewise. Simplify control flow.
493
494 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
495
496 * config/tc-mips.c (normalize_constant_expr): Move further up file.
497 (normalize_address_expr): Likewise.
498 (match_insn, match_mips16_insn): New functions, split out from...
499 (mips_ip, mips16_ip): ...here.
500
501 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
502
503 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
504 OP_OPTIONAL_REG.
505 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
506 for optional operands.
507
508 2013-08-16 Alan Modra <amodra@gmail.com>
509
510 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
511 modifiers generally.
512
513 2013-08-16 Alan Modra <amodra@gmail.com>
514
515 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
516
517 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
518
519 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
520 argument as alignment.
521
522 2013-08-09 Nick Clifton <nickc@redhat.com>
523
524 * config/tc-rl78.c (elf_flags): New variable.
525 (enum options): Add OPTION_G10.
526 (md_longopts): Add mg10.
527 (md_parse_option): Parse -mg10.
528 (rl78_elf_final_processing): New function.
529 * config/tc-rl78.c (tc_final_processing): Define.
530 * doc/c-rl78.texi: Document -mg10 option.
531
532 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
533
534 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
535 suffixes to be elided too.
536 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
537 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
538 to be omitted too.
539
540 2013-08-05 John Tytgat <john@bass-software.com>
541
542 * po/POTFILES.in: Regenerate.
543
544 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
545 Konrad Eisele <konrad@gaisler.com>
546
547 * config/tc-sparc.c (sparc_arch_types): Add leon.
548 (sparc_arch): Move sparc4 around and add leon.
549 (sparc_target_format): Document -Aleon.
550 * doc/c-sparc.texi: Likewise.
551
552 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
553
554 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
555
556 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
557 Richard Sandiford <rdsandiford@googlemail.com>
558
559 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
560 (RWARN): Bump to 0x8000000.
561 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
562 (RTYPE_R5900_ACC): New register types.
563 (RTYPE_MASK): Include them.
564 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
565 macros.
566 (reg_names): Include them.
567 (mips_parse_register_1): New function, split out from...
568 (mips_parse_register): ...here. Add a channels_ptr parameter.
569 Look for VU0 channel suffixes when nonnull.
570 (reg_lookup): Update the call to mips_parse_register.
571 (mips_parse_vu0_channels): New function.
572 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
573 (mips_operand_token): Add a "channels" field to the union.
574 Extend the comment above "ch" to OT_DOUBLE_CHAR.
575 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
576 (mips_parse_argument_token): Handle channel suffixes here too.
577 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
578 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
579 Handle '#' formats.
580 (md_begin): Register $vfN and $vfI registers.
581 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
582 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
583 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
584 (match_vu0_suffix_operand): New function.
585 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
586 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
587 (mips_lookup_insn): New function.
588 (mips_ip): Use it. Allow "+K" operands to be elided at the end
589 of an instruction. Handle '#' sequences.
590
591 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
592
593 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
594 values and use it instead of sreg, treg, xreg, etc.
595
596 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
597
598 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
599 and mips_int_operand_max.
600 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
601 Delete.
602 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
603 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
604 instead of mips16_immed_operand.
605
606 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
607
608 * config/tc-mips.c (mips16_macro): Don't use move_register.
609 (mips16_ip): Allow macros to use 'p'.
610
611 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
612
613 * config/tc-mips.c (MAX_OPERANDS): New macro.
614 (mips_operand_array): New structure.
615 (mips_operands, mips16_operands, micromips_operands): New arrays.
616 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
617 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
618 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
619 (micromips_to_32_reg_q_map): Delete.
620 (insn_operands, insn_opno, insn_extract_operand): New functions.
621 (validate_mips_insn): Take a mips_operand_array as argument and
622 use it to build up a list of operands. Extend to handle INSN_MACRO
623 and MIPS16.
624 (validate_mips16_insn): New function.
625 (validate_micromips_insn): Take a mips_operand_array as argument.
626 Handle INSN_MACRO.
627 (md_begin): Initialize mips_operands, mips16_operands and
628 micromips_operands. Call validate_mips_insn and
629 validate_micromips_insn for macro instructions too.
630 Call validate_mips16_insn for MIPS16 instructions.
631 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
632 New functions.
633 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
634 them. Handle INSN_UDI.
635 (get_append_method): Use gpr_read_mask.
636
637 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
638
639 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
640 flags for MIPS16 and non-MIPS16 instructions.
641 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
642 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
643 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
644 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
645 and non-MIPS16 instructions. Fix formatting.
646
647 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
648
649 * config/tc-mips.c (reg_needs_delay): Move later in file.
650 Use gpr_write_mask.
651 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
652
653 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
654 Alexander Ivchenko <alexander.ivchenko@intel.com>
655 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
656 Sergey Lega <sergey.s.lega@intel.com>
657 Anna Tikhonova <anna.tikhonova@intel.com>
658 Ilya Tocar <ilya.tocar@intel.com>
659 Andrey Turetskiy <andrey.turetskiy@intel.com>
660 Ilya Verbin <ilya.verbin@intel.com>
661 Kirill Yukhin <kirill.yukhin@intel.com>
662 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
663
664 * config/tc-i386-intel.c (O_zmmword_ptr): New.
665 (i386_types): Add zmmword.
666 (i386_intel_simplify_register): Allow regzmm.
667 (i386_intel_simplify): Handle zmmwords.
668 (i386_intel_operand): Handle RC/SAE, vector operations and
669 zmmwords.
670 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
671 (struct RC_Operation): New.
672 (struct Mask_Operation): New.
673 (struct Broadcast_Operation): New.
674 (vex_prefix): Size of bytes increased to 4 to support EVEX
675 encoding.
676 (enum i386_error): Add new error codes: unsupported_broadcast,
677 broadcast_not_on_src_operand, broadcast_needed,
678 unsupported_masking, mask_not_on_destination, no_default_mask,
679 unsupported_rc_sae, rc_sae_operand_not_last_imm,
680 invalid_register_operand, try_vector_disp8.
681 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
682 rounding, broadcast, memshift.
683 (struct RC_name): New.
684 (RC_NamesTable): New.
685 (evexlig): New.
686 (evexwig): New.
687 (extra_symbol_chars): Add '{'.
688 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
689 (i386_operand_type): Add regzmm, regmask and vec_disp8.
690 (match_mem_size): Handle zmmwords.
691 (operand_type_match): Handle zmm-registers.
692 (mode_from_disp_size): Handle vec_disp8.
693 (fits_in_vec_disp8): New.
694 (md_begin): Handle {} properly.
695 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
696 (build_vex_prefix): Handle vrex.
697 (build_evex_prefix): New.
698 (process_immext): Adjust to properly handle EVEX.
699 (md_assemble): Add EVEX encoding support.
700 (swap_2_operands): Correctly handle operands with masking,
701 broadcasting or RC/SAE.
702 (check_VecOperands): Support EVEX features.
703 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
704 (match_template): Support regzmm and handle new error codes.
705 (process_suffix): Handle zmmwords and zmm-registers.
706 (check_byte_reg): Extend to zmm-registers.
707 (process_operands): Extend to zmm-registers.
708 (build_modrm_byte): Handle EVEX.
709 (output_insn): Adjust to properly handle EVEX case.
710 (disp_size): Handle vec_disp8.
711 (output_disp): Support compressed disp8*N evex feature.
712 (output_imm): Handle RC/SAE immediates properly.
713 (check_VecOperations): New.
714 (i386_immediate): Handle EVEX features.
715 (i386_index_check): Handle zmmwords and zmm-registers.
716 (RC_SAE_immediate): New.
717 (i386_att_operand): Handle EVEX features.
718 (parse_real_register): Add a check for ZMM/Mask registers.
719 (OPTION_MEVEXLIG): New.
720 (OPTION_MEVEXWIG): New.
721 (md_longopts): Add mevexlig and mevexwig.
722 (md_parse_option): Handle mevexlig and mevexwig options.
723 (md_show_usage): Add description for mevexlig and mevexwig.
724 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
725 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
726
727 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
728
729 * config/tc-i386.c (cpu_arch): Add .sha.
730 * doc/c-i386.texi: Document sha/.sha.
731
732 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
733 Kirill Yukhin <kirill.yukhin@intel.com>
734 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
735
736 * config/tc-i386.c (BND_PREFIX): New.
737 (struct _i386_insn): Add new field bnd_prefix.
738 (add_bnd_prefix): New.
739 (cpu_arch): Add MPX.
740 (i386_operand_type): Add regbnd.
741 (md_assemble): Handle BND prefixes.
742 (parse_insn): Likewise.
743 (output_branch): Likewise.
744 (output_jump): Likewise.
745 (build_modrm_byte): Handle regbnd.
746 (OPTION_MADD_BND_PREFIX): New.
747 (md_longopts): Add entry for 'madd-bnd-prefix'.
748 (md_parse_option): Handle madd-bnd-prefix option.
749 (md_show_usage): Add description for madd-bnd-prefix
750 option.
751 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
752
753 2013-07-24 Tristan Gingold <gingold@adacore.com>
754
755 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
756 xcoff targets.
757
758 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
759
760 * config/tc-s390.c (s390_machine): Don't force the .machine
761 argument to lower case.
762
763 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
764
765 * config/tc-arm.c (s_arm_arch_extension): Improve error message
766 for invalid extension.
767
768 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
769
770 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
771 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
772 (aarch64_abi): New variable.
773 (ilp32_p): Change to be a macro.
774 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
775 (struct aarch64_option_abi_value_table): New struct.
776 (aarch64_abis): New table.
777 (aarch64_parse_abi): New function.
778 (aarch64_long_opts): Add entry for -mabi=.
779 * doc/as.texinfo (Target AArch64 options): Document -mabi.
780 * doc/c-aarch64.texi: Likewise.
781
782 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
783
784 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
785 unsigned comparison.
786
787 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
788
789 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
790 RX610.
791 * config/rx-parse.y: (rx_check_float_support): Add function to
792 check floating point operation support for target RX100 and
793 RX200.
794 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
795 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
796 RX200, RX600, and RX610
797
798 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
799
800 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
801
802 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
803
804 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
805 * doc/c-avr.texi: Likewise.
806
807 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
808
809 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
810 error with older GCCs.
811 (mips16_macro_build): Dereference args.
812
813 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
814
815 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
816 New functions, split out from...
817 (reg_lookup): ...here. Remove itbl support.
818 (reglist_lookup): Delete.
819 (mips_operand_token_type): New enum.
820 (mips_operand_token): New structure.
821 (mips_operand_tokens): New variable.
822 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
823 (mips_parse_arguments): New functions.
824 (md_begin): Initialize mips_operand_tokens.
825 (mips_arg_info): Add a token field. Remove optional_reg field.
826 (match_char, match_expression): New functions.
827 (match_const_int): Use match_expression. Remove "s" argument
828 and return a boolean result. Remove O_register handling.
829 (match_regno, match_reg, match_reg_range): New functions.
830 (match_int_operand, match_mapped_int_operand, match_msb_operand)
831 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
832 (match_addiusp_operand, match_clo_clz_dest_operand)
833 (match_lwm_swm_list_operand, match_entry_exit_operand)
834 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
835 (match_tied_reg_operand): Remove "s" argument and return a boolean
836 result. Match tokens rather than text. Update calls to
837 match_const_int. Rely on match_regno to call check_regno.
838 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
839 "arg" argument. Return a boolean result.
840 (parse_float_constant): Replace with...
841 (match_float_constant): ...this new function.
842 (match_operand): Remove "s" argument and return a boolean result.
843 Update calls to subfunctions.
844 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
845 rather than string-parsing routines. Update handling of optional
846 registers for token scheme.
847
848 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
849
850 * config/tc-mips.c (parse_float_constant): Split out from...
851 (mips_ip): ...here.
852
853 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
854
855 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
856 Delete.
857
858 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
859
860 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
861 (match_entry_exit_operand): New function.
862 (match_save_restore_list_operand): Likewise.
863 (match_operand): Use them.
864 (check_absolute_expr): Delete.
865 (mips16_ip): Rewrite main parsing loop to use mips_operands.
866
867 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
868
869 * config/tc-mips.c: Enable functions commented out in previous patch.
870 (SKIP_SPACE_TABS): Move further up file.
871 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
872 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
873 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
874 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
875 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
876 (micromips_imm_b_map, micromips_imm_c_map): Delete.
877 (mips_lookup_reg_pair): Delete.
878 (macro): Use report_bad_range and report_bad_field.
879 (mips_immed, expr_const_in_range): Delete.
880 (mips_ip): Rewrite main parsing loop to use new functions.
881
882 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
883
884 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
885 Change return type to bfd_boolean.
886 (report_bad_range, report_bad_field): New functions.
887 (mips_arg_info): New structure.
888 (match_const_int, convert_reg_type, check_regno, match_int_operand)
889 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
890 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
891 (match_addiusp_operand, match_clo_clz_dest_operand)
892 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
893 (match_pc_operand, match_tied_reg_operand, match_operand)
894 (check_completed_insn): New functions, commented out for now.
895
896 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
897
898 * config/tc-mips.c (insn_insert_operand): New function.
899 (macro_build, mips16_macro_build): Put null character check
900 in the for loop and convert continues to breaks. Use operand
901 structures to handle constant operands.
902
903 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
904
905 * config/tc-mips.c (validate_mips_insn): Move further up file.
906 Add insn_bits and decode_operand arguments. Use the mips_operand
907 fields to work out which bits an operand occupies. Detect double
908 definitions.
909 (validate_micromips_insn): Move further up file. Call into
910 validate_mips_insn.
911
912 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
913
914 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
915
916 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
917
918 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
919 and "~".
920 (macro): Update accordingly.
921
922 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
923
924 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
925 (imm_reloc): Delete.
926 (md_assemble): Remove imm_reloc handling.
927 (mips_ip): Update commentary. Use offset_expr and offset_reloc
928 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
929 Use a temporary array rather than imm_reloc when parsing
930 constant expressions. Remove imm_reloc initialization.
931 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
932 for the relaxable field. Use a relax_char variable to track the
933 type of this field. Remove imm_reloc initialization.
934
935 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
936
937 * config/tc-mips.c (mips16_ip): Handle "I".
938
939 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
940
941 * config/tc-mips.c (mips_flag_nan2008): New variable.
942 (options): Add OPTION_NAN enum value.
943 (md_longopts): Handle it.
944 (md_parse_option): Likewise.
945 (s_nan): New function.
946 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
947 (md_show_usage): Add -mnan.
948
949 * doc/as.texinfo (Overview): Add -mnan.
950 * doc/c-mips.texi (MIPS Opts): Document -mnan.
951 (MIPS NaN Encodings): New node. Document .nan directive.
952 (MIPS-Dependent): List the new node.
953
954 2013-07-09 Tristan Gingold <gingold@adacore.com>
955
956 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
957
958 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
959
960 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
961 for 'A' and assume that the constant has been elided if the result
962 is an O_register.
963
964 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
965
966 * config/tc-mips.c (gprel16_reloc_p): New function.
967 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
968 BFD_RELOC_UNUSED.
969 (offset_high_part, small_offset_p): New functions.
970 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
971 register load and store macros, handle the 16-bit offset case first.
972 If a 16-bit offset is not suitable for the instruction we're
973 generating, load it into the temporary register using
974 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
975 M_L_DAB code once the address has been constructed. For double load
976 and store macros, again handle the 16-bit offset case first.
977 If the second register cannot be accessed from the same high
978 part as the first, load it into AT using ADDRESS_ADDI_INSN.
979 Fix the handling of LD in cases where the first register is the
980 same as the base. Also handle the case where the offset is
981 not 16 bits and the second register cannot be accessed from the
982 same high part as the first. For unaligned loads and stores,
983 fuse the offbits == 12 and old "ab" handling. Apply this handling
984 whenever the second offset needs a different high part from the first.
985 Construct the offset using ADDRESS_ADDI_INSN where possible,
986 for offbits == 16 as well as offbits == 12. Use offset_reloc
987 when constructing the individual loads and stores.
988 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
989 and offset_reloc before matching against a particular opcode.
990 Handle elided 'A' constants. Allow 'A' constants to use
991 relocation operators.
992
993 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
994
995 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
996 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
997 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
998
999 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
1000
1001 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
1002 Require the msb to be <= 31 for "+s". Check that the size is <= 31
1003 for both "+s" and "+S".
1004
1005 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
1006
1007 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
1008 (mips_ip, mips16_ip): Handle "+i".
1009
1010 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
1011
1012 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
1013 (micromips_to_32_reg_h_map): Rename to...
1014 (micromips_to_32_reg_h_map1): ...this.
1015 (micromips_to_32_reg_i_map): Rename to...
1016 (micromips_to_32_reg_h_map2): ...this.
1017 (mips_lookup_reg_pair): New function.
1018 (gpr_write_mask, macro): Adjust after above renaming.
1019 (validate_micromips_insn): Remove "mi" handling.
1020 (mips_ip): Likewise. Parse both registers in a pair for "mh".
1021
1022 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
1023
1024 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
1025 (mips_ip): Remove "+D" and "+T" handling.
1026
1027 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
1028
1029 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
1030 relocs.
1031
1032 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
1033
1034 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
1035
1036 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
1037
1038 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
1039 (aarch64_force_relocation): Likewise.
1040
1041 2013-07-02 Alan Modra <amodra@gmail.com>
1042
1043 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
1044
1045 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
1046
1047 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
1048 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
1049 Replace @sc{mips16} with literal `MIPS16'.
1050 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
1051
1052 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
1053
1054 * config/tc-aarch64.c (reloc_table): Replace
1055 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
1056 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
1057 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
1058 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
1059 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
1060 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
1061 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
1062 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
1063 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
1064 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
1065 (aarch64_force_relocation): Likewise.
1066
1067 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
1068
1069 * config/tc-aarch64.c (ilp32_p): New static variable.
1070 (elf64_aarch64_target_format): Return the target according to the
1071 value of 'ilp32_p'.
1072 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
1073 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
1074 (aarch64_dwarf2_addr_size): New function.
1075 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
1076 (DWARF2_ADDR_SIZE): New define.
1077
1078 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1079
1080 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
1081
1082 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1083
1084 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
1085
1086 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
1087
1088 * config/tc-mips.c (mips_set_options): Add insn32 member.
1089 (mips_opts): Initialize it.
1090 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
1091 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
1092 (md_longopts): Add "minsn32" and "mno-insn32" options.
1093 (is_size_valid): Handle insn32 mode.
1094 (md_assemble): Pass instruction string down to macro.
1095 (brk_fmt): Add second dimension and insn32 mode initializers.
1096 (mfhl_fmt): Likewise.
1097 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
1098 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
1099 (macro_build_jalr, move_register): Handle insn32 mode.
1100 (macro_build_branch_rs): Likewise.
1101 (macro): Handle insn32 mode.
1102 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
1103 (mips_ip): Handle insn32 mode.
1104 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
1105 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
1106 (mips_handle_align): Handle insn32 mode.
1107 (md_show_usage): Add -minsn32 and -mno-insn32.
1108
1109 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
1110 -mno-insn32 options.
1111 (-minsn32, -mno-insn32): New options.
1112 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
1113 options.
1114 (MIPS assembly options): New node. Document .set insn32 and
1115 .set noinsn32.
1116 (MIPS-Dependent): List the new node.
1117
1118 2013-06-25 Nick Clifton <nickc@redhat.com>
1119
1120 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
1121 the PC in indirect addressing on 430xv2 parts.
1122 (msp430_operands): Add version test to hardware bug encoding
1123 restrictions.
1124
1125 2013-06-24 Roland McGrath <mcgrathr@google.com>
1126
1127 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
1128 so it skips whitespace before it.
1129 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
1130
1131 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
1132 (arm_reg_parse_multi): Skip whitespace first.
1133 (parse_reg_list): Likewise.
1134 (parse_vfp_reg_list): Likewise.
1135 (s_arm_unwind_save_mmxwcg): Likewise.
1136
1137 2013-06-24 Nick Clifton <nickc@redhat.com>
1138
1139 PR gas/15623
1140 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
1141
1142 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1143
1144 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
1145
1146 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1147
1148 * config/tc-mips.c: Assert that offsetT and valueT are at least
1149 8 bytes in size.
1150 (GPR_SMIN, GPR_SMAX): New macros.
1151 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
1152
1153 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1154
1155 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
1156 conditions. Remove any code deselected by them.
1157 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
1158
1159 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1160
1161 * NEWS: Note removal of ECOFF support.
1162 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
1163 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
1164 (MULTI_CFILES): Remove config/e-mipsecoff.c.
1165 * Makefile.in: Regenerate.
1166 * configure.in: Remove MIPS ECOFF references.
1167 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1168 Delete cases.
1169 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1170 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1171 (mips-*-*): ...this single case.
1172 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1173 MIPS emulations to be e-mipself*.
1174 * configure: Regenerate.
1175 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1176 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1177 (mips-*-sysv*): Remove coff and ecoff cases.
1178 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1179 * ecoff.c: Remove reference to MIPS ECOFF.
1180 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1181 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1182 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1183 (mips_hi_fixup): Tweak comment.
1184 (append_insn): Require a howto.
1185 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1186
1187 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1188
1189 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1190 Use "CPU" instead of "cpu".
1191 * doc/c-mips.texi: Likewise.
1192 (MIPS Opts): Rename to MIPS Options.
1193 (MIPS option stack): Rename to MIPS Option Stack.
1194 (MIPS ASE instruction generation overrides): Rename to
1195 MIPS ASE Instruction Generation Overrides (for now).
1196 (MIPS floating-point): Rename to MIPS Floating-Point.
1197
1198 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1199
1200 * doc/c-mips.texi (MIPS Macros): New section.
1201 (MIPS Object): Replace with...
1202 (MIPS Small Data): ...this new section.
1203
1204 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1205
1206 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1207 Capitalize name. Use @kindex instead of @cindex for .set entries.
1208
1209 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1210
1211 * doc/c-mips.texi (MIPS Stabs): Remove section.
1212
1213 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1214
1215 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1216 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1217 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1218 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1219 (mips_ase): New structure.
1220 (mips_ases): New table.
1221 (FP64_ASES): New macro.
1222 (mips_ase_groups): New array.
1223 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1224 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1225 functions.
1226 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1227 (md_parse_option): Use mips_ases and mips_set_ase instead of
1228 separate case statements for each ASE option.
1229 (mips_after_parse_args): Use FP64_ASES. Use
1230 mips_check_isa_supports_ases to check the ASEs against
1231 other options.
1232 (s_mipsset): Use mips_ases and mips_set_ase instead of
1233 separate if statements for each ASE option. Use
1234 mips_check_isa_supports_ases, even when a non-ASE option
1235 is specified.
1236
1237 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1238
1239 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1240
1241 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1242
1243 * config/tc-mips.c (md_shortopts, options, md_longopts)
1244 (md_longopts_size): Move earlier in file.
1245
1246 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1247
1248 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1249 with a single "ase" bitmask.
1250 (mips_opts): Update accordingly.
1251 (file_ase, file_ase_explicit): New variables.
1252 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1253 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1254 (ISA_HAS_ROR): Adjust for mips_set_options change.
1255 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1256 (mips_ip): Adjust for mips_set_options change.
1257 (md_parse_option): Likewise. Update file_ase_explicit.
1258 (mips_after_parse_args): Adjust for mips_set_options change.
1259 Use bitmask operations to select the default ASEs. Set file_ase
1260 rather than individual per-ASE variables.
1261 (s_mipsset): Adjust for mips_set_options change.
1262 (mips_elf_final_processing): Test file_ase rather than
1263 file_ase_mdmx. Remove commented-out code.
1264
1265 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1266
1267 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1268 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1269 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1270 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1271 (mips_after_parse_args): Use the new "ase" field to choose
1272 the default ASEs.
1273 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1274 "ase" field.
1275
1276 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
1277
1278 * config/tc-arm.c (symbol_preemptible): New function.
1279 (relax_branch): Use it.
1280
1281 2013-06-17 Catherine Moore <clm@codesourcery.com>
1282 Maciej W. Rozycki <macro@codesourcery.com>
1283 Chao-Ying Fu <fu@mips.com>
1284
1285 * config/tc-mips.c (mips_set_options): Add ase_eva.
1286 (mips_set_options mips_opts): Add ase_eva.
1287 (file_ase_eva): Declare.
1288 (ISA_SUPPORTS_EVA_ASE): Define.
1289 (IS_SEXT_9BIT_NUM): Define.
1290 (MIPS_CPU_ASE_EVA): Define.
1291 (is_opcode_valid): Add support for ase_eva.
1292 (macro_build): Likewise.
1293 (macro): Likewise.
1294 (validate_mips_insn): Likewise.
1295 (validate_micromips_insn): Likewise.
1296 (mips_ip): Likewise.
1297 (options): Add OPTION_EVA and OPTION_NO_EVA.
1298 (md_longopts): Add -meva and -mno-eva.
1299 (md_parse_option): Process new options.
1300 (mips_after_parse_args): Check for valid EVA combinations.
1301 (s_mipsset): Likewise.
1302
1303 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1304
1305 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1306 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1307 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1308 (dwarf2_gen_line_info_1): Update call accordingly.
1309 (dwarf2_move_insn): New function.
1310 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1311
1312 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1313
1314 Revert:
1315
1316 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1317
1318 PR gas/13024
1319 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1320 (dwarf2_gen_line_info_1): Delete.
1321 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1322 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1323 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1324 (dwarf2_directive_loc): Push previous .locs instead of generating
1325 them immediately.
1326
1327 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1328
1329 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1330 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1331
1332 2013-06-13 Nick Clifton <nickc@redhat.com>
1333
1334 PR gas/15602
1335 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1336 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1337 function. Generates an error if the adjusted offset is out of a
1338 16-bit range.
1339
1340 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1341
1342 * config/tc-nios2.c (md_apply_fix): Mask constant
1343 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1344
1345 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1346
1347 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1348 MIPS-3D instructions either.
1349 (md_convert_frag): Update the COPx branch mask accordingly.
1350
1351 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1352 option.
1353 * doc/as.texinfo (Overview): Add --relax-branch and
1354 --no-relax-branch.
1355 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1356 --no-relax-branch.
1357
1358 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1359
1360 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1361 omitted.
1362
1363 2013-06-08 Catherine Moore <clm@codesourcery.com>
1364
1365 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1366 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1367 (append_insn): Change INSN_xxxx to ASE_xxxx.
1368
1369 2013-06-01 George Thomas <george.thomas@atmel.com>
1370
1371 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1372 AVR_ISA_XMEGAU
1373
1374 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1375
1376 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1377 for ELF.
1378
1379 2013-05-31 Paul Brook <paul@codesourcery.com>
1380
1381 * config/tc-mips.c (s_ehword): New.
1382
1383 2013-05-30 Paul Brook <paul@codesourcery.com>
1384
1385 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1386
1387 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1388
1389 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1390 convert relocs who have no relocatable field either. Rephrase
1391 the conditional so that the PC-relative check is only applied
1392 for REL targets.
1393
1394 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1395
1396 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1397 calculation.
1398
1399 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1400
1401 * config/tc-aarch64.c (reloc_table): Update to use
1402 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1403 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1404 (md_apply_fix): Likewise.
1405 (aarch64_force_relocation): Likewise.
1406
1407 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1408
1409 * config/tc-arm.c (it_fsm_post_encode): Improve
1410 warning messages about deprecated IT block formats.
1411
1412 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1413
1414 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1415 inside fx_done condition.
1416
1417 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1418
1419 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1420
1421 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1422
1423 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1424 and clean up warning when using PRINT_OPCODE_TABLE.
1425
1426 2013-05-20 Alan Modra <amodra@gmail.com>
1427
1428 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1429 and data fixups performing shift/high adjust/sign extension on
1430 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1431 when writing data fixups rather than recalculating size.
1432
1433 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1434
1435 * doc/c-msp430.texi: Fix typo.
1436
1437 2013-05-16 Tristan Gingold <gingold@adacore.com>
1438
1439 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1440 are also TOC symbols.
1441
1442 2013-05-16 Nick Clifton <nickc@redhat.com>
1443
1444 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1445 Add -mcpu command to specify core type.
1446 * doc/c-msp430.texi: Update documentation.
1447
1448 2013-05-09 Andrew Pinski <apinski@cavium.com>
1449
1450 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1451 (mips_opts): Update for the new field.
1452 (file_ase_virt): New variable.
1453 (ISA_SUPPORTS_VIRT_ASE): New macro.
1454 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1455 (MIPS_CPU_ASE_VIRT): New define.
1456 (is_opcode_valid): Handle ase_virt.
1457 (macro_build): Handle "+J".
1458 (validate_mips_insn): Likewise.
1459 (mips_ip): Likewise.
1460 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1461 (md_longopts): Add mvirt and mnovirt
1462 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1463 (mips_after_parse_args): Handle ase_virt field.
1464 (s_mipsset): Handle "virt" and "novirt".
1465 (mips_elf_final_processing): Add a comment about virt ASE might need
1466 a new flag.
1467 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1468 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1469 Document ".set virt" and ".set novirt".
1470
1471 2013-05-09 Alan Modra <amodra@gmail.com>
1472
1473 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1474 control of operand flag bits.
1475
1476 2013-05-07 Alan Modra <amodra@gmail.com>
1477
1478 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1479 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1480 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1481 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1482 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1483 Shift and sign-extend fieldval for use by some VLE reloc
1484 operand->insert functions.
1485
1486 2013-05-06 Paul Brook <paul@codesourcery.com>
1487 Catherine Moore <clm@codesourcery.com>
1488
1489 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1490 (limited_pcrel_reloc_p): Likewise.
1491 (md_apply_fix): Likewise.
1492 (tc_gen_reloc): Likewise.
1493
1494 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1495
1496 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1497 (mips_fix_adjustable): Adjust pc-relative check to use
1498 limited_pc_reloc_p.
1499
1500 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1501
1502 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1503 (s_mips_stab): Do not restrict to stabn only.
1504
1505 2013-05-02 Nick Clifton <nickc@redhat.com>
1506
1507 * config/tc-msp430.c: Add support for the MSP430X architecture.
1508 Add code to insert a NOP instruction after any instruction that
1509 might change the interrupt state.
1510 Add support for the LARGE memory model.
1511 Add code to initialise the .MSP430.attributes section.
1512 * config/tc-msp430.h: Add support for the MSP430X architecture.
1513 * doc/c-msp430.texi: Document the new -mL and -mN command line
1514 options.
1515 * NEWS: Mention support for the MSP430X architecture.
1516
1517 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1518
1519 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1520 alpha*-*-linux*ecoff*.
1521
1522 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1523
1524 * config/tc-mips.c (mips_ip): Add sizelo.
1525 For "+C", "+G", and "+H", set sizelo and compare against it.
1526
1527 2013-04-29 Nick Clifton <nickc@redhat.com>
1528
1529 * as.c (Options): Add -gdwarf-sections.
1530 (parse_args): Likewise.
1531 * as.h (flag_dwarf_sections): Declare.
1532 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1533 (process_entries): When -gdwarf-sections is enabled generate
1534 fragmentary .debug_line sections.
1535 (out_debug_line): Set the section for the .debug_line section end
1536 symbol.
1537 * doc/as.texinfo: Document -gdwarf-sections.
1538 * NEWS: Mention -gdwarf-sections.
1539
1540 2013-04-26 Christian Groessler <chris@groessler.org>
1541
1542 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1543 according to the target parameter. Don't call s_segm since s_segm
1544 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1545 initialized yet.
1546 (md_begin): Call s_segm according to target parameter from command
1547 line.
1548
1549 2013-04-25 Alan Modra <amodra@gmail.com>
1550
1551 * configure.in: Allow little-endian linux.
1552 * configure: Regenerate.
1553
1554 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1555
1556 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1557 "fstatus" control register to "eccinj".
1558
1559 2013-04-19 Kai Tietz <ktietz@redhat.com>
1560
1561 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1562
1563 2013-04-15 Julian Brown <julian@codesourcery.com>
1564
1565 * expr.c (add_to_result, subtract_from_result): Make global.
1566 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1567 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1568 subtract_from_result to handle extra bit of precision for .sleb128
1569 directive operands.
1570
1571 2013-04-10 Julian Brown <julian@codesourcery.com>
1572
1573 * read.c (convert_to_bignum): Add sign parameter. Use it
1574 instead of X_unsigned to determine sign of resulting bignum.
1575 (emit_expr): Pass extra argument to convert_to_bignum.
1576 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1577 X_extrabit to convert_to_bignum.
1578 (parse_bitfield_cons): Set X_extrabit.
1579 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1580 Initialise X_extrabit field as appropriate.
1581 (add_to_result): New.
1582 (subtract_from_result): New.
1583 (expr): Use above.
1584 * expr.h (expressionS): Add X_extrabit field.
1585
1586 2013-04-10 Jan Beulich <jbeulich@suse.com>
1587
1588 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1589 register being PC when is_t or writeback, and use distinct
1590 diagnostic for the latter case.
1591
1592 2013-04-10 Jan Beulich <jbeulich@suse.com>
1593
1594 * gas/config/tc-arm.c (parse_operands): Re-write
1595 po_barrier_or_imm().
1596 (do_barrier): Remove bogus constraint().
1597 (do_t_barrier): Remove.
1598
1599 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1600
1601 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1602 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1603 ATmega2564RFR2
1604 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1605
1606 2013-04-09 Jan Beulich <jbeulich@suse.com>
1607
1608 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1609 Use local variable Rt in more places.
1610 (do_vmsr): Accept all control registers.
1611
1612 2013-04-09 Jan Beulich <jbeulich@suse.com>
1613
1614 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1615 if there was none specified for moves between scalar and core
1616 register.
1617
1618 2013-04-09 Jan Beulich <jbeulich@suse.com>
1619
1620 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1621 NEON_ALL_LANES case.
1622
1623 2013-04-08 Jan Beulich <jbeulich@suse.com>
1624
1625 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1626 PC-relative VSTR.
1627
1628 2013-04-08 Jan Beulich <jbeulich@suse.com>
1629
1630 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1631 entry to sp_fiq.
1632
1633 2013-04-03 Alan Modra <amodra@gmail.com>
1634
1635 * doc/as.texinfo: Add support to generate man options for h8300.
1636 * doc/c-h8300.texi: Likewise.
1637
1638 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1639
1640 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1641 Cortex-A57.
1642
1643 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1644
1645 PR binutils/15068
1646 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1647
1648 2013-03-26 Nick Clifton <nickc@redhat.com>
1649
1650 PR gas/15295
1651 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1652 start of the file each time.
1653
1654 PR gas/15178
1655 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1656 FreeBSD targets.
1657
1658 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1659
1660 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1661 after fixup.
1662
1663 2013-03-21 Will Newton <will.newton@linaro.org>
1664
1665 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1666 pc-relative str instructions in Thumb mode.
1667
1668 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1669
1670 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1671 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1672 R_H8_DISP32A16.
1673 * config/tc-h8300.h: Remove duplicated defines.
1674
1675 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1676
1677 PR gas/15282
1678 * tc-avr.c (mcu_has_3_byte_pc): New function.
1679 (tc_cfi_frame_initial_instructions): Call it to find return
1680 address size.
1681
1682 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1683
1684 PR gas/15095
1685 * config/tc-tic6x.c (tic6x_try_encode): Handle
1686 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1687 encode register pair numbers when required.
1688
1689 2013-03-15 Will Newton <will.newton@linaro.org>
1690
1691 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1692 in vstr in Thumb mode for pre-ARMv7 cores.
1693
1694 2013-03-14 Andreas Schwab <schwab@suse.de>
1695
1696 * doc/c-arc.texi (ARC Directives): Revert last change and use
1697 @itemize instead of @table.
1698 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1699
1700 2013-03-14 Nick Clifton <nickc@redhat.com>
1701
1702 PR gas/15273
1703 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1704 NULL message, instead just check ARM_CPU_IS_ANY directly.
1705
1706 2013-03-14 Nick Clifton <nickc@redhat.com>
1707
1708 PR gas/15212
1709 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1710 for table format.
1711 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1712 to the @item directives.
1713 (ARM-Neon-Alignment): Move to correct place in the document.
1714 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1715 formatting.
1716 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1717 @smallexample.
1718
1719 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1720
1721 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1722 case. Add default BAD_CASE to switch.
1723
1724 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1725
1726 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1727 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1728
1729 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1730
1731 * config/tc-arm.c (crc_ext_armv8): New feature set.
1732 (UNPRED_REG): New macro.
1733 (do_crc32_1): New function.
1734 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1735 do_crc32ch, do_crc32cw): Likewise.
1736 (TUEc): New macro.
1737 (insns): Add entries for crc32 mnemonics.
1738 (arm_extensions): Add entry for crc.
1739
1740 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1741
1742 * write.h (struct fix): Add fx_dot_frag field.
1743 (dot_frag): Declare.
1744 * write.c (dot_frag): New variable.
1745 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1746 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1747 * expr.c (expr): Save value of frag_now in dot_frag when setting
1748 dot_value.
1749 * read.c (emit_expr): Likewise. Delete comments.
1750
1751 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1752
1753 * config/tc-i386.c (flag_code_names): Removed.
1754 (i386_index_check): Rewrote.
1755
1756 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1757
1758 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1759 add comment.
1760 (aarch64_double_precision_fmovable): New function.
1761 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1762 function; handle hexadecimal representation of IEEE754 encoding.
1763 (parse_operands): Update the call to parse_aarch64_imm_float.
1764
1765 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1766
1767 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1768 (check_hle): Updated.
1769 (md_assemble): Likewise.
1770 (parse_insn): Likewise.
1771
1772 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1773
1774 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1775 (md_assemble): Check if REP prefix is OK.
1776 (parse_insn): Remove expecting_string_instruction. Set
1777 i.rep_prefix.
1778
1779 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1780
1781 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1782
1783 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1784
1785 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1786 for system registers.
1787
1788 2013-02-27 DJ Delorie <dj@redhat.com>
1789
1790 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1791 (rl78_op): Handle %code().
1792 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1793 (tc_gen_reloc): Likwise; convert to a computed reloc.
1794 (md_apply_fix): Likewise.
1795
1796 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1797
1798 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1799
1800 2013-02-25 Terry Guo <terry.guo@arm.com>
1801
1802 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1803 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1804 list of accepted CPUs.
1805
1806 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1807
1808 PR gas/15159
1809 * config/tc-i386.c (cpu_arch): Add ".smap".
1810
1811 * doc/c-i386.texi: Document smap.
1812
1813 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1814
1815 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1816 mips_assembling_insn appropriately.
1817 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1818
1819 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1820
1821 * config/tc-mips.c (append_insn): Correct indentation, remove
1822 extraneous braces.
1823
1824 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1825
1826 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1827
1828 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1829
1830 * configure.tgt: Add nios2-*-rtems*.
1831
1832 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1833
1834 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1835 NULL.
1836
1837 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1838
1839 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1840 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1841
1842 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1843
1844 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1845 core.
1846
1847 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1848 Andrew Jenner <andrew@codesourcery.com>
1849
1850 Based on patches from Altera Corporation.
1851
1852 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1853 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1854 * Makefile.in: Regenerated.
1855 * configure.tgt: Add case for nios2*-linux*.
1856 * config/obj-elf.c: Conditionally include elf/nios2.h.
1857 * config/tc-nios2.c: New file.
1858 * config/tc-nios2.h: New file.
1859 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1860 * doc/Makefile.in: Regenerated.
1861 * doc/all.texi: Set NIOSII.
1862 * doc/as.texinfo (Overview): Add Nios II options.
1863 (Machine Dependencies): Include c-nios2.texi.
1864 * doc/c-nios2.texi: New file.
1865 * NEWS: Note Altera Nios II support.
1866
1867 2013-02-06 Alan Modra <amodra@gmail.com>
1868
1869 PR gas/14255
1870 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1871 Don't skip fixups with fx_subsy non-NULL.
1872 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1873 with fx_subsy non-NULL.
1874
1875 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1876
1877 * doc/c-metag.texi: Add "@c man" markers.
1878
1879 2013-02-04 Alan Modra <amodra@gmail.com>
1880
1881 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1882 related code.
1883 (TC_ADJUST_RELOC_COUNT): Delete.
1884 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1885
1886 2013-02-04 Alan Modra <amodra@gmail.com>
1887
1888 * po/POTFILES.in: Regenerate.
1889
1890 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1891
1892 * config/tc-metag.c: Make SWAP instruction less permissive with
1893 its operands.
1894
1895 2013-01-29 DJ Delorie <dj@redhat.com>
1896
1897 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1898 relocs in .word/.etc statements.
1899
1900 2013-01-29 Roland McGrath <mcgrathr@google.com>
1901
1902 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1903 immediate value for 8-bit offset" error so it shows line info.
1904
1905 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1906
1907 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1908 for 64-bit output.
1909
1910 2013-01-24 Nick Clifton <nickc@redhat.com>
1911
1912 * config/tc-v850.c: Add support for e3v5 architecture.
1913 * doc/c-v850.texi: Mention new support.
1914
1915 2013-01-23 Nick Clifton <nickc@redhat.com>
1916
1917 PR gas/15039
1918 * config/tc-avr.c: Include dwarf2dbg.h.
1919
1920 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1921
1922 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1923 (tc_i386_fix_adjustable): Likewise.
1924 (lex_got): Likewise.
1925 (tc_gen_reloc): Likewise.
1926
1927 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1928
1929 * config/tc-aarch64.c (output_operand_error_record): Change to output
1930 the out-of-range error message as value-expected message if there is
1931 only one single value in the expected range.
1932 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1933 LSL #0 as a programmer-friendly feature.
1934
1935 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1936
1937 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1938 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1939 BFD_RELOC_64_SIZE relocations.
1940 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1941 for it.
1942 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1943 relocations against local symbols.
1944
1945 2013-01-16 Alan Modra <amodra@gmail.com>
1946
1947 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1948 finding some sort of toc syntax error, and break to avoid
1949 compiler uninit warning.
1950
1951 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1952
1953 PR gas/15019
1954 * config/tc-i386.c (lex_got): Increment length by 1 if the
1955 relocation token is removed.
1956
1957 2013-01-15 Nick Clifton <nickc@redhat.com>
1958
1959 * config/tc-v850.c (md_assemble): Allow signed values for
1960 V850E_IMMEDIATE.
1961
1962 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1963
1964 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1965 git to cvs.
1966
1967 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1968
1969 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1970 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1971 * config/tc-ppc.c (md_show_usage): Likewise.
1972 (ppc_handle_align): Handle power8's group ending nop.
1973
1974 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1975
1976 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1977 that the assember exits after the opcodes have been printed.
1978
1979 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1980
1981 * app.c: Remove trailing white spaces.
1982 * as.c: Likewise.
1983 * as.h: Likewise.
1984 * cond.c: Likewise.
1985 * dw2gencfi.c: Likewise.
1986 * dwarf2dbg.h: Likewise.
1987 * ecoff.c: Likewise.
1988 * input-file.c: Likewise.
1989 * itbl-lex.h: Likewise.
1990 * output-file.c: Likewise.
1991 * read.c: Likewise.
1992 * sb.c: Likewise.
1993 * subsegs.c: Likewise.
1994 * symbols.c: Likewise.
1995 * write.c: Likewise.
1996 * config/tc-i386.c: Likewise.
1997 * doc/Makefile.am: Likewise.
1998 * doc/Makefile.in: Likewise.
1999 * doc/c-aarch64.texi: Likewise.
2000 * doc/c-alpha.texi: Likewise.
2001 * doc/c-arc.texi: Likewise.
2002 * doc/c-arm.texi: Likewise.
2003 * doc/c-avr.texi: Likewise.
2004 * doc/c-bfin.texi: Likewise.
2005 * doc/c-cr16.texi: Likewise.
2006 * doc/c-d10v.texi: Likewise.
2007 * doc/c-d30v.texi: Likewise.
2008 * doc/c-h8300.texi: Likewise.
2009 * doc/c-hppa.texi: Likewise.
2010 * doc/c-i370.texi: Likewise.
2011 * doc/c-i386.texi: Likewise.
2012 * doc/c-i860.texi: Likewise.
2013 * doc/c-m32c.texi: Likewise.
2014 * doc/c-m32r.texi: Likewise.
2015 * doc/c-m68hc11.texi: Likewise.
2016 * doc/c-m68k.texi: Likewise.
2017 * doc/c-microblaze.texi: Likewise.
2018 * doc/c-mips.texi: Likewise.
2019 * doc/c-msp430.texi: Likewise.
2020 * doc/c-mt.texi: Likewise.
2021 * doc/c-s390.texi: Likewise.
2022 * doc/c-score.texi: Likewise.
2023 * doc/c-sh.texi: Likewise.
2024 * doc/c-sh64.texi: Likewise.
2025 * doc/c-tic54x.texi: Likewise.
2026 * doc/c-tic6x.texi: Likewise.
2027 * doc/c-v850.texi: Likewise.
2028 * doc/c-xc16x.texi: Likewise.
2029 * doc/c-xgate.texi: Likewise.
2030 * doc/c-xtensa.texi: Likewise.
2031 * doc/c-z80.texi: Likewise.
2032 * doc/internals.texi: Likewise.
2033
2034 2013-01-10 Roland McGrath <mcgrathr@google.com>
2035
2036 * hash.c (hash_new_sized): Make it global.
2037 * hash.h: Declare it.
2038 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
2039 pass a small size.
2040
2041 2013-01-10 Will Newton <will.newton@imgtec.com>
2042
2043 * Makefile.am: Add Meta.
2044 * Makefile.in: Regenerate.
2045 * config/tc-metag.c: New file.
2046 * config/tc-metag.h: New file.
2047 * configure.tgt: Add Meta.
2048 * doc/Makefile.am: Add Meta.
2049 * doc/Makefile.in: Regenerate.
2050 * doc/all.texi: Add Meta.
2051 * doc/as.texiinfo: Document Meta options.
2052 * doc/c-metag.texi: New file.
2053
2054 2013-01-09 Steve Ellcey <sellcey@mips.com>
2055
2056 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
2057 calls.
2058 * config/tc-mips.c (internalError): Remove, replace with abort.
2059
2060 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
2061
2062 * config/tc-aarch64.c (parse_operands): Change to compare the result
2063 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
2064
2065 2013-01-07 Nick Clifton <nickc@redhat.com>
2066
2067 PR gas/14887
2068 * config/tc-arm.c (skip_past_char): Skip whitespace before the
2069 anticipated character.
2070 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
2071 here as it is no longer needed.
2072
2073 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
2074
2075 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
2076 * doc/c-score.texi (SCORE-Opts): Likewise.
2077 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
2078
2079 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
2080
2081 * config/tc-mips.c: Add support for MIPS r5900.
2082 Add M_LQ_AB and M_SQ_AB to support large values for instructions
2083 lq and sq.
2084 (can_swap_branch_p, get_append_method): Detect some conditional
2085 short loops to fix a bug on the r5900 by NOP in the branch delay
2086 slot.
2087 (M_MUL): Support 3 operands in multu on r5900.
2088 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
2089 (s_mipsset): Force 32 bit floating point on r5900.
2090 (mips_ip): Check parameter range of instructions mfps and mtps on
2091 r5900.
2092 * configure.in: Detect CPU type when target string contains r5900
2093 (e.g. mips64r5900el-linux-gnu).
2094
2095 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
2096
2097 * as.c (parse_args): Update copyright year to 2013.
2098
2099 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
2100
2101 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
2102 and "cortex57".
2103
2104 2013-01-02 Nick Clifton <nickc@redhat.com>
2105
2106 PR gas/14987
2107 * config/tc-arm.c (parse_address_main): Skip whitespace before a
2108 closing bracket.
2109
2110 For older changes see ChangeLog-2012
2111 \f
2112 Copyright (C) 2013 Free Software Foundation, Inc.
2113
2114 Copying and distribution of this file, with or without modification,
2115 are permitted in any medium without royalty provided the copyright
2116 notice and this notice are preserved.
2117
2118 Local Variables:
2119 mode: change-log
2120 left-margin: 8
2121 fill-column: 74
2122 version-control: never
2123 End: